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This is regardless of the amount of physical VRAM on the board. The following are results from real hardware tests: Card VRAM PCI BAR0 CONFIG_MEMSIZE CONFIG= _APER_SIZE AGP_APER_OFFSET Reviewed-by: BALATON Zoltan ----------------------- ---- -------- -------------- ------= ---------- --------------- Rage 128 Pro Ultra TF 32MB 64MB 0x02000000 0x020= 00000 0x02000000 Rage 128 RF/SG AGP 16MB 64MB 0x01000000 0x020= 00000 0x02000000 Radeon R100 QD [Radeon 7200] 64MB 128MB 0x04000000 0x040= 00000 N/A Radeon RV100 QY [Radeon 7000/VE] 32MB 128MB 0x02000000 0x040= 00000 N/A Previously the linear aperture (BAR0) would match the VRAM size. This discrepancy caused issues with the X.org and XFree86 r128 drivers. These drivers apply a mask of 0xfc000000 (2^26 =3D 64MB) to the linear aperture address. If that address is not on a 64MB boundary the framebuffer points to an incorrect memory location. Testing shows that the Radeon R100 also has a BAR0 larger than VRAM (128MB in this case) and the X.org radeon driver also masks to 64MB. For Rage 128, CONFIG_APER_SIZE also differs from the previous value and the behavior stated in the documentation. The Rage 128 register guide states that it should contain the size of the VRAM + AGP memory. The cards tested above show that this isn't the case. These tests also included enabling/disabling AGP with 8MB of memory. It didn't change the contents of CONFIG_APER_SIZE. For both Rage 128 and R100 the CONFIG_APER_SIZE is half of the PCI BAR0 siz= e. Signed-off-by: Chad Jablonski Reviewed-by: BALATON Zoltan Message-ID: <20260303024730.1489136-2-chad@jablonski.xyz> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/display/ati_int.h | 5 +++++ hw/display/ati.c | 16 ++++++++++++++-- 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/hw/display/ati_int.h b/hw/display/ati_int.h index f5a47b82b08..708cc1dd3a3 100644 --- a/hw/display/ati_int.h +++ b/hw/display/ati_int.h @@ -10,6 +10,7 @@ #define ATI_INT_H =20 #include "qemu/timer.h" +#include "qemu/units.h" #include "hw/pci/pci_device.h" #include "hw/i2c/bitbang_i2c.h" #include "vga_int.h" @@ -29,6 +30,9 @@ /* Radeon RV100 (VE) */ #define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159 =20 +#define ATI_RAGE128_LINEAR_APER_SIZE (64 * MiB) +#define ATI_R100_LINEAR_APER_SIZE (128 * MiB) + #define TYPE_ATI_VGA "ati-vga" OBJECT_DECLARE_SIMPLE_TYPE(ATIVGAState, ATI_VGA) =20 @@ -97,6 +101,7 @@ struct ATIVGAState { QEMUCursor *cursor; QEMUTimer vblank_timer; bitbang_i2c_interface bbi2c; + MemoryRegion linear_aper; MemoryRegion io; MemoryRegion mm; ATIVGARegs regs; diff --git a/hw/display/ati.c b/hw/display/ati.c index e9c3ad2cd15..8438a77de04 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -361,7 +361,7 @@ static uint64_t ati_mm_read(void *opaque, hwaddr addr, = unsigned int size) PCI_BASE_ADDRESS_0, size) & 0xffffff= f0; break; case CONFIG_APER_SIZE: - val =3D s->vga.vram_size / 2; + val =3D memory_region_size(&s->linear_aper) / 2; break; case CONFIG_REG_1_BASE: val =3D pci_default_read_config(&s->dev, @@ -952,6 +952,7 @@ static void ati_vga_realize(PCIDevice *dev, Error **err= p) { ATIVGAState *s =3D ATI_VGA(dev); VGACommonState *vga =3D &s->vga; + uint64_t aper_size; =20 #ifndef CONFIG_PIXMAN if (s->use_pixman !=3D 0) { @@ -1011,7 +1012,18 @@ static void ati_vga_realize(PCIDevice *dev, Error **= errp) /* io space is alias to beginning of mmregs */ memory_region_init_alias(&s->io, OBJECT(s), "ati.io", &s->mm, 0, 0x100= ); =20 - pci_register_bar(dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram); + /* + * The framebuffer is at the beginning of the linear aperture. For + * Rage128 the upper half of the aperture is reserved for an AGP + * window (which we do not emulate.) + */ + aper_size =3D s->dev_id =3D=3D PCI_DEVICE_ID_ATI_RAGE128_PF ? + ATI_RAGE128_LINEAR_APER_SIZE : ATI_R100_LINEAR_APER_SIZE; + memory_region_init(&s->linear_aper, OBJECT(dev), "ati-linear-aperture0= ", + aper_size); + memory_region_add_subregion(&s->linear_aper, 0, &vga->vram); + + pci_register_bar(dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->linear_ape= r); pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io); pci_register_bar(dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mm); =20 --=20 2.53.0