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Tsirkin" , Igor Mammedov , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , Paolo Bonzini , Stefan Berger , Ani Sinha , Thomas Huth , Marcel Apfelbaum , Richard Henderson , Eduardo Habkost Subject: [PATCH 10/10] hw/tpm: Remove CRBState::ppi_enabled field Date: Sat, 7 Mar 2026 16:26:34 +0100 Message-ID: <20260307152635.83893-11-philmd@linaro.org> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260307152635.83893-1-philmd@linaro.org> References: <20260307152635.83893-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1772897301418158500 The CRBState::ppi_enabled boolean was only set in the hw_compat_3_1[] array, via the 'ppi=3Dfalse' property. We removed all machines using that array, lets remove that property and all the code around it. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Stefan Berger Reviewed-by: Thomas Huth --- hw/tpm/tpm_tis.h | 1 - hw/acpi/tpm.c | 4 ---- hw/i386/acpi-build.c | 2 +- hw/tpm/tpm_crb.c | 12 +++--------- hw/tpm/tpm_tis_common.c | 4 +--- hw/tpm/tpm_tis_isa.c | 7 ++----- 6 files changed, 7 insertions(+), 23 deletions(-) diff --git a/hw/tpm/tpm_tis.h b/hw/tpm/tpm_tis.h index 184632ff66b..0df45f0c716 100644 --- a/hw/tpm/tpm_tis.h +++ b/hw/tpm/tpm_tis.h @@ -75,7 +75,6 @@ typedef struct TPMState { =20 size_t be_buffer_size; =20 - bool ppi_enabled; TPMPPI ppi; } TPMState; =20 diff --git a/hw/acpi/tpm.c b/hw/acpi/tpm.c index cdc02275365..922030a29bf 100644 --- a/hw/acpi/tpm.c +++ b/hw/acpi/tpm.c @@ -25,10 +25,6 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) Aml *method, *field, *ifctx, *ifctx2, *ifctx3, *func_mask, *not_implemented, *pak, *tpm2, *tpm3, *pprm, *pprq, *zero, *one; =20 - if (!object_property_get_bool(OBJECT(tpm), "ppi", &error_abort)) { - return; - } - zero =3D aml_int(0); one =3D aml_int(1); func_mask =3D aml_int(TPM_PPI_FUNC_MASK); diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index f622b91b76a..6b7cd00c5db 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2218,7 +2218,7 @@ void acpi_setup(void) tables.tcpalog->data, acpi_data_len(tables.tcpalog)); =20 tpm =3D tpm_find(); - if (tpm && object_property_get_bool(OBJECT(tpm), "ppi", &error_abort))= { + if (tpm) { tpm_config =3D (FwCfgTPMConfig) { .tpmppi_address =3D cpu_to_le32(TPM_PPI_ADDR_BASE), .tpm_version =3D tpm_get_version(tpm), diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index 8723536f931..40ffc7b006b 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -43,7 +43,6 @@ struct CRBState { =20 size_t be_buffer_size; =20 - bool ppi_enabled; TPMPPI ppi; }; typedef struct CRBState CRBState; @@ -228,16 +227,13 @@ static const VMStateDescription vmstate_tpm_crb =3D { =20 static const Property tpm_crb_properties[] =3D { DEFINE_PROP_TPMBE("tpmdev", CRBState, tpmbe), - DEFINE_PROP_BOOL("ppi", CRBState, ppi_enabled, true), }; =20 static void tpm_crb_reset(void *dev) { CRBState *s =3D CRB(dev); =20 - if (s->ppi_enabled) { - tpm_ppi_reset(&s->ppi); - } + tpm_ppi_reset(&s->ppi); tpm_backend_reset(s->tpmbe); =20 memset(s->regs, 0, sizeof(s->regs)); @@ -303,10 +299,8 @@ static void tpm_crb_realize(DeviceState *dev, Error **= errp) memory_region_add_subregion(get_system_memory(), TPM_CRB_ADDR_BASE + sizeof(s->regs), &s->cmdmem); =20 - if (s->ppi_enabled) { - tpm_ppi_init(&s->ppi, get_system_memory(), - TPM_PPI_ADDR_BASE, OBJECT(s)); - } + tpm_ppi_init(&s->ppi, get_system_memory(), + TPM_PPI_ADDR_BASE, OBJECT(s)); =20 if (xen_enabled()) { tpm_crb_reset(dev); diff --git a/hw/tpm/tpm_tis_common.c b/hw/tpm/tpm_tis_common.c index f594b15b8ab..712d64b60f1 100644 --- a/hw/tpm/tpm_tis_common.c +++ b/hw/tpm/tpm_tis_common.c @@ -821,9 +821,7 @@ void tpm_tis_reset(TPMState *s) s->be_buffer_size =3D MIN(tpm_backend_get_buffer_size(s->be_driver), TPM_TIS_BUFFER_MAX); =20 - if (s->ppi_enabled) { - tpm_ppi_reset(&s->ppi); - } + tpm_ppi_reset(&s->ppi); tpm_backend_reset(s->be_driver); =20 s->active_locty =3D TPM_TIS_NO_LOCALITY; diff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c index 61e95434f5b..aadca4ed79b 100644 --- a/hw/tpm/tpm_tis_isa.c +++ b/hw/tpm/tpm_tis_isa.c @@ -94,7 +94,6 @@ static void tpm_tis_isa_reset(DeviceState *dev) static const Property tpm_tis_isa_properties[] =3D { DEFINE_PROP_UINT32("irq", TPMStateISA, state.irq_num, TPM_TIS_IRQ), DEFINE_PROP_TPMBE("tpmdev", TPMStateISA, state.be_driver), - DEFINE_PROP_BOOL("ppi", TPMStateISA, state.ppi_enabled, true), }; =20 static void tpm_tis_isa_initfn(Object *obj) @@ -132,10 +131,8 @@ static void tpm_tis_isa_realizefn(DeviceState *dev, Er= ror **errp) memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev)), TPM_TIS_ADDR_BASE, &s->mmio); =20 - if (s->ppi_enabled) { - tpm_ppi_init(&s->ppi, isa_address_space(ISA_DEVICE(dev)), - TPM_PPI_ADDR_BASE, OBJECT(dev)); - } + tpm_ppi_init(&s->ppi, isa_address_space(ISA_DEVICE(dev)), + TPM_PPI_ADDR_BASE, OBJECT(dev)); } =20 static void build_tpm_tis_isa_aml(AcpiDevAmlIf *adev, Aml *scope) --=20 2.52.0