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Tsirkin" , Igor Mammedov , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , Paolo Bonzini , Stefan Berger , Ani Sinha , Thomas Huth , Marcel Apfelbaum Subject: [PATCH 09/10] hw/pci-bridge/pcie_rp: Remove PCIESlot::disable_acs field Date: Sat, 7 Mar 2026 16:26:33 +0100 Message-ID: <20260307152635.83893-10-philmd@linaro.org> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260307152635.83893-1-philmd@linaro.org> References: <20260307152635.83893-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1772897281070158500 The PCIESlot::disable_acs boolean was only set in the hw_compat_3_1[] array, via the 'disable-acs=3Dtrue' property. We removed all machines using that array, lets remove that property and all the code around it. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Thomas Huth --- include/hw/pci/pcie_port.h | 3 --- hw/pci-bridge/pcie_root_port.c | 3 +-- 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h index 53cd64c5edf..b28af067a66 100644 --- a/include/hw/pci/pcie_port.h +++ b/include/hw/pci/pcie_port.h @@ -60,9 +60,6 @@ struct PCIESlot { PCIExpLinkWidth width; bool flitmode; =20 - /* Disable ACS (really for a pcie_root_port) */ - bool disable_acs; - /* Indicates whether any type of hot-plug is allowed on the slot */ bool hotplug; =20 diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c index fe3ced56851..7c3e78010b4 100644 --- a/hw/pci-bridge/pcie_root_port.c +++ b/hw/pci-bridge/pcie_root_port.c @@ -117,7 +117,7 @@ static void rp_realize(PCIDevice *d, Error **errp) pcie_aer_root_init(d); rp_aer_vector_update(d); =20 - if (rpc->acs_offset && !s->disable_acs) { + if (rpc->acs_offset) { pcie_acs_init(d, rpc->acs_offset); } return; @@ -151,7 +151,6 @@ static void rp_exit(PCIDevice *d) static const Property rp_props[] =3D { DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present, QEMU_PCIE_SLTCAP_PCP_BITNR, true), - DEFINE_PROP_BOOL("disable-acs", PCIESlot, disable_acs, false), }; =20 static void rp_instance_post_init(Object *obj) --=20 2.52.0