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[81.2.115.145]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4852470c258sm17921205e9.30.2026.03.06.07.40.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Mar 2026 07:40:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1772811618; x=1773416418; darn=nongnu.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=GdtUZgYJO/AkZ54kOEVmR9jlUu/MzOeYTvNR+pXLkow=; b=QiMPnfP84n11YEFWZ3qONNrtKjhqt7ksKbnu6SGRMhCr7i4mvEXcWEZB+Nc3Ay7gms uyWlONrudX/8BH9nfPd4EFcZKY1LlESeE8rCaF9p2G3LDdq06CoAKR1e0Cqt22xTclUA lnoV+rM6YxzwnwYq+dZwERa1ohHaSEEytKOmo4WkUWeCbnM5ihaHqLoqR4DTXKBiO76G kr3mDAzP2ckI4BRbhLks3bOudcecUJWcH7Gzf79miAeN0kEJAZ8OdbWd+ENCUbZRSYl0 UUwwrheh/Vx5XCPxHE+xy36j/C5DhklhcLdE56JANTOY95wnFppAR+y8ycQOclhqV43d casA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772811618; x=1773416418; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=GdtUZgYJO/AkZ54kOEVmR9jlUu/MzOeYTvNR+pXLkow=; b=XQ+5M4Z37Ya4CRtAiRQc2UJxXOzwtXFLRNN+JJrFsgxCnlxNsi8FFWfSqRpmSPlEZG tWlO3WlpLgFzDqkjsMvLINAASOSaVVU9txcScNpjodogbSyhvxkrQIOwaRwIaEm7vhhW jAkdcB1e36LZQnPfouLwtV3Hp3IB3tqx00cYK7koPRO5zIAERNEGulZDXtzGfc/j3Mro HoYuTy5CkDlXRBL2WZFiVCwOdot9Nbucp8qoaOhmlXFI2YeWPLR1qXOk8AZWSjSwKvhB JZYZdHDjl3mqjSOq/C7nvs5OhJYGzaIIozFMgdCfwM0Pq1c5FiTBJv5+28JOHtgR+3FA Gx2g== X-Forwarded-Encrypted: i=1; AJvYcCVNp29u4DIG7dBP/UkZLHBsTtaGiIbhrIUuzliEJfPmqRHIQd4qTjY5GJJV20m0XQGZbMjZTkw+nT2S@nongnu.org X-Gm-Message-State: AOJu0Yzxnve5cGPu3Lh5103MuoaYVA76ekI0vv8JAxp91iIk3MfGtU26 IXwV6kEc6Dj9gh0fJiJ8DTZdFmXHeDUOq6Dq6zLw4U53OZkQZvpflf2jtHvACNbeKrA= X-Gm-Gg: ATEYQzztwW8F9l98AWAtPfVvqS2Q6kI7aPlZYp1USiMAAgovFA80ELxXKuaMyrCgXwc T/ghSA6sHGwBy/f46xNNgsHVL2j5HKJ0oUaEAqf84mivadVGIxsirTIRwKxxVumqS6x0Lu/R6L2 KSwEzSrnQapWyOH29gDzz7pz9XA4fq2ezksPSBqfWLZrpX2i5A9oJcDVQMrm+K/jnHwBQuqpIRR hyrpXxhWchD7l4s4HB9An553lq7uD18WFDyKBmQ8brVt4/4MDnAfbopXI4EkOjEVEv1WOM+IiNN yu2uNqhngmLp7eorxjLBkuwg7n9LokCh+Yif5tIV1UK026bOx94kuHi/g3onSBZUrif6HwxCYLe ZC9/D6S57+WfX3K6UaqQmXYPYbgh/lWKBh062KpYxXl94nJ3cEziODNtlPgRMknopXFi1FShhrn N7qUIXAscbDFkSAtisdxk6PGOKe4bd9wRdMZpL+jym337qh6/+yeDo7tNK0/xCMZvueWYVBT/SY YN2ozEFeaYTCvxd6GjUbpENjoSp3dg= X-Received: by 2002:a05:600c:4ec9:b0:483:7783:5373 with SMTP id 5b1f17b1804b1-4852697a0d8mr39970575e9.23.1772811617839; Fri, 06 Mar 2026 07:40:17 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Tyrone Ting , Hao Wu , Jason Wang Subject: [PATCH] hw/net/npcm_gmac: Catch accesses off the end of the register array Date: Fri, 6 Mar 2026 15:40:16 +0000 Message-ID: <20260306154016.2194091-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1772811660159154100 Content-Type: text/plain; charset="utf-8" In the npcm_gmac device, we create the iomem MemoryRegion with a size of 8KB, but NPCM_GMAC_NR_REGS is only 0x1060 / 4. This means there's a range of offsets that the guest can access that don't have gmac->regs[] entries. We weren't catching this, so the guest could get us to index off the end of the regs array. Catch and log these invalid accesses. Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3316 Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/net/npcm_gmac.c | 14 ++++++++++++++ include/hw/net/npcm_gmac.h | 3 ++- 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/hw/net/npcm_gmac.c b/hw/net/npcm_gmac.c index 123fb92ca4..d9902d9ab5 100644 --- a/hw/net/npcm_gmac.c +++ b/hw/net/npcm_gmac.c @@ -700,6 +700,13 @@ static uint64_t npcm_gmac_read(void *opaque, hwaddr of= fset, unsigned size) NPCMGMACState *gmac =3D opaque; uint32_t v =3D 0; =20 + if (offset >=3D NPCM_GMAC_REG_SIZE) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid register offset: 0x%04" HWADDR_PRIx"\n", + DEVICE(gmac)->canonical_path, offset); + return v; + } + switch (offset) { /* Write only registers */ case A_NPCM_DMA_XMT_POLL_DEMAND: @@ -724,6 +731,13 @@ static void npcm_gmac_write(void *opaque, hwaddr offse= t, =20 trace_npcm_gmac_reg_write(DEVICE(gmac)->canonical_path, offset, v); =20 + if (offset >=3D NPCM_GMAC_REG_SIZE) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid register offset: 0x%04" HWADDR_PRIx"\n", + DEVICE(gmac)->canonical_path, offset); + return; + } + switch (offset) { /* Read only registers */ case A_NPCM_GMAC_VERSION: diff --git a/include/hw/net/npcm_gmac.h b/include/hw/net/npcm_gmac.h index d4fe49ada5..23b9841a80 100644 --- a/include/hw/net/npcm_gmac.h +++ b/include/hw/net/npcm_gmac.h @@ -24,7 +24,8 @@ #include "hw/core/sysbus.h" #include "net/net.h" =20 -#define NPCM_GMAC_NR_REGS (0x1060 / sizeof(uint32_t)) +#define NPCM_GMAC_REG_SIZE 0x1060 +#define NPCM_GMAC_NR_REGS (NPCM_GMAC_REG_SIZE / sizeof(uint32_t)) =20 #define NPCM_GMAC_MAX_PHYS 32 #define NPCM_GMAC_MAX_PHY_REGS 32 --=20 2.43.0