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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1772809396; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PGTMgxGA8pFIrhh3yN3K+JOqD7A/a5lQ6jTSkgD0O/c=; b=OJg+Txs8dXFj9dW1Ab9tYvyn4GECTRTMOPaxdRTQGmb78mmK5ySHagY9ellXKCAVuedcxp TDnbd/Q+yl8tWDFmmzzReamZBzwHFVa2P9gYLZMTtOba5asKx/9CqrEelCzXNEjFOlMJBa KXdOIVJRGT0vAcJAsZ+AREe3xeIqMBg= X-MC-Unique: AETrIX8QM_mzgxiMLFU9cw-1 X-Mimecast-MFC-AGG-ID: AETrIX8QM_mzgxiMLFU9cw_1772809392 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, cohuck@redhat.com, sebott@redhat.com, peterx@redhat.com, philmd@linaro.org, alex.bennee@linaro.org Subject: [PATCH v9 1/6] target/arm/cpu: Introduce the infrastructure for cpreg migration tolerances Date: Fri, 6 Mar 2026 16:02:19 +0100 Message-ID: <20260306150302.203112-2-eric.auger@redhat.com> In-Reply-To: <20260306150302.203112-1-eric.auger@redhat.com> References: <20260306150302.203112-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" We introduce a datatype for a tolerance with respect to a given cpreg migration issue. The tolerance applies to a given cpreg kvm index, and can be of different types: - ToleranceNotOnBothEnds (cpreg index is allowed to be only present on one end) - ToleranceDiffInMask (value differences are allowed only within a mask) - ToleranceFieldLT (incoming field value must be less than a given value) - ToleranceFieldGT (incoming field value must be greater than a given value) A QLIST of such tolerances can be populated using a new helper: arm_register_cpreg_mig_tolerance() and arm_cpu_match_cpreg_mig_tolerance() allows to check whether a tolerance exists for a given kvm index and its criterion is matched. callers for those helpers will be introduced in subsequent patches. Signed-off-by: Eric Auger Reviewed-by: Sebastian Ott --- v8 -> v9 - fix the tolerance type checking - rename arm_cpu_cpreg_has_mig_tolerance into arm_cpu_match_cpreg_mig_toler= ance --- target/arm/cpu.h | 33 +++++++++++++++++++++ target/arm/cpu.c | 75 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 108 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 657ff4ab20b..2b1d3af34f0 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -843,6 +843,21 @@ struct ARMELChangeHook { QLIST_ENTRY(ARMELChangeHook) node; }; =20 +typedef enum { + ToleranceNotOnBothEnds, + ToleranceDiffInMask, + ToleranceFieldLT, + ToleranceFieldGT, +} ARMCPUCPREGMigToleranceType; + +typedef struct ARMCPUCPREGMigTolerance { + uint64_t kvmidx; + uint64_t mask; + uint64_t value; + ARMCPUCPREGMigToleranceType type; + QLIST_ENTRY(ARMCPUCPREGMigTolerance) node; +} ARMCPUCPREGMigTolerance; + /* These values map onto the return values for * QEMU_PSCI_0_2_FN_AFFINITY_INFO */ typedef enum ARMPSCIState { @@ -1139,6 +1154,7 @@ struct ArchCPU { =20 QLIST_HEAD(, ARMELChangeHook) pre_el_change_hooks; QLIST_HEAD(, ARMELChangeHook) el_change_hooks; + QLIST_HEAD(, ARMCPUCPREGMigTolerance) cpreg_mig_tolerances; =20 int32_t node_id; /* NUMA node this CPU belongs to */ =20 @@ -2632,6 +2648,23 @@ void arm_register_pre_el_change_hook(ARMCPU *cpu, AR= MELChangeHookFn *hook, void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook, void *opaque); =20 +/** + * arm_register_cpreg_mig_tolerance: + * Register a migration tolerance wrt one given cpreg identified by its + * @kvmidx. Only one tolerance can be registered by kvm reg idx. + */ +void arm_register_cpreg_mig_tolerance(ARMCPU *cpu, uint64_t kvmidx, + uint64_t mask, uint64_t value, + ARMCPUCPREGMigToleranceType type); + +/** + * arm_cpu_match_cpreg_mig_tolerance: + * Check whether a tolerance of type @type exists for a given @kvmidx + * and the tolerance criterion is satified + */ +bool arm_cpu_match_cpreg_mig_tolerance(ARMCPU *cpu, uint64_t kvmidx, + uint64_t vmstate_value, uint64_t lo= cal_value, + ARMCPUCPREGMigToleranceType type); /** * arm_rebuild_hflags: * Rebuild the cached TBFLAGS for arbitrary changed processor state. diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 7e3e84b4bbb..79e328c2888 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -181,6 +181,75 @@ void arm_register_el_change_hook(ARMCPU *cpu, ARMELCha= ngeHookFn *hook, QLIST_INSERT_HEAD(&cpu->el_change_hooks, entry, node); } =20 +void arm_register_cpreg_mig_tolerance(ARMCPU *cpu, uint64_t kvmidx, + uint64_t mask, uint64_t value, + ARMCPUCPREGMigToleranceType type) +{ + ARMCPUCPREGMigTolerance *t, *entry; + + /* make sure the kvmidx has not tolerance already registered */ + QLIST_FOREACH(t, &cpu->cpreg_mig_tolerances, node) { + if (t->kvmidx =3D=3D kvmidx) { + g_assert_not_reached(); + } + } + entry =3D g_new0(ARMCPUCPREGMigTolerance, 1); + + entry->kvmidx =3D kvmidx; + entry->mask =3D mask; + entry->value =3D value; + entry->type =3D type; + + QLIST_INSERT_HEAD(&cpu->cpreg_mig_tolerances, entry, node); +} + +bool arm_cpu_match_cpreg_mig_tolerance(ARMCPU *cpu, uint64_t kvmidx, + uint64_t vmstate_value, uint64_t lo= cal_value, + ARMCPUCPREGMigToleranceType type) +{ + ARMCPUCPREGMigTolerance *t; + uint64_t diff, diff_outside_mask, field; + bool found =3D false; + + QLIST_FOREACH(t, &cpu->cpreg_mig_tolerances, node) { + if (t->kvmidx =3D=3D kvmidx && t->type =3D=3D type) { + found =3D true; + break; + } + } + if (!found) { + return false; + } + + /* we found one tolerance woth @type associated to the @kvmidx */ + + if (type =3D=3D ToleranceNotOnBothEnds) { + return true; + } + + /* Need to check the mask */ + diff =3D vmstate_value ^ local_value; + diff_outside_mask =3D diff & ~t->mask; + + if (diff_outside_mask) { + /* there are differences outside of the mask */ + return false; + } + if (type =3D=3D ToleranceDiffInMask) { + /* differences only in the field, tolerance matched */ + return true; + } + /* need to compare field value against authorized ones */ + field =3D vmstate_value & t->mask; + if (type =3D=3D ToleranceFieldLT && (field < t->value)) { + return true; + } + if (type =3D=3D ToleranceFieldGT && (field > t->value)) { + return true; + } + return false; +} + static void cp_reg_reset(gpointer key, gpointer value, gpointer opaque) { /* Reset a single ARMCPRegInfo register */ @@ -1106,6 +1175,7 @@ static void arm_cpu_initfn(Object *obj) =20 QLIST_INIT(&cpu->pre_el_change_hooks); QLIST_INIT(&cpu->el_change_hooks); + QLIST_INIT(&cpu->cpreg_mig_tolerances); =20 #ifdef CONFIG_USER_ONLY # ifdef TARGET_AARCH64 @@ -1550,6 +1620,7 @@ static void arm_cpu_finalizefn(Object *obj) { ARMCPU *cpu =3D ARM_CPU(obj); ARMELChangeHook *hook, *next; + ARMCPUCPREGMigTolerance *t, *n; =20 g_hash_table_destroy(cpu->cp_regs); =20 @@ -1561,6 +1632,10 @@ static void arm_cpu_finalizefn(Object *obj) QLIST_REMOVE(hook, node); g_free(hook); } + QLIST_FOREACH_SAFE(t, &cpu->cpreg_mig_tolerances, node, n) { + QLIST_REMOVE(t, node); + g_free(t); + } #ifndef CONFIG_USER_ONLY if (cpu->pmu_timer) { timer_free(cpu->pmu_timer); --=20 2.53.0