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On post save we simply point to cpreg arrays and set the length accordingly. Remove VMSTATE_VARRAY_INT32 for cpreg_vmstate_array_len as now the array is dynamically allocated. Also add a trace point on post_load to trace potential mismatch between the number of incoming cpregs versus current ones. Signed-off-by: Eric Auger Reviewed-by: Peter Maydell Message-id: 20260304101625.1962633-3-eric.auger@redhat.com Suggested-by: Peter Maydell Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/helper.c | 5 ----- target/arm/kvm.c | 5 ----- target/arm/machine.c | 45 +++++++++++++++++++++++++++----------- target/arm/trace-events | 3 +++ target/arm/whpx/whpx-all.c | 7 ------ 5 files changed, 35 insertions(+), 30 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 6bfab90981..7389f2988c 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -265,15 +265,10 @@ void arm_init_cpreg_list(ARMCPU *cpu) if (arraylen) { cpu->cpreg_indexes =3D g_new(uint64_t, arraylen); cpu->cpreg_values =3D g_new(uint64_t, arraylen); - cpu->cpreg_vmstate_indexes =3D g_new(uint64_t, arraylen); - cpu->cpreg_vmstate_values =3D g_new(uint64_t, arraylen); } else { cpu->cpreg_indexes =3D NULL; cpu->cpreg_values =3D NULL; - cpu->cpreg_vmstate_indexes =3D NULL; - cpu->cpreg_vmstate_values =3D NULL; } - cpu->cpreg_vmstate_array_len =3D arraylen; cpu->cpreg_array_len =3D 0; =20 g_hash_table_foreach(cpu->cp_regs, add_cpreg_to_list, cpu); diff --git a/target/arm/kvm.c b/target/arm/kvm.c index eaa065d726..555083e7aa 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -864,12 +864,7 @@ static int kvm_arm_init_cpreg_list(ARMCPU *cpu) =20 cpu->cpreg_indexes =3D g_renew(uint64_t, cpu->cpreg_indexes, arraylen); cpu->cpreg_values =3D g_renew(uint64_t, cpu->cpreg_values, arraylen); - cpu->cpreg_vmstate_indexes =3D g_renew(uint64_t, cpu->cpreg_vmstate_in= dexes, - arraylen); - cpu->cpreg_vmstate_values =3D g_renew(uint64_t, cpu->cpreg_vmstate_val= ues, - arraylen); cpu->cpreg_array_len =3D arraylen; - cpu->cpreg_vmstate_array_len =3D arraylen; =20 for (i =3D 0, arraylen =3D 0; i < rlp->n; i++) { uint64_t regidx =3D rlp->reg[i]; diff --git a/target/arm/machine.c b/target/arm/machine.c index bbaae34449..d3d4f2ddc1 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -1,5 +1,6 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "trace.h" #include "qemu/error-report.h" #include "system/kvm.h" #include "system/tcg.h" @@ -984,11 +985,14 @@ static int cpu_pre_save(void *opaque) } } =20 + /* + * On outbound migration, send the data in our cpreg_{values,indexes} + * arrays. The migration code will not allocate anything, but just + * reads the data pointed to by the VMSTATE_VARRAY_INT32_ALLOC() field= s. + */ + cpu->cpreg_vmstate_indexes =3D cpu->cpreg_indexes; + cpu->cpreg_vmstate_values =3D cpu->cpreg_values; cpu->cpreg_vmstate_array_len =3D cpu->cpreg_array_len; - memcpy(cpu->cpreg_vmstate_indexes, cpu->cpreg_indexes, - cpu->cpreg_array_len * sizeof(uint64_t)); - memcpy(cpu->cpreg_vmstate_values, cpu->cpreg_values, - cpu->cpreg_array_len * sizeof(uint64_t)); =20 return 0; } @@ -1001,6 +1005,9 @@ static int cpu_post_save(void *opaque) pmu_op_finish(&cpu->env); } =20 + cpu->cpreg_vmstate_indexes =3D NULL; + cpu->cpreg_vmstate_values =3D NULL; + return 0; } =20 @@ -1034,6 +1041,9 @@ static int cpu_pre_load(void *opaque) pmu_op_start(env); } =20 + g_assert(!cpu->cpreg_vmstate_indexes); + g_assert(!cpu->cpreg_vmstate_values); + return 0; } =20 @@ -1043,6 +1053,9 @@ static int cpu_post_load(void *opaque, int version_id) CPUARMState *env =3D &cpu->env; int i, v; =20 + trace_cpu_post_load(cpu->cpreg_vmstate_array_len, + cpu->cpreg_array_len); + /* * Handle migration compatibility from old QEMU which didn't * send the irq-line-state subsection. A QEMU without it did not @@ -1094,6 +1107,11 @@ static int cpu_post_load(void *opaque, int version_i= d) } } =20 + g_free(cpu->cpreg_vmstate_indexes); + g_free(cpu->cpreg_vmstate_values); + cpu->cpreg_vmstate_indexes =3D NULL; + cpu->cpreg_vmstate_values =3D NULL; + /* * Misaligned thumb pc is architecturally impossible. Fail the * incoming migration. For TCG it would trigger the assert in @@ -1167,16 +1185,17 @@ const VMStateDescription vmstate_arm_cpu =3D { VMSTATE_UINT32_ARRAY(env.fiq_regs, ARMCPU, 5), VMSTATE_UINT64_ARRAY(env.elr_el, ARMCPU, 4), VMSTATE_UINT64_ARRAY(env.sp_el, ARMCPU, 4), - /* The length-check must come before the arrays to avoid - * incoming data possibly overflowing the array. + /* + * The length must come before the arrays so we can + * allocate the arrays before their data arrives */ - VMSTATE_INT32_POSITIVE_LE(cpreg_vmstate_array_len, ARMCPU), - VMSTATE_VARRAY_INT32(cpreg_vmstate_indexes, ARMCPU, - cpreg_vmstate_array_len, - 0, vmstate_info_uint64, uint64_t), - VMSTATE_VARRAY_INT32(cpreg_vmstate_values, ARMCPU, - cpreg_vmstate_array_len, - 0, vmstate_info_uint64, uint64_t), + VMSTATE_INT32(cpreg_vmstate_array_len, ARMCPU), + VMSTATE_VARRAY_INT32_ALLOC(cpreg_vmstate_indexes, ARMCPU, + cpreg_vmstate_array_len, + 0, vmstate_info_uint64, uint64_t), + VMSTATE_VARRAY_INT32_ALLOC(cpreg_vmstate_values, ARMCPU, + cpreg_vmstate_array_len, + 0, vmstate_info_uint64, uint64_t), VMSTATE_UINT64(env.exclusive_addr, ARMCPU), VMSTATE_UINT64(env.exclusive_val, ARMCPU), VMSTATE_UINT64(env.exclusive_high, ARMCPU), diff --git a/target/arm/trace-events b/target/arm/trace-events index 676d29fe51..2de0406f78 100644 --- a/target/arm/trace-events +++ b/target/arm/trace-events @@ -26,3 +26,6 @@ arm_powerctl_reset_cpu(uint64_t mp_aff) "cpu %" PRIu64 =20 # tcg/psci.c and hvf/hvf.c arm_psci_call(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t= cpuid) "PSCI Call x0=3D0x%016"PRIx64" x1=3D0x%016"PRIx64" x2=3D0x%016"PRIx= 64" x3=3D0x%016"PRIx64" cpuid=3D0x%x" + +# machine.c +cpu_post_load(uint32_t cpreg_vmstate_array_len, uint32_t cpreg_array_len) = "cpreg_vmstate_array_len=3D%d cpreg_array_len=3D%d" diff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c index bb94eac7bf..c5b108166a 100644 --- a/target/arm/whpx/whpx-all.c +++ b/target/arm/whpx/whpx-all.c @@ -783,12 +783,6 @@ int whpx_init_vcpu(CPUState *cpu) sregs_match_len); arm_cpu->cpreg_values =3D g_renew(uint64_t, arm_cpu->cpreg_values, sregs_match_len); - arm_cpu->cpreg_vmstate_indexes =3D g_renew(uint64_t, - arm_cpu->cpreg_vmstate_indexe= s, - sregs_match_len); - arm_cpu->cpreg_vmstate_values =3D g_renew(uint64_t, - arm_cpu->cpreg_vmstate_values, - sregs_match_len); =20 memset(arm_cpu->cpreg_values, 0, sregs_match_len * sizeof(uint64_t)); =20 @@ -807,7 +801,6 @@ int whpx_init_vcpu(CPUState *cpu) } } arm_cpu->cpreg_array_len =3D sregs_cnt; - arm_cpu->cpreg_vmstate_array_len =3D sregs_cnt; =20 assert(write_cpustate_to_list(arm_cpu, false)); =20 --=20 2.43.0