From nobody Mon Apr 13 14:10:38 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1772802212; cv=none; d=zohomail.com; s=zohoarc; b=diXh1MSCBzWhQqydzXGspYOaRsY7jcD+OySdVNw0LqFK5wZ7bRQqCmCVuwQLX28k1okOOi4VBmIiBINfML+jkJX4yyCAa9ID1skhcAAagxF1e3NgAnnx/e29chFd01koeV7qRnwsf5muc/uiOLcCtjKwrAU41a1+RoyTFfh+ibU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1772802212; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=tMfc5M1If8pEChk/Of7Ll+7tUL5aBkqstS2wsEqiqgQ=; b=ca/VijUuwcrvP+eIPXpk13r142bhxv5tYCvzmQQ+dy88qqobRm1jQNLIW82dAbHHPXLOQizYgk86+MLDSjr3VsZ2fVoPDG158eZeVoXwfg4/d7USyqFm2ZPM4mBeZpg2PSsLBK+clHHghdCRRBediZyKf5tsBQ9YMi832fibZGg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 177280221297366.47399513011385; Fri, 6 Mar 2026 05:03:32 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vyUp4-0001jc-Oi; Fri, 06 Mar 2026 08:02:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vyUoj-0001OU-6S for qemu-devel@nongnu.org; Fri, 06 Mar 2026 08:02:09 -0500 Received: from p-west2-cluster2-host6-snip4-10.eps.apple.com ([57.103.68.243] helo=outbound.mr.icloud.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vyUog-0007AK-Lv for qemu-devel@nongnu.org; Fri, 06 Mar 2026 08:02:08 -0500 Received: from outbound.mr.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-west-2a-10-percent-1 (Postfix) with ESMTPS id 2B4941802E6A; Fri, 6 Mar 2026 13:02:04 +0000 (UTC) Received: from localhost.localdomain (unknown [17.57.152.38]) by p00-icloudmta-asmtp-us-west-2a-10-percent-1 (Postfix) with ESMTPSA id E48CE180084F; Fri, 6 Mar 2026 13:01:46 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; t=1772802125; x=1775394125; bh=tMfc5M1If8pEChk/Of7Ll+7tUL5aBkqstS2wsEqiqgQ=; h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme; b=GYY1MBx3vFXXQs8ppPn11GWxORhVLv986OQ2MflJp0JHl+pHvldIvnKKib6V+nzjgs6QsWrfu+Z8232QjiaJrtpsTXhN4PkcVJI1bV//m6qvWYa948TcJ5AqKRdrPSDG970CxDc5BOhKDp8euQtnv0LDr4wDok7RrnP7Or2UNTUxdskLLq2xuwW3eTnW4tS8rJqse2v4TNX8QJ4jf3bDlm7d7pxZAGMAexl6jwzw9Ga6YmcDa03GixSrrR5xywjSbDT4zhiaIhlhooLfjfauXJq62ThPgtho5zVn+yp32NWB4fKLBTj/kUrRCIagjGZ95/khoYxzafy5L3BOnxiBNQ== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org Cc: Cameron Esfahani , Phil Dennis-Jordan , Alexander Graf , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Paolo Bonzini , qemu-arm@nongnu.org, Manos Pitsidianakis , Peter Maydell , Roman Bolshakov , Mads Ynddal , Mohamed Mediouni Subject: [PATCH v15 14/17] hvf: sync registers used at EL2 Date: Fri, 6 Mar 2026 14:01:04 +0100 Message-ID: <20260306130107.35359-15-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260306130107.35359-1-mohamed@unpredictable.fr> References: <20260306130107.35359-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: PDz7k6mLOy_HqLNpZCYNC3tlpHk2rsKA X-Authority-Info-Out: v=2.4 cv=AoDjHe9P c=1 sm=1 tr=0 ts=69aad04d cx=c_apl:c_pps:t_out a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22 a=iuyuHyZKG8LmWTHPEAYA:9 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzA2MDEyNSBTYWx0ZWRfX8mJOrc6CrFmU sPq1redltlsANK3/KNtBV0+d4ZLmsuwYfDxMVcX5FblqhwEG+67jR1e2ZGS5E5fFSgAIu4zT9d6 wXt6igCQZ6mHhEwAyZsngXofJFAr+7bOf42v3juBsbYat6Y3NN+WOieNlAIzlG8jJIRCuL4/z9K 2uEig6XzntE7TO+0Ji/JP9VeGrnLbkat4KDnlH9R+Fm4Sp5T/hUn8+o49WeZowvO9ivgEK9a89q LUKvLfg6waDfORZn8DGCJ136WBAJ4fgpHho4RMec5m0sxwixqe3Xza0fsipMk1LzHtf26lUC5w1 XWslpE3QdDnCjhpQjtDvcvy9lL6+sl7WjgkHEKk4coXehxG1xTwxFCVFgjfBIE= X-Proofpoint-ORIG-GUID: PDz7k6mLOy_HqLNpZCYNC3tlpHk2rsKA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-06_04,2026-03-06_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 mlxlogscore=999 clxscore=1030 lowpriorityscore=0 suspectscore=0 malwarescore=0 mlxscore=0 phishscore=0 bulkscore=0 adultscore=0 spamscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2603060125 X-JNJ: AAAAAAABb7rPaEji7GZsaXKTgGzXAUsVkUs/KE9KsjEoSI1sKPoUUMcCcvDVVBuymbeUoIKLoiUjcDgT3ispMXG+5nHPEkBxgyO1RDI6DwTBNy0I6oRtrEcN/PNJbQZaUxi/j2gJMaMUQgn7+bhzecP8D6SHgvGLWbX+/V0TeRHaKg68vuZxw+hYrkUN4TFJvVnvJ7btuO9wIvnzN9hoeH5thLSw2L4j5vkXrgK5zjBUV0ewuFC/tS1Uc7i57yKdf0tKpy8+Deo9dRu3YCKVETn+fQrZcKCiGOp5yi6P8oNFz924rhKU90lfUqXlc3f863zYNzOKpqdBYqjV+PbE9sr5taCP1KlIzeZDoLSuP+JxPk8Y7wiLbop3mYsKtRgfduX/LTnjaLsQMvlEGjy1++PCs/2iSakHwFszQnEIt8h7dVe0Dpgfh0uVQKqcEyHIvMV20jQkcyUd70aFUZVIKBql82Qj4JQ/MzGdQmY0KZIEweIphlzROu9YaobZKSv8zYKlgF0B3/dBIYDU7W0MDFT6t8IPtvsrK4YZkJFWwjrNsx1a2H46pBs8aKJtbZ+n4BvVaqc6bd1MTe6S8P/8SfyzNkzrQWRs34VmRdkX9VobyUbRz7QHhWKQ4Ibjm/CNBQ7yDXPW+KwWo+dH/fEVFM2tKo/1f2NFIQu/QIQLc/lWNEVawqhoU36UKubkN5LfWaAQ9sZvkdYcWAWzAhlB9mhsoJ0brylNXBTvbdlOWWFUUK6WWUKWymeZcaX9JA== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.68.243; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.411, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.679, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1772802213655158500 Content-Type: text/plain; charset="utf-8" When starting up the VM at EL2, more sysregs are available. Sync the state = of those. In addition, sync the state of the EL1 physical timer when the vGIC is used= , even if running at EL1. However, no OS running at EL1 is expected to use those r= egisters. Signed-off-by: Mohamed Mediouni --- target/arm/hvf/hvf.c | 55 ++++++++++++++++++++++++++++++++----- target/arm/hvf/sysreg.c.inc | 44 +++++++++++++++++++++++++++++ 2 files changed, 92 insertions(+), 7 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index f8d5a4f596..6e41789ba8 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -473,31 +473,61 @@ static const struct hvf_reg_match hvf_sme2_preg_match= [] =3D { QEMU_BUILD_BUG_ON(HVF_ID !=3D KVMID_TO_HVF(KVMID_AA64_SYS_REG64(__VA_ARG= S__))); #define DEF_SYSREG_15_02(...) =20 +#define DEF_SYSREG_EL2(HVF_ID, ...) \ + QEMU_BUILD_BUG_ON(HVF_ID !=3D KVMID_TO_HVF(KVMID_AA64_SYS_REG64(__VA_ARG= S__))); + +#define DEF_SYSREG_VGIC(HVF_ID, ...) \ + QEMU_BUILD_BUG_ON(HVF_ID !=3D KVMID_TO_HVF(KVMID_AA64_SYS_REG64(__VA_ARG= S__))); + +#define DEF_SYSREG_VGIC_EL2(HVF_ID, ...) \ + QEMU_BUILD_BUG_ON(HVF_ID !=3D KVMID_TO_HVF(KVMID_AA64_SYS_REG64(__VA_ARG= S__))); + #include "sysreg.c.inc" =20 #undef DEF_SYSREG #undef DEF_SYSREG_15_02 +#undef DEF_SYSREG_EL2 +#undef DEF_SYSREG_VGIC +#undef DEF_SYSREG_VGIC_EL2 =20 -#define DEF_SYSREG(HVF_ID, op0, op1, crn, crm, op2) HVF_ID, +#define DEF_SYSREG(HVF_ID, op0, op1, crn, crm, op2) {HVF_ID}, #define DEF_SYSREG_15_02(...) +#define DEF_SYSREG_EL2(HVF_ID, op0, op1, crn, crm, op2) {HVF_ID, .el2 =3D= true}, +#define DEF_SYSREG_VGIC(HVF_ID, op0, op1, crn, crm, op2) {HVF_ID, .vgic = =3D true}, +#define DEF_SYSREG_VGIC_EL2(HVF_ID, op0, op1, crn, crm, op2) {HVF_ID, tru= e, true}, + +struct hvf_sreg { + hv_sys_reg_t sreg; + bool vgic; + bool el2; +}; =20 -static const hv_sys_reg_t hvf_sreg_list[] =3D { +static struct hvf_sreg hvf_sreg_list[] =3D { #include "sysreg.c.inc" }; =20 #undef DEF_SYSREG #undef DEF_SYSREG_15_02 +#undef DEF_SYSREG_EL2 +#undef DEF_SYSREG_VGIC +#undef DEF_SYSREG_VGIC_EL2 =20 #define DEF_SYSREG(...) -#define DEF_SYSREG_15_02(HVF_ID, op0, op1, crn, crm, op2) HVF_ID, +#define DEF_SYSREG_15_02(HVF_ID, op0, op1, crn, crm, op2) {HVF_ID}, +#define DEF_SYSREG_EL2(...) +#define DEF_SYSREG_VGIC(...) +#define DEF_SYSREG_VGIC_EL2(...) =20 API_AVAILABLE(macos(15.2)) -static const hv_sys_reg_t hvf_sreg_list_sme2[] =3D { +static struct hvf_sreg hvf_sreg_list_sme2[] =3D { #include "sysreg.c.inc" }; =20 #undef DEF_SYSREG #undef DEF_SYSREG_15_02 +#undef DEF_SYSREG_EL2 +#undef DEF_SYSREG_VGIC +#undef DEF_SYSREG_VGIC_EL2 =20 /* * For FEAT_SME2 migration, we need to store PSTATE.{SM,ZA} bits which are @@ -1308,6 +1338,9 @@ int hvf_arch_init_vcpu(CPUState *cpu) #define DEF_SYSREG_15_02(HVF_ID, ...) \ g_assert(HVF_ID =3D=3D KVMID_TO_HVF(KVMID_AA64_SYS_REG64(__VA_ARGS= __))); #define DEF_SYSREG(...) +#define DEF_SYSREG_EL2(...) +#define DEF_SYSREG_VGIC(...) +#define DEF_SYSREG_VGIC_EL2(...) =20 #include "sysreg.c.inc" =20 @@ -1334,12 +1367,20 @@ int hvf_arch_init_vcpu(CPUState *cpu) memset(arm_cpu->cpreg_values, 0, sregs_match_len * sizeof(uint64_t)); =20 /* Populate cp list for all known sysregs */ - for (i =3D 0; i < ARRAY_SIZE(hvf_sreg_list); i++) { - hv_sys_reg_t hvf_id =3D hvf_sreg_list[i]; + for (i =3D 0; i < sregs_match_len; i++) { + hv_sys_reg_t hvf_id =3D hvf_sreg_list[i].sreg; uint64_t kvm_id =3D HVF_TO_KVMID(hvf_id); uint32_t key =3D kvm_to_cpreg_id(kvm_id); const ARMCPRegInfo *ri =3D get_arm_cp_reginfo(arm_cpu->cp_regs, ke= y); =20 + if (hvf_sreg_list[i].vgic && !hvf_irqchip_in_kernel()) { + continue; + } + + if (hvf_sreg_list[i].el2 && !hvf_nested_virt_enabled()) { + continue; + } + if (ri) { assert(!(ri->type & ARM_CP_NO_RAW)); arm_cpu->cpreg_indexes[sregs_cnt++] =3D kvm_id; @@ -1348,7 +1389,7 @@ int hvf_arch_init_vcpu(CPUState *cpu) if (__builtin_available(macOS 15.2, *)) { if (hvf_arm_sme2_supported()) { for (i =3D 0; i < ARRAY_SIZE(hvf_sreg_list_sme2); i++) { - hv_sys_reg_t hvf_id =3D hvf_sreg_list_sme2[i]; + hv_sys_reg_t hvf_id =3D hvf_sreg_list_sme2[i].sreg; uint64_t kvm_id =3D HVF_TO_KVMID(hvf_id); uint32_t key =3D kvm_to_cpreg_id(kvm_id); const ARMCPRegInfo *ri =3D get_arm_cp_reginfo(arm_cpu->cp_= regs, key); diff --git a/target/arm/hvf/sysreg.c.inc b/target/arm/hvf/sysreg.c.inc index 7a2f880f78..c11dbf274e 100644 --- a/target/arm/hvf/sysreg.c.inc +++ b/target/arm/hvf/sysreg.c.inc @@ -153,3 +153,47 @@ DEF_SYSREG_15_02(HV_SYS_REG_ID_AA64ZFR0_EL1, 3, 0, 0, = 4, 4) DEF_SYSREG_15_02(HV_SYS_REG_ID_AA64SMFR0_EL1, 3, 0, 0, 4, 5) DEF_SYSREG_15_02(HV_SYS_REG_SMPRI_EL1, 3, 0, 1, 2, 4) DEF_SYSREG_15_02(HV_SYS_REG_SMCR_EL1, 3, 0, 1, 2, 6) +/* + * Block these because of the same issue as virtual counters in + * that caused the revert in 28b0ed32b32c7e5094cf2f1ec9c0645c65fad2aa + * + * DEF_SYSREG_VGIC(HV_SYS_REG_CNTP_CTL_EL0, 3, 3, 14, 2, 1) + * DEF_SYSREG_VGIC(HV_SYS_REG_CNTP_CVAL_EL0, 3, 3, 14, 2, 2) + */ +#ifdef SYNC_NO_RAW_REGS +DEF_SYSREG_VGIC(HV_SYS_REG_CNTP_TVAL_EL0, 3, 3, 14, 2, 0) +#endif + +/* + * Also block these because of the same issue as virtual counters in + * that caused the revert in 28b0ed32b32c7e5094cf2f1ec9c0645c65fad2aa + * + * DEF_SYSREG_VGIC_EL2(HV_SYS_REG_CNTHP_CVAL_EL2, 3, 4, 14, 2, 2) + * DEF_SYSREG_VGIC_EL2(HV_SYS_REG_CNTHP_CTL_EL2, 3, 4, 14, 2, 1) + */ +DEF_SYSREG_VGIC_EL2(HV_SYS_REG_CNTHCTL_EL2, 3, 4, 14, 1, 0) +#ifdef SYNC_NO_RAW_REGS +DEF_SYSREG_VGIC_EL2(HV_SYS_REG_CNTHP_TVAL_EL2, 3, 4, 14, 2, 0) +#endif +DEF_SYSREG_VGIC_EL2(HV_SYS_REG_CNTVOFF_EL2, 3, 4, 14, 0, 3) + +DEF_SYSREG_EL2(HV_SYS_REG_CPTR_EL2, 3, 4, 1, 1, 2) +DEF_SYSREG_EL2(HV_SYS_REG_ELR_EL2, 3, 4, 4, 0, 1) +DEF_SYSREG_EL2(HV_SYS_REG_ESR_EL2, 3, 4, 5, 2, 0) +DEF_SYSREG_EL2(HV_SYS_REG_FAR_EL2, 3, 4, 6, 0, 0) +DEF_SYSREG_EL2(HV_SYS_REG_HCR_EL2, 3, 4, 1, 1, 0) +DEF_SYSREG_EL2(HV_SYS_REG_HPFAR_EL2, 3, 4, 6, 0, 4) +DEF_SYSREG_EL2(HV_SYS_REG_MAIR_EL2, 3, 4, 10, 2, 0) +DEF_SYSREG_EL2(HV_SYS_REG_MDCR_EL2, 3, 4, 1, 1, 1) +DEF_SYSREG_EL2(HV_SYS_REG_SCTLR_EL2, 3, 4, 1, 0, 0) +DEF_SYSREG_EL2(HV_SYS_REG_SPSR_EL2, 3, 4, 4, 0, 0) +DEF_SYSREG_EL2(HV_SYS_REG_SP_EL2, 3, 6, 4, 1, 0) +DEF_SYSREG_EL2(HV_SYS_REG_TCR_EL2, 3, 4, 2, 0, 2) +DEF_SYSREG_EL2(HV_SYS_REG_TPIDR_EL2, 3, 4, 13, 0, 2) +DEF_SYSREG_EL2(HV_SYS_REG_TTBR0_EL2, 3, 4, 2, 0, 0) +DEF_SYSREG_EL2(HV_SYS_REG_TTBR1_EL2, 3, 4, 2, 0, 1) +DEF_SYSREG_EL2(HV_SYS_REG_VBAR_EL2, 3, 4, 12, 0, 0) +DEF_SYSREG_EL2(HV_SYS_REG_VMPIDR_EL2, 3, 4, 0, 0, 5) +DEF_SYSREG_EL2(HV_SYS_REG_VPIDR_EL2, 3, 4, 0, 0, 0) +DEF_SYSREG_EL2(HV_SYS_REG_VTCR_EL2, 3, 4, 2, 1, 2) +DEF_SYSREG_EL2(HV_SYS_REG_VTTBR_EL2, 3, 4, 2, 1, 0) --=20 2.50.1 (Apple Git-155)