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a="91448311" X-IronPort-AV: E=Sophos;i="6.23,104,1770624000"; d="scan'208";a="91448311" X-CSE-ConnectionGUID: UxDkJC3YRCa3fPvyNUxZ3w== X-CSE-MsgGUID: ni954tg0TrSEM0seCbwgqw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,104,1770624000"; d="scan'208";a="215613394" From: Zhenzhong Duan To: qemu-devel@nongnu.org Cc: alex@shazbot.org, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com, jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com, skolothumtho@nvidia.com, joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com, xudong.hao@intel.com, Zhenzhong Duan Subject: [PATCH v1 09/13] intel_iommu: Handle PASID entry removal for system reset Date: Thu, 5 Mar 2026 22:44:03 -0500 Message-ID: <20260306034409.184873-10-zhenzhong.duan@intel.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260306034409.184873-1-zhenzhong.duan@intel.com> References: <20260306034409.184873-1-zhenzhong.duan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=192.198.163.8; envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.892, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.622, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1772768729685154100 Content-Type: text/plain; charset="utf-8" When system level reset, DMA translation is turned off, all PASID entries become stale and should be deleted. vtd_hiod list is never accessed without BQL, so no need to guard with iommu lock. Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu_accel.h | 5 +++++ hw/i386/intel_iommu.c | 2 ++ hw/i386/intel_iommu_accel.c | 13 +++++++++++++ 3 files changed, 20 insertions(+) diff --git a/hw/i386/intel_iommu_accel.h b/hw/i386/intel_iommu_accel.h index a77fd06fe0..914c690c26 100644 --- a/hw/i386/intel_iommu_accel.h +++ b/hw/i386/intel_iommu_accel.h @@ -28,6 +28,7 @@ void vtd_flush_host_piotlb_all_locked(IntelIOMMUState *s,= uint16_t domain_id, uint32_t pasid, hwaddr addr, uint64_t npages, bool ih); void vtd_pasid_cache_sync_accel(IntelIOMMUState *s, VTDPASIDCacheInfo *pc_= info); +void vtd_pasid_cache_reset_accel(IntelIOMMUState *s); void vtd_iommu_ops_update_accel(PCIIOMMUOps *ops); #else static inline bool vtd_check_hiod_accel(IntelIOMMUState *s, @@ -62,6 +63,10 @@ static inline void vtd_pasid_cache_sync_accel(IntelIOMMU= State *s, { } =20 +static inline void vtd_pasid_cache_reset_accel(IntelIOMMUState *s) +{ +} + static inline void vtd_iommu_ops_update_accel(PCIIOMMUOps *ops) { } diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 984adc639a..b7d487bf5a 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -391,6 +391,8 @@ static void vtd_reset_caches(IntelIOMMUState *s) vtd_reset_context_cache_locked(s); vtd_pasid_cache_reset_locked(s); vtd_iommu_unlock(s); + + vtd_pasid_cache_reset_accel(s); } =20 static uint64_t vtd_get_iotlb_gfn(hwaddr addr, uint32_t level) diff --git a/hw/i386/intel_iommu_accel.c b/hw/i386/intel_iommu_accel.c index 5a956af916..c1890ca0a5 100644 --- a/hw/i386/intel_iommu_accel.c +++ b/hw/i386/intel_iommu_accel.c @@ -497,6 +497,19 @@ void vtd_pasid_cache_sync_accel(IntelIOMMUState *s, VT= DPASIDCacheInfo *pc_info) } } =20 +/* Fake a gloal pasid cache invalidation to remove all pasid cache entries= */ +void vtd_pasid_cache_reset_accel(IntelIOMMUState *s) +{ + VTDPASIDCacheInfo pc_info =3D { .type =3D VTD_INV_DESC_PASIDC_G_GLOBAL= }; + VTDHostIOMMUDevice *vtd_hiod; + GHashTableIter as_it; + + g_hash_table_iter_init(&as_it, s->vtd_host_iommu_dev); + while (g_hash_table_iter_next(&as_it, NULL, (void **)&vtd_hiod)) { + vtd_pasid_cache_invalidate(vtd_hiod, &pc_info); + } +} + static uint64_t vtd_get_host_iommu_quirks(uint32_t type, void *caps, uint32_t size) { --=20 2.47.3