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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1772733441; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mKePMXJ23K95Z+XGzEiwD/uekCNOWTuhbyJ3uK6SLdg=; b=Rz9ecnumQ3+IJ3/r8gzcqrW5I+IvOyPLGHgFkJsS7big9X+I0SeZCE0GMfrpUVDA/Sw+mq utIO/l+KBxv32N/S1OsiOtPVxm/zyzzCupiSm9LGoECwsCfUjLdCcThEwFIteEXzORqWyi Nxgvw5rxy3uJcEkU79Fb6HWWjbDi2Ug= X-MC-Unique: EvCFO36yN0OmmYuH8489Gg-1 X-Mimecast-MFC-AGG-ID: EvCFO36yN0OmmYuH8489Gg_1772733437 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Jamin Lin , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PULL 01/38] hw/i2c/aspeed_i2c: Fix DMA64 address handling Date: Thu, 5 Mar 2026 18:56:34 +0100 Message-ID: <20260305175711.1119025-2-clg@redhat.com> In-Reply-To: <20260305175711.1119025-1-clg@redhat.com> References: <20260305175711.1119025-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -5 X-Spam_score: -0.6 X-Spam_bar: / X-Spam_report: (-0.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.892, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.622, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1772733478126154100 From: Jamin Lin The current code updates the upper 32 bits of dma_dram_offset only when aic->has_dma64 is false, which is incorrect. If aic->has_dma64 is true, the controller supports 64-bit DMA addressing and the upper 32-bit DMA address register must be used to update the dma_dram_offset accordingly. Fix the condition so that the upper 32 bits are updated only when 64-bit DMA is supported. Fixes: efea7ddb4689a1ac4bce63a9ddb32887c7f3ac50 ("hw/i2c/aspeed_i2c: Fix DM= A moving data into incorrect address") Signed-off-by: Jamin Lin Reviewed-by: C=C3=A9dric Le Goater Link: https://lore.kernel.org/qemu-devel/20260224073207.985162-1-jamin_lin@= aspeedtech.com Signed-off-by: C=C3=A9dric Le Goater --- hw/i2c/aspeed_i2c.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c index 122bfdd63dca..8022938f3478 100644 --- a/hw/i2c/aspeed_i2c.c +++ b/hw/i2c/aspeed_i2c.c @@ -237,7 +237,7 @@ static void aspeed_i2c_set_tx_dma_dram_offset(AspeedI2C= Bus *bus) bus->dma_dram_offset =3D deposit64(bus->dma_dram_offset, 0, 32, FIELD_EX32(value, I2CM_DMA_TX_ADDR, ADDR)); - if (!aic->has_dma64) { + if (aic->has_dma64) { value =3D bus->regs[R_I2CM_DMA_TX_ADDR_HI]; bus->dma_dram_offset =3D deposit64(bus->dma_dram_offset, 32, 32, @@ -262,7 +262,7 @@ static void aspeed_i2c_set_rx_dma_dram_offset(AspeedI2C= Bus *bus) bus->dma_dram_offset =3D deposit64(bus->dma_dram_offset, 0, 32, FIELD_EX32(value, I2CM_DMA_RX_ADDR, ADDR)); - if (!aic->has_dma64) { + if (aic->has_dma64) { value =3D bus->regs[R_I2CM_DMA_RX_ADDR_HI]; bus->dma_dram_offset =3D deposit64(bus->dma_dram_offset, 32, 32, --=20 2.53.0