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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1772733478; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mqw39E/eN3Hl6vfY2SrffLmWqTKqLStb0rAb47goL50=; b=LNEIb3hA+JNy2QpkTUChxHT/ENFRof5qrVdQDjoR4WXZqRGwNKKNpKnSTEr/hL1fQejrg8 Z/lQkJnklF0Ic7nllNbltfUkWyMRRK5OIr9xPCyknFJtdJsGsBKxge57Kx3WRVf+zIqX5B IY7+VNkAASqjnHiJBCZYtlLOvIfKjOw= X-MC-Unique: TZoLH7nRPnWhnBz2YS6cNA-1 X-Mimecast-MFC-AGG-ID: TZoLH7nRPnWhnBz2YS6cNA_1772733468 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Jamin Lin , Joe Komlodi , Patrick Venture , Titus Rwantare , Jithu Joseph , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PULL 12/38] hw/i3c/dw-i3c: Use 32 bits on MMIO writes Date: Thu, 5 Mar 2026 18:56:45 +0100 Message-ID: <20260305175711.1119025-13-clg@redhat.com> In-Reply-To: <20260305175711.1119025-1-clg@redhat.com> References: <20260305175711.1119025-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -5 X-Spam_score: -0.6 X-Spam_bar: / X-Spam_report: (-0.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.892, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.622, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1772733665056158500 From: Jamin Lin The registers are only 32 bits wide, so we should cast the 64-bit value passed in to only be 32 bits wide. Signed-off-by: Joe Komlodi Reviewed-by: Patrick Venture Reviewed-by: Titus Rwantare Reviewed-by: Jamin Lin Signed-off-by: Jamin Lin Tested-by: Jithu Joseph Link: https://lore.kernel.org/qemu-devel/20260225021158.1586584-12-jamin_li= n@aspeedtech.com Signed-off-by: C=C3=A9dric Le Goater --- hw/i3c/dw-i3c.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/i3c/dw-i3c.c b/hw/i3c/dw-i3c.c index eeaf1125e41c..7ca99fb87e44 100644 --- a/hw/i3c/dw-i3c.c +++ b/hw/i3c/dw-i3c.c @@ -363,10 +363,11 @@ static void dw_i3c_write(void *opaque, hwaddr offset,= uint64_t value, { DWI3C *s =3D DW_I3C(opaque); uint32_t addr =3D offset >> 2; + uint32_t val32 =3D (uint32_t)value; =20 trace_dw_i3c_write(s->id, offset, value); =20 - value &=3D ~dw_i3c_ro[addr]; + val32 &=3D ~dw_i3c_ro[addr]; switch (addr) { case R_HW_CAPABILITY: case R_RESPONSE_QUEUE_PORT: @@ -392,7 +393,7 @@ static void dw_i3c_write(void *opaque, hwaddr offset, u= int64_t value, case R_RESET_CTRL: break; default: - s->regs[addr] =3D value; + s->regs[addr] =3D val32; break; } } --=20 2.53.0