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a=ed25519-sha256; t=1772751314; l=9903; i=anjo@rev.ng; s=20260210; h=from:subject:message-id; bh=bP5w4Uw4mtobEQawfD2dhbdBX6swNEHwuIIjzpmZsR0=; b=B3FVtHh1uF0UVfAKvZC+Xun0kRW2I4Nu7SLvGWJGrP7Dap4BCxBhungJ1MJDB64smyXMgtcBs 6ytxbUfDRPQBSApOcYxBmx8eA+80BxsdLtfyGv7ohOk7/n/6i211VPm X-Developer-Key: i=anjo@rev.ng; a=ed25519; pk=dKsZvj/g3kgDxnV1/SWg8a0YNGSpWtFGNsWIepQYKow= Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=94.130.142.21; envelope-from=anjo@rev.ng; helo=rev.ng X-Spam_score_int: -5 X-Spam_score: -0.6 X-Spam_bar: / X-Spam_report: (-0.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.892, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.622, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Anton Johansson From: Anton Johansson via qemu development Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1772751108993154100 Restructures the CPU class heirarchy to clarify model names and allow for per-model configuration options via HPPACPUDef. 32-bit HPPA is assumed to run a PA-7300LC, and 64-bit assumed to run a PA-8700. A new PA-8500 model is added, which will later be used by the A400 machine. All CPU models are made into children of the now abstract TYPE_HPPA_CPU base class. Two fields are added to HPPACPUDef describing the size of the physical address space, and whether or not the CPU uses the PA-RISC 2.0 architecture. The latter was previously a field in CPUHPPAState. phys_addr_bits is currently set but unused, and will be used in the following commit. Likewise, PA-8700 is moved to use 44 bit physical addresses in a followup commit to not break bisection. References to "hppa/hppa64" models in test cases are also updated. Reviewed-by: Helge Deller Signed-off-by: Anton Johansson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/hppa/cpu-qom.h | 8 ++++++- target/hppa/cpu.h | 24 ++++++++++++++++---- hw/hppa/machine.c | 21 ++++++++++------- linux-user/hppa/elfload.c | 2 +- target/hppa/cpu.c | 50 +++++++++++++++++++++++++++++++------= ---- tests/qtest/machine-none-test.c | 2 +- 6 files changed, 80 insertions(+), 27 deletions(-) diff --git a/target/hppa/cpu-qom.h b/target/hppa/cpu-qom.h index 5c454bf543..7541c25b3d 100644 --- a/target/hppa/cpu-qom.h +++ b/target/hppa/cpu-qom.h @@ -23,7 +23,13 @@ #include "hw/core/cpu.h" =20 #define TYPE_HPPA_CPU "hppa-cpu" -#define TYPE_HPPA64_CPU "hppa64-cpu" + +#define HPPA_CPU_TYPE_SUFFIX "-" TYPE_HPPA_CPU +#define HPPA_CPU_TYPE_NAME(name) (name HPPA_CPU_TYPE_SUFFIX) + +#define TYPE_HPPA_CPU_PA_7300LC HPPA_CPU_TYPE_NAME("pa-7300lc") +#define TYPE_HPPA_CPU_PA_8500 HPPA_CPU_TYPE_NAME("pa-8500") +#define TYPE_HPPA_CPU_PA_8700 HPPA_CPU_TYPE_NAME("pa-8700") =20 OBJECT_DECLARE_CPU_TYPE(HPPACPU, HPPACPUClass, HPPA_CPU) =20 diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 092e647ccf..43b4882fb4 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -270,8 +270,6 @@ typedef struct CPUArchState { /* Fields up to this point are cleared by a CPU reset */ struct {} end_reset_fields; =20 - bool is_pa20; - target_ulong kernel_entry; /* Linux kernel was loaded here */ target_ulong cmdline_or_bootorder; target_ulong initrd_base, initrd_end; @@ -290,6 +288,18 @@ struct ArchCPU { QEMUTimer *alarm_timer; }; =20 +/** + * HPPACPUDef: + * @phys_addr_bits: Number of bits in the physical address space. + * @is_pa20: Whether the CPU model follows the PA-RISC 2.0 or 1.1 spec. + * + * Configuration options for a HPPA CPU model. + */ +typedef struct HPPACPUDef { + uint8_t phys_addr_bits; + bool is_pa20; +} HPPACPUDef; + /** * HPPACPUClass: * @parent_realize: The parent class' realize handler. @@ -302,11 +312,17 @@ struct HPPACPUClass { =20 DeviceRealize parent_realize; ResettablePhases parent_phases; + const HPPACPUDef *def; }; =20 -static inline bool hppa_is_pa20(const CPUHPPAState *env) +static inline const HPPACPUDef *hppa_def(CPUHPPAState *env) +{ + return HPPA_CPU_GET_CLASS(env_cpu(env))->def; +} + +static inline bool hppa_is_pa20(CPUHPPAState *env) { - return env->is_pa20; + return hppa_def(env)->is_pa20; } =20 static inline int HPPA_BTLB_ENTRIES(CPUHPPAState *env) diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index f55e84529f..5d0d4de09e 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -801,13 +801,13 @@ static void hppa_machine_common_class_init(ObjectClas= s *oc, const void *data) static void HP_B160L_machine_init_class_init(ObjectClass *oc, const void *= data) { static const char * const valid_cpu_types[] =3D { - TYPE_HPPA_CPU, + TYPE_HPPA_CPU_PA_7300LC, NULL }; MachineClass *mc =3D MACHINE_CLASS(oc); =20 mc->desc =3D "HP B160L workstation"; - mc->default_cpu_type =3D TYPE_HPPA_CPU; + mc->default_cpu_type =3D TYPE_HPPA_CPU_PA_7300LC; mc->valid_cpu_types =3D valid_cpu_types; mc->init =3D machine_HP_B160L_init; mc->is_default =3D true; @@ -817,13 +817,13 @@ static void HP_B160L_machine_init_class_init(ObjectCl= ass *oc, const void *data) static void HP_C3700_machine_init_class_init(ObjectClass *oc, const void *= data) { static const char * const valid_cpu_types[] =3D { - TYPE_HPPA64_CPU, + TYPE_HPPA_CPU_PA_8700, NULL }; MachineClass *mc =3D MACHINE_CLASS(oc); =20 mc->desc =3D "HP C3700 workstation"; - mc->default_cpu_type =3D TYPE_HPPA64_CPU; + mc->default_cpu_type =3D TYPE_HPPA_CPU_PA_8700; mc->valid_cpu_types =3D valid_cpu_types; mc->init =3D machine_HP_C3700_init; mc->max_cpus =3D HPPA_MAX_CPUS; @@ -833,13 +833,13 @@ static void HP_C3700_machine_init_class_init(ObjectCl= ass *oc, const void *data) static void HP_A400_machine_init_class_init(ObjectClass *oc, const void *d= ata) { static const char * const valid_cpu_types[] =3D { - TYPE_HPPA64_CPU, + TYPE_HPPA_CPU_PA_8500, NULL }; MachineClass *mc =3D MACHINE_CLASS(oc); =20 mc->desc =3D "HP A400-44 workstation"; - mc->default_cpu_type =3D TYPE_HPPA64_CPU; + mc->default_cpu_type =3D TYPE_HPPA_CPU_PA_8500; mc->valid_cpu_types =3D valid_cpu_types; mc->init =3D machine_HP_A400_init; mc->max_cpus =3D HPPA_MAX_CPUS; @@ -849,13 +849,18 @@ static void HP_A400_machine_init_class_init(ObjectCla= ss *oc, const void *data) static void HP_715_machine_init_class_init(ObjectClass *oc, const void *da= ta) { static const char * const valid_cpu_types[] =3D { - TYPE_HPPA_CPU, + TYPE_HPPA_CPU_PA_7300LC, NULL }; MachineClass *mc =3D MACHINE_CLASS(oc); =20 mc->desc =3D "HP 715/64 workstation"; - mc->default_cpu_type =3D TYPE_HPPA_CPU; + /* + * Although the 715 workstation should use a 7100LC, it can be safely + * modeled as a 7300LC as the difference is a moving of the L1 data ca= che + * to on-chip. + */ + mc->default_cpu_type =3D TYPE_HPPA_CPU_PA_7300LC; mc->valid_cpu_types =3D valid_cpu_types; mc->init =3D machine_HP_715_init; /* can only support up to max. 8 CPUs due inventory major numbers */ diff --git a/linux-user/hppa/elfload.c b/linux-user/hppa/elfload.c index 4600708702..7f7ece6dc1 100644 --- a/linux-user/hppa/elfload.c +++ b/linux-user/hppa/elfload.c @@ -8,7 +8,7 @@ =20 const char *get_elf_cpu_model(uint32_t eflags) { - return "hppa"; + return "pa-7300lc"; } =20 const char *get_elf_platform(CPUState *cs) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 714f3bbdaf..cc755da8be 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -203,13 +203,6 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error= **errp) tcg_cflags_set(cs, CF_PCREL); } =20 -static void hppa_cpu_initfn(Object *obj) -{ - CPUHPPAState *env =3D cpu_env(CPU(obj)); - - env->is_pa20 =3D !!object_dynamic_cast(obj, TYPE_HPPA64_CPU); -} - static void hppa_cpu_reset_hold(Object *obj, ResetType type) { HPPACPUClass *scc =3D HPPA_CPU_GET_CLASS(obj); @@ -236,9 +229,14 @@ static void hppa_cpu_reset_hold(Object *obj, ResetType= type) =20 static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model) { - g_autofree char *typename =3D g_strconcat(cpu_model, "-cpu", NULL); + ObjectClass *oc; + char *typename; =20 - return object_class_by_name(typename); + typename =3D g_strdup_printf(HPPA_CPU_TYPE_NAME("%s"), cpu_model); + oc =3D object_class_by_name(typename); + g_free(typename); + + return oc; } =20 #ifndef CONFIG_USER_ONLY @@ -279,6 +277,14 @@ static const TCGCPUOps hppa_tcg_ops =3D { #endif /* !CONFIG_USER_ONLY */ }; =20 +static void hppa_cpu_class_base_init(ObjectClass *oc, const void *data) +{ + HPPACPUClass *acc =3D HPPA_CPU_CLASS(oc); + /* Make sure all CPU models define a HPPACPUDef */ + g_assert(!object_class_is_abstract(oc) && data !=3D NULL); + acc->def =3D data; +} + static void hppa_cpu_class_init(ObjectClass *oc, const void *data) { DeviceClass *dc =3D DEVICE_CLASS(oc); @@ -313,14 +319,34 @@ static const TypeInfo hppa_cpu_type_infos[] =3D { .parent =3D TYPE_CPU, .instance_size =3D sizeof(HPPACPU), .instance_align =3D __alignof(HPPACPU), - .instance_init =3D hppa_cpu_initfn, - .abstract =3D false, + .abstract =3D true, .class_size =3D sizeof(HPPACPUClass), .class_init =3D hppa_cpu_class_init, + .class_base_init =3D hppa_cpu_class_base_init, + }, + { + .name =3D TYPE_HPPA_CPU_PA_7300LC, + .parent =3D TYPE_HPPA_CPU, + .class_data =3D &(const HPPACPUDef) { + .phys_addr_bits =3D 32, + .is_pa20 =3D false, + }, + }, + { + .name =3D TYPE_HPPA_CPU_PA_8500, + .parent =3D TYPE_HPPA_CPU, + .class_data =3D &(const HPPACPUDef) { + .phys_addr_bits =3D 40, + .is_pa20 =3D true, + }, }, { - .name =3D TYPE_HPPA64_CPU, + .name =3D TYPE_HPPA_CPU_PA_8700, .parent =3D TYPE_HPPA_CPU, + .class_data =3D &(const HPPACPUDef) { + .phys_addr_bits =3D 40, + .is_pa20 =3D true, + }, }, }; =20 diff --git a/tests/qtest/machine-none-test.c b/tests/qtest/machine-none-tes= t.c index c1e22dcecc..bafd7d660e 100644 --- a/tests/qtest/machine-none-test.c +++ b/tests/qtest/machine-none-test.c @@ -47,7 +47,7 @@ static struct arch2cpu cpus_map[] =3D { { "tricore", "tc1796" }, { "xtensa", "dc233c" }, { "xtensaeb", "fsf" }, - { "hppa", "hppa" }, + { "hppa", "pa-7300lc" }, { "riscv64", "rv64" }, { "riscv32", "rv32" }, { "rx", "rx62n" }, --=20 2.52.0