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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1772447815; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=S7hdK2T2rhmDCPf6n3Eg8p5Wr+WAP8uwwd7SD8gK1RA=; b=BELndcV1N3HfB4/t9pvWMKT/gvRpRbzk43eXnjdHKW4lClBnQq4w96F1wLIi+Hy0ubonZM 8mT3xcmU4JsMY3O3wuGEqGJ/fT16K9hywrPsRas/kpxiBjf8XNHR/ovD2OrIOxIHwvm93o 0BCo1fJ1xK9g6hQqGdwKNFwSgiVcHKk= X-MC-Unique: cgu0EvQxNU6Mc71-aMnsnA-1 X-Mimecast-MFC-AGG-ID: cgu0EvQxNU6Mc71-aMnsnA_1772447811 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, cohuck@redhat.com, sebott@redhat.com, peterx@redhat.com, philmd@linaro.org, alex.bennee@linaro.org Subject: [PATCH v7 1/7] target/arm/machine: Fix detection of unknown incoming cpregs Date: Mon, 2 Mar 2026 11:35:23 +0100 Message-ID: <20260302103640.1362564-2-eric.auger@redhat.com> In-Reply-To: <20260302103640.1362564-1-eric.auger@redhat.com> References: <20260302103640.1362564-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Currently the check of cpreg index matches fail to detect a situation where the length of both arrays is same but - destination has an extra register not found in the incoming stream (idx1) - source has an extra register not found in the destination (idx2) where idx1 < =3D idx2 Normally this should fail but it does not. Fix the logic to scan all indexes. Signed-off-by: Eric Auger Fixes: 721fae12536 ("target-arm: Convert TCG to using (index,value) list fo= r cp migration") Reviewed-by: Sebastian Ott --- target/arm/machine.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/target/arm/machine.c b/target/arm/machine.c index 7a3b5a87932..9297a8f5b41 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -1107,6 +1107,29 @@ static int cpu_post_load(void *opaque, int version_i= d) i++; v++; } + /* + * if we have reached the end of the incoming array but there are + * still regs in cpreg, continue parsing the regs which are missing + * in the input stream + */ + for ( ; i < cpu->cpreg_array_len; i++) { + g_autofree gchar *name =3D print_register_name(cpu->cpreg_indexes[= i]); + + warn_report("%s: %s " + "expected by the destination but not in the incoming s= tream, " + "skip it", __func__, name); + } + /* + * if we have reached the end of the cpreg array but there are + * still regs in the input stream, continue parsing the vmstate array + */ + for ( ; v < cpu->cpreg_vmstate_array_len; v++) { + g_autofree gchar *name =3D print_register_name(cpu->cpreg_vmstate_= indexes[v]); + + error_report("%s: %s in the incoming stream but unknown on the des= tination, " + "fail migration", __func__, name); + fail =3D true; + } if (fail) { return -1; } --=20 2.53.0 From nobody Sat Apr 11 23:08:09 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1772447912; cv=none; d=zohomail.com; s=zohoarc; b=Zw1qdunBAe2XVQa37jLLLzfTM8eeENALfVt4BLE7v/ExVqBed9mbN3mJVvJrZtOA0AwhprP7W4SCSQKA66M+9QcL5d6rCxQrttWtlv36qUIG+0wuMua6t9cm5YnHJjvUqB4gAVjDyvM8PjLKj+KP4frqUqfsxzBaE/4gcOysvb0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1772447912; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; 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Mon, 2 Mar 2026 10:36:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1772447820; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bo/UriJHsBloEjShz/XFZtX2zVln7mAsy/2g8XzXh1M=; b=Dg09XsVnKnJ9BmiHbAMWw0MbASl7smYGlIOYWTBrxrDYEtMzKVVMzL6AM1odOTUyUnDDUN zYqekZO72nTr2FY1l2OK0MICZTfLHybsSY+yPRkov3z53bxU3dDhJxap4qy0fe4coQen6g h3sUq3lLTrQdNFO3rBpfSEvVCdyvAMU= X-MC-Unique: C7q5wqodMyOKARmtj8RB8w-1 X-Mimecast-MFC-AGG-ID: C7q5wqodMyOKARmtj8RB8w_1772447814 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, cohuck@redhat.com, sebott@redhat.com, peterx@redhat.com, philmd@linaro.org, alex.bennee@linaro.org Subject: [PATCH v7 2/7] target/arm/cpu: Introduce the infrastructure for cpreg migration tolerances Date: Mon, 2 Mar 2026 11:35:24 +0100 Message-ID: <20260302103640.1362564-3-eric.auger@redhat.com> In-Reply-To: <20260302103640.1362564-1-eric.auger@redhat.com> References: <20260302103640.1362564-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" We introduce a datatype for a tolerance with respect to a given cpreg migration issue. The tolerance applies to a given cpreg kvm index, and can be of different types: - ToleranceNotOnBothEnds (cpreg index is allowed to be only on one end) - ToleranceDiffInMask (value differences are allowed only within a mask) - ToleranceFieldLT (incoming field value must be less than a given value) - ToleranceFieldGT (incoming field value must be greater than a given value) A QLIST of such tolerances can be populated using a new helper: arm_register_cpreg_mig_tolerance() and arm_cpu_cpreg_has_mig_tolerance() allows to check whether a tolerance exists for a given kvm index. callers for those helpers will be introduced in subsequent patches. Signed-off-by: Eric Auger --- target/arm/cpu.h | 32 +++++++++++++++++++++ target/arm/cpu.c | 75 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 107 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 657ff4ab20b..9dcc838f611 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -843,6 +843,21 @@ struct ARMELChangeHook { QLIST_ENTRY(ARMELChangeHook) node; }; =20 +typedef enum { + ToleranceNotOnBothEnds, + ToleranceDiffInMask, + ToleranceFieldLT, + ToleranceFieldGT, +} ARMCPUCPREGMigToleranceType; + +typedef struct ARMCPUCPREGMigTolerance { + uint64_t kvmidx; + uint64_t mask; + uint64_t value; + ARMCPUCPREGMigToleranceType type; + QLIST_ENTRY(ARMCPUCPREGMigTolerance) node; +} ARMCPUCPREGMigTolerance; + /* These values map onto the return values for * QEMU_PSCI_0_2_FN_AFFINITY_INFO */ typedef enum ARMPSCIState { @@ -1139,6 +1154,7 @@ struct ArchCPU { =20 QLIST_HEAD(, ARMELChangeHook) pre_el_change_hooks; QLIST_HEAD(, ARMELChangeHook) el_change_hooks; + QLIST_HEAD(, ARMCPUCPREGMigTolerance) cpreg_mig_tolerances; =20 int32_t node_id; /* NUMA node this CPU belongs to */ =20 @@ -2632,6 +2648,22 @@ void arm_register_pre_el_change_hook(ARMCPU *cpu, AR= MELChangeHookFn *hook, void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook, void *opaque); =20 +/** + * arm_register_cpreg_mig_tolerance: + * Register a migration tolerance wrt one given cpreg identified by its + * @kvmidx. Only one tolerance can be registered by kvm reg idx. + */ +void arm_register_cpreg_mig_tolerance(ARMCPU *cpu, uint64_t kvmidx, + uint64_t mask, uint64_t value, + ARMCPUCPREGMigToleranceType type); + +/** + * arm_cpu_cpreg_has_mig_tolerance: + * Check whether a tolerance of type @type exists for a given @kvmidx + */ +bool arm_cpu_cpreg_has_mig_tolerance(ARMCPU *cpu, uint64_t kvmidx, + uint64_t vmstate_value, uint64_t loca= l_value, + ARMCPUCPREGMigToleranceType type); /** * arm_rebuild_hflags: * Rebuild the cached TBFLAGS for arbitrary changed processor state. diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 10f8280eef2..167f78cee13 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -181,6 +181,75 @@ void arm_register_el_change_hook(ARMCPU *cpu, ARMELCha= ngeHookFn *hook, QLIST_INSERT_HEAD(&cpu->el_change_hooks, entry, node); } =20 +void arm_register_cpreg_mig_tolerance(ARMCPU *cpu, uint64_t kvmidx, + uint64_t mask, uint64_t value, + ARMCPUCPREGMigToleranceType type) +{ + ARMCPUCPREGMigTolerance *t, *entry; + + /* make sure the kvmidx has not tolerance already registered */ + QLIST_FOREACH(t, &cpu->cpreg_mig_tolerances, node) { + if (t->kvmidx =3D=3D kvmidx) { + g_assert_not_reached(); + } + } + entry =3D g_new0(ARMCPUCPREGMigTolerance, 1); + + entry->kvmidx =3D kvmidx; + entry->mask =3D mask; + entry->value =3D value; + entry->type =3D type; + + QLIST_INSERT_HEAD(&cpu->cpreg_mig_tolerances, entry, node); +} + +bool arm_cpu_cpreg_has_mig_tolerance(ARMCPU *cpu, uint64_t kvmidx, + uint64_t vmstate_value, uint64_t loca= l_value, + ARMCPUCPREGMigToleranceType type) +{ + ARMCPUCPREGMigTolerance *t; + uint64_t diff, diff_outside_mask, field; + bool found =3D false; + + QLIST_FOREACH(t, &cpu->cpreg_mig_tolerances, node) { + if (t->kvmidx =3D=3D kvmidx) { + found =3D true; + break; + } + } + if (!found) { + return false; + } + + /* we found one tolerance associated to the @kvmidx */ + + if (type =3D=3D ToleranceNotOnBothEnds) { + return true; + } + + /* Need to check mask */ + diff =3D vmstate_value ^ local_value; + diff_outside_mask =3D diff & ~t->mask; + + if (diff_outside_mask) { + /* there are differences outside of the mask */ + return false; + } + if (type =3D=3D ToleranceDiffInMask) { + /* differences only in the field, tolerance granted */ + return true; + } + /* need to compare field value against authorized ones */ + field =3D vmstate_value & t->mask; + if (type =3D=3D ToleranceFieldLT && (field < t->value)) { + return true; + } + if (type =3D=3D ToleranceFieldGT && (field > t->value)) { + return true; + } + return false; +} + static void cp_reg_reset(gpointer key, gpointer value, gpointer opaque) { /* Reset a single ARMCPRegInfo register */ @@ -1106,6 +1175,7 @@ static void arm_cpu_initfn(Object *obj) =20 QLIST_INIT(&cpu->pre_el_change_hooks); QLIST_INIT(&cpu->el_change_hooks); + QLIST_INIT(&cpu->cpreg_mig_tolerances); =20 #ifdef CONFIG_USER_ONLY # ifdef TARGET_AARCH64 @@ -1548,6 +1618,7 @@ static void arm_cpu_finalizefn(Object *obj) { ARMCPU *cpu =3D ARM_CPU(obj); ARMELChangeHook *hook, *next; + ARMCPUCPREGMigTolerance *t, *n; =20 g_hash_table_destroy(cpu->cp_regs); =20 @@ -1559,6 +1630,10 @@ static void arm_cpu_finalizefn(Object *obj) QLIST_REMOVE(hook, node); g_free(hook); } + QLIST_FOREACH_SAFE(t, &cpu->cpreg_mig_tolerances, node, n) { + QLIST_REMOVE(t, node); + g_free(t); + } #ifndef CONFIG_USER_ONLY if (cpu->pmu_timer) { timer_free(cpu->pmu_timer); --=20 2.53.0 From nobody Sat Apr 11 23:08:09 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1772447879; cv=none; d=zohomail.com; s=zohoarc; b=D+Me5uBI79zfZGSoysrfdTZXmI7SEXQdOYlU5Mwey3iTOgNqlTdt39w6L+QhXRbWEuDmvDwR/M06E6FkcjJBSCsRI3p4zLP0NmDkq6XWgZzyv41w4zx9WEBwAhOLyn/n0jomaNoh7XxrL/ZN3pMDaSwVMobLMcLVxDYNlMnkvqo= ARC-Message-Signature: i=1; a=rsa-sha256; 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Mon, 2 Mar 2026 10:36:58 +0000 (UTC) Received: from laptop.redhat.com (unknown [10.44.32.23]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 144181800666; Mon, 2 Mar 2026 10:36:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1772447823; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sKLoRoIQCgZ0YUK0eGLnjmDfdwRAbjP+XkZjC4Q6bw8=; b=RgGThNvG/BzmkDEdCmJBRWil4VfqgqNJEiAjcTFiGPIu6PwEZfHFLUzOQY2v+BXPgntmGh D6uD+ssMsYtPvDtvApQaIhk+8xzbcZFkV4ZE5kE0VTTEioy1rB9u7d/YDOdpK4NyqGg/ZT 2/JtNmdV177036uvPpx5s5pLDY9SkF4= X-MC-Unique: XlscyT2hMmOD5CDO-hlMBQ-1 X-Mimecast-MFC-AGG-ID: XlscyT2hMmOD5CDO-hlMBQ_1772447818 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, cohuck@redhat.com, sebott@redhat.com, peterx@redhat.com, philmd@linaro.org, alex.bennee@linaro.org Subject: [PATCH v7 3/7] target/arm/machine: Take account cpreg mig tolerances in case of mismatch Date: Mon, 2 Mar 2026 11:35:25 +0100 Message-ID: <20260302103640.1362564-4-eric.auger@redhat.com> In-Reply-To: <20260302103640.1362564-1-eric.auger@redhat.com> References: <20260302103640.1362564-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" If there is a mismatch between the cpreg indexes found on both ends, check whether a tolerance was registered for the given kvmidx. If any, silence warning/errors. Create dedicated helper functions that print the name of the culprit reg and analyze whether a tolerance is set. According set the level of traces and analyze whether the migration must eventually fail. Signed-off-by: Eric Auger --- target/arm/machine.c | 67 +++++++++++++++++++++++++++-------------- target/arm/trace-events | 2 ++ 2 files changed, 47 insertions(+), 22 deletions(-) diff --git a/target/arm/machine.c b/target/arm/machine.c index 9297a8f5b41..abc66448cef 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -1046,6 +1046,45 @@ static gchar *print_register_name(uint64_t kvm_regid= x) } } =20 +/* + * Handle the situation where @kvmidx is on destination but not + * in the incoming stream. This never fails the migration. + */ +static void handle_cpreg_missing_in_incoming_stream(ARMCPU *cpu, uint64_t = kvmidx) +{ + g_autofree gchar *name =3D print_register_name(kvmidx); + + if (!arm_cpu_cpreg_has_mig_tolerance(cpu, kvmidx, + 0, 0, ToleranceNotOnBothEnds)) { + warn_report("%s: %s " + "expected by the destination but not in the incoming s= tream, " + "skip it", __func__, name); + } else { + trace_tolerate_cpreg_missing_in_incoming_stream(name); + } +} + +/* + * Handle the situation where @kvmidx is in the incoming + * stream but not on destination. This fails the migration if + * no cpreg mig tolerance is set for this @kvmidx + */ +static bool handle_cpreg_only_in_incoming_stream(ARMCPU *cpu, uint64_t kvm= idx) +{ + g_autofree gchar *name =3D print_register_name(kvmidx); + bool fail =3D false; + + if (!arm_cpu_cpreg_has_mig_tolerance(cpu, kvmidx, + 0, 0, ToleranceNotOnBothEnds)) { + error_report("%s: %s in the incoming stream but unknown on the " + "destination, fail migration", __func__, name); + fail =3D true; + } else { + trace_tolerate_cpreg_only_in_incoming_stream(name); + } + return fail; +} + static int cpu_post_load(void *opaque, int version_id) { ARMCPU *cpu =3D opaque; @@ -1085,21 +1124,12 @@ static int cpu_post_load(void *opaque, int version_= id) for (i =3D 0, v =3D 0; i < cpu->cpreg_array_len && v < cpu->cpreg_vmstate_array_len;) { if (cpu->cpreg_vmstate_indexes[v] > cpu->cpreg_indexes[i]) { - g_autofree gchar *name =3D print_register_name(cpu->cpreg_inde= xes[i]); - - warn_report("%s: %s " - "expected by the destination but not in the incomi= ng stream, " - "skip it", __func__, name); - i++; + handle_cpreg_missing_in_incoming_stream(cpu, cpu->cpreg_indexe= s[i++]); continue; } if (cpu->cpreg_vmstate_indexes[v] < cpu->cpreg_indexes[i]) { - g_autofree gchar *name =3D print_register_name(cpu->cpreg_vmst= ate_indexes[v]); - - error_report("%s: %s in the incoming stream but unknown on the= destination, " - "fail migration", __func__, name); - v++; - fail =3D true; + fail =3D handle_cpreg_only_in_incoming_stream(cpu, + cpu->cpreg_vmstate= _indexes[v++]); continue; } /* matching register, copy the value over */ @@ -1113,22 +1143,15 @@ static int cpu_post_load(void *opaque, int version_= id) * in the input stream */ for ( ; i < cpu->cpreg_array_len; i++) { - g_autofree gchar *name =3D print_register_name(cpu->cpreg_indexes[= i]); - - warn_report("%s: %s " - "expected by the destination but not in the incoming s= tream, " - "skip it", __func__, name); + handle_cpreg_missing_in_incoming_stream(cpu, cpu->cpreg_indexes[i]= ); } /* * if we have reached the end of the cpreg array but there are * still regs in the input stream, continue parsing the vmstate array */ for ( ; v < cpu->cpreg_vmstate_array_len; v++) { - g_autofree gchar *name =3D print_register_name(cpu->cpreg_vmstate_= indexes[v]); - - error_report("%s: %s in the incoming stream but unknown on the des= tination, " - "fail migration", __func__, name); - fail =3D true; + fail =3D handle_cpreg_only_in_incoming_stream(cpu, + cpu->cpreg_vmstate_ind= exes[v]); } if (fail) { return -1; diff --git a/target/arm/trace-events b/target/arm/trace-events index 2de0406f784..dceb3c63f77 100644 --- a/target/arm/trace-events +++ b/target/arm/trace-events @@ -29,3 +29,5 @@ arm_psci_call(uint64_t x0, uint64_t x1, uint64_t x2, uint= 64_t x3, uint32_t cpuid =20 # machine.c cpu_post_load(uint32_t cpreg_vmstate_array_len, uint32_t cpreg_array_len) = "cpreg_vmstate_array_len=3D%d cpreg_array_len=3D%d" +tolerate_cpreg_missing_in_incoming_stream(char *name) "cpreg %s is missing= in incoming stream but this is explicitly tolerated" +tolerate_cpreg_only_in_incoming_stream(char *name) "cpreg %s is in incomin= g stream but not on destination but this is explicitly tolerated" --=20 2.53.0 From nobody Sat Apr 11 23:08:09 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1772447826; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RQxnhT5J3QqrSoHRFSNPnaFQaxtiBW7Sm65CLDXn9LU=; b=KjQ3o9F5xPCzs8HbXhryaDbAXWBAnehfsScvaFhjdn9IJBufrjMwW1F7Mpg82uCBs0OLf9 nk0BZGufObCjcRbMycG7lCFoZ853spTOyRSetMJGbDoXMA746V8d5rig8RlDkCBrbwIxW9 LyOR4o+gfa79FcoF3I2Dz/JQodhR3hY= X-MC-Unique: EK0ZNf0ZN_OtUmMaS7khyg-1 X-Mimecast-MFC-AGG-ID: EK0ZNf0ZN_OtUmMaS7khyg_1772447821 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, cohuck@redhat.com, sebott@redhat.com, peterx@redhat.com, philmd@linaro.org, alex.bennee@linaro.org Subject: [PATCH v7 4/7] target/arm/cpu64: Mitigate migration failures due to spurious TCR_EL1, PIRE0_EL1 and PIR_EL1 Date: Mon, 2 Mar 2026 11:35:26 +0100 Message-ID: <20260302103640.1362564-5-eric.auger@redhat.com> In-Reply-To: <20260302103640.1362564-1-eric.auger@redhat.com> References: <20260302103640.1362564-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: 24 X-Spam_score: 2.4 X-Spam_bar: ++ X-Spam_report: (2.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, RCVD_IN_SBL_CSS=3.335, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.012, RCVD_IN_VALIDITY_RPBL_BLOCKED=1.188, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1772447928612158500 Before linux v6.13 those registers were erroneously unconditionally exposed and this was fixed by commits: - 0fcb4eea5345 ("KVM: arm64: Hide TCR2_EL1 from userspace when disabled for guests") - a68cddbe47ef=C2=A0("KVM: arm64: Hide S1PIE registers from userspace when disabled for guests") in v6.13. This means if we migrate from an old kernel host to a >=3D 6.13 kernel host, migration currently fails. Declare cpreg migration tolerance for those registers. Signed-off-by: Eric Auger --- target/arm/cpu64.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index dec430c48b9..9e64184f6f0 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -794,10 +794,36 @@ static void aarch64_a53_initfn(Object *obj) define_cortex_a72_a57_a53_cp_reginfo(cpu); } =20 +static void kvm_arm_set_cpreg_mig_tolerances(ARMCPU *cpu) +{ + /* + * Registers that may be in the incoming stream and not exposed + * on the destination + */ + + /* + * TCR_EL1 was erroneously unconditionnally exposed before linux v6.13. + * See commit 0fcb4eea5345 ("KVM: arm64: Hide TCR2_EL1 from userspace + * when disabled for guests") + */ + arm_register_cpreg_mig_tolerance(cpu, ARM64_SYS_REG(3, 0, 2, 0, 3), + 0, 0, ToleranceNotOnBothEnds); + /* + * PIRE0_EL1 and PIR_EL1 were erroneously unconditionnally exposed + * before linux v6.13. See commit a68cddbe47ef=C2=A0("KVM: arm64: Hide + * S1PIE registers from userspace when disabled for guests") + */ + arm_register_cpreg_mig_tolerance(cpu, ARM64_SYS_REG(3, 0, 10, 2, 2), + 0, 0, ToleranceNotOnBothEnds); + arm_register_cpreg_mig_tolerance(cpu, ARM64_SYS_REG(3, 0, 10, 2, 3), + 0, 0, ToleranceNotOnBothEnds); +} + static void aarch64_host_initfn(Object *obj) { ARMCPU *cpu =3D ARM_CPU(obj); #if defined(CONFIG_KVM) + kvm_arm_set_cpreg_mig_tolerances(cpu); kvm_arm_set_cpu_features_from_host(cpu); if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { aarch64_add_sve_properties(obj); --=20 2.53.0 From nobody Sat Apr 11 23:08:09 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1772447929; cv=none; d=zohomail.com; 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Mon, 2 Mar 2026 10:37:05 +0000 (UTC) Received: from laptop.redhat.com (unknown [10.44.32.23]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 1A2831800666; Mon, 2 Mar 2026 10:37:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1772447829; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gqwIlq9YsCC/mk/RbZ2jJbZEoXtp/RnqPmOFKrdWkWY=; b=BMBcy9cnja/2vy5/WFjkPz1O9FHIgO6OI5K4oxrQFF+6tfvFTpKnmuk6DvUYAEXvKxJQaF DOit5LQHTTLCNmR2WX0DsQD9xalJ+JLRsTbTEwEsUcGwLO/8J8ByN3bgMk4sBH0yPie3Zr xIBdu8utiw0YERzMgvUM3paxq+SAoIc= X-MC-Unique: qgevpJmTOymKrMbyLzaddw-1 X-Mimecast-MFC-AGG-ID: qgevpJmTOymKrMbyLzaddw_1772447825 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, cohuck@redhat.com, sebott@redhat.com, peterx@redhat.com, philmd@linaro.org, alex.bennee@linaro.org Subject: [PATCH v7 5/7] target/arm/cpu64: Define cpreg migration tolerance for KVM_REG_ARM_VENDOR_HYP_BMAP_2 Date: Mon, 2 Mar 2026 11:35:27 +0100 Message-ID: <20260302103640.1362564-6-eric.auger@redhat.com> In-Reply-To: <20260302103640.1362564-1-eric.auger@redhat.com> References: <20260302103640.1362564-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" KVM_REG_ARM_VENDOR_HYP_BMAP_2 pseudo FW register is exposed from v6.15 onwards. Backward migration from a >=3D v6.15 to an older kernel would fail without cpreg migration tolerance definition for this register. Signed-off-by: Eric Auger --- target/arm/cpu64.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 9e64184f6f0..0a61edb27f6 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -817,6 +817,14 @@ static void kvm_arm_set_cpreg_mig_tolerances(ARMCPU *c= pu) 0, 0, ToleranceNotOnBothEnds); arm_register_cpreg_mig_tolerance(cpu, ARM64_SYS_REG(3, 0, 10, 2, 3), 0, 0, ToleranceNotOnBothEnds); + + /* + * KVM_REG_ARM_VENDOR_HYP_BMAP_2 pseudo FW register is exposed + * from v6.15 onwards. Backward migration from a >=3D v6.15 to an older + * kernel would fail without cpreg migration tolerance definition + */ + arm_register_cpreg_mig_tolerance(cpu, KVM_REG_ARM_FW_FEAT_BMAP_REG(3), + 0, 0, ToleranceNotOnBothEnds); } =20 static void aarch64_host_initfn(Object *obj) --=20 2.53.0 From nobody Sat Apr 11 23:08:09 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1772447924; cv=none; d=zohomail.com; s=zohoarc; b=M6i6mvp5mzEAy/0POIjywthzeDIvZaDRpyL/JdxyULUYaFAC5OmC/XCT8urVjw+UtuKfinnpv4RWj2jaifP8wLwuOBjeUvB9liKqZeSL/97mAjG3gEuBqvs30JmYCppfmsFnUuBwl4oPJ46lP4VKBBSje6dN5+irYM66yGJMogk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1772447924; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; 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Mon, 2 Mar 2026 10:37:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1772447833; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=iyKs2XjxalZIh1rEgOJiZBWSDMGmfe3TX4GJ7G8ZqkQ=; b=MlDhAvAdy6achPMpb+W4nJmmeUZJjXoteofvh7zeLI7kV0HL61o+ZK4TskhLwaD4FIhYWm KnnaZYVNct5/s90skRkucdIMP3u/Lbi2dcxY9BZSJr7g166oIVMEGt026xfGTAnsU9CfaW JAqUfmLp2SkdoyXx/0/JJSmUl/Wdl8o= X-MC-Unique: L--x-rIZOJ-8HCkq0YeSpw-1 X-Mimecast-MFC-AGG-ID: L--x-rIZOJ-8HCkq0YeSpw_1772447828 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, cohuck@redhat.com, sebott@redhat.com, peterx@redhat.com, philmd@linaro.org, alex.bennee@linaro.org Subject: [PATCH v7 6/7] target/arm/helper: Define cpreg migration tolerance for DGBDTR_EL0 Date: Mon, 2 Mar 2026 11:35:28 +0100 Message-ID: <20260302103640.1362564-7-eric.auger@redhat.com> In-Reply-To: <20260302103640.1362564-1-eric.auger@redhat.com> References: <20260302103640.1362564-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" We want to remove AArch32 DBGDTRTX which was erroneously exposed. This was attempted by 655659a74a36b ("target/arm: Correct encoding of Debug Communications Channel registers") but it was discovered that the removal of this debug register broke forward migration on TCG. Now we have the cpreg migration tolerance infrastructure, we can declare one for the DBGDTRTX. This allow to revert the reinstate patch. Signed-off-by: Eric Auger --- target/arm/helper.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index 7389f2988c4..3cba62705dc 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6426,9 +6426,14 @@ void register_cp_regs_for_features(ARMCPU *cpu) .fgt =3D FGT_CLIDR_EL1, .resetvalue =3D GET_IDREG(isar, CLIDR) }; + uint64_t dbgtr_el0_kvmidx =3D + cpreg_to_kvm_id(ENCODE_CP_REG(14, 0, 1, 0, 5, 3, 0)); + define_one_arm_cp_reg(cpu, &clidr); define_arm_cp_regs(cpu, v7_cp_reginfo); define_debug_regs(cpu); + arm_register_cpreg_mig_tolerance(cpu, dbgtr_el0_kvmidx, + 0, 0, ToleranceNotOnBothEnds); } else { define_arm_cp_regs(cpu, not_v7_cp_reginfo); } --=20 2.53.0 From nobody Sat Apr 11 23:08:09 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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b=I0hVsbnKBhedMvLopUpLB7QXbtkG1ioru/mjr1MtQbOaOcoN2kCxic3lSDteXV8uFjLD4z bzTaFvaigL8Hmco6fXZj7Zqh0TTNSJ9P9dVKDoFMzWZpvfTHm+M2ekRH4lbBE/SB5wegM5 8WTRU6iXmcTpY4A97pyzbLpF3OPDv7k= X-MC-Unique: OGlhv3JaMFOawjb6rUfIrA-1 X-Mimecast-MFC-AGG-ID: OGlhv3JaMFOawjb6rUfIrA_1772447832 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, cohuck@redhat.com, sebott@redhat.com, peterx@redhat.com, philmd@linaro.org, alex.bennee@linaro.org Subject: [PATCH v7 7/7] Revert "target/arm: Reinstate bogus AArch32 DBGDTRTX register for migration compat" Date: Mon, 2 Mar 2026 11:35:29 +0100 Message-ID: <20260302103640.1362564-8-eric.auger@redhat.com> In-Reply-To: <20260302103640.1362564-1-eric.auger@redhat.com> References: <20260302103640.1362564-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" This reverts commit 4f2b82f60431 ("target/arm: Reinstate bogus AArch32 DBGDTRTX register for migration compat). We don't need that commit anymore as the AArch32 DBGDTRTX register is declared to be safe to ignore in the incoming migration stream. Signed-off-by: Eric Auger --- target/arm/debug_helper.c | 29 ----------------------------- 1 file changed, 29 deletions(-) diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c index 352c8e5c8e7..8477ca5def6 100644 --- a/target/arm/debug_helper.c +++ b/target/arm/debug_helper.c @@ -171,13 +171,6 @@ static void dbgclaimclr_write(CPUARMState *env, const = ARMCPRegInfo *ri, env->cp15.dbgclaim &=3D ~(value & 0xFF); } =20 -static CPAccessResult access_bogus(CPUARMState *env, const ARMCPRegInfo *r= i, - bool isread) -{ - /* Always UNDEF, as if this cpreg didn't exist */ - return CP_ACCESS_UNDEFINED; -} - static const ARMCPRegInfo debug_cp_reginfo[] =3D { /* * DBGDRAR, DBGDSAR: always RAZ since we don't implement memory mapped @@ -240,28 +233,6 @@ static const ARMCPRegInfo debug_cp_reginfo[] =3D { .opc0 =3D 2, .opc1 =3D 3, .crn =3D 0, .crm =3D 4, .opc2 =3D 0, .access =3D PL0_RW, .accessfn =3D access_tdcc, .type =3D ARM_CP_CONST, .resetvalue =3D 0 }, - /* - * This is not a real AArch32 register. We used to incorrectly expose - * this due to a QEMU bug; to avoid breaking migration compatibility we - * need to continue to provide it so that we don't fail the inbound - * migration when it tells us about a sysreg that we don't have. - * We set an always-fails .accessfn, which means that the guest doesn't - * actually see this register (it will always UNDEF, identically to if - * there were no cpreg definition for it other than that we won't print - * a LOG_UNIMP message about it), and we set the ARM_CP_NO_GDB flag so= the - * gdbstub won't see it either. - * (We can't just set .access =3D 0, because add_cpreg_to_hashtable() - * helpfully ignores cpregs which aren't accessible to the highest - * implemented EL.) - * - * TODO: implement a system for being able to describe "this register - * can be ignored if it appears in the inbound stream"; then we can - * remove this temporary hack. - */ - { .name =3D "BOGUS_DBGDTR_EL0", .state =3D ARM_CP_STATE_AA32, - .cp =3D 14, .opc1 =3D 3, .crn =3D 0, .crm =3D 5, .opc2 =3D 0, - .access =3D PL0_RW, .accessfn =3D access_bogus, - .type =3D ARM_CP_CONST | ARM_CP_NO_GDB, .resetvalue =3D 0 }, /* * OSECCR_EL1 provides a mechanism for an operating system * to access the contents of EDECCR. EDECCR is not implemented though, --=20 2.53.0