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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.706, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.401, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1772224829707158500 From: Brian Cain Co-authored-by: Sid Manning Signed-off-by: Brian Cain --- target/hexagon/cpu_helper.h | 8 +++++ target/hexagon/helper.h | 3 +- target/hexagon/cpu.c | 1 - target/hexagon/cpu_helper.c | 70 +++++++++++++++++++++++++++++++++++++ target/hexagon/op_helper.c | 28 ++++++++++----- target/hexagon/meson.build | 1 + 6 files changed, 100 insertions(+), 11 deletions(-) create mode 100644 target/hexagon/cpu_helper.c diff --git a/target/hexagon/cpu_helper.h b/target/hexagon/cpu_helper.h index 8c79a4cea13..3d7238c3b06 100644 --- a/target/hexagon/cpu_helper.h +++ b/target/hexagon/cpu_helper.h @@ -7,6 +7,14 @@ #ifndef HEXAGON_CPU_HELPER_H #define HEXAGON_CPU_HELPER_H =20 +uint32_t hexagon_get_pmu_counter(CPUHexagonState *cur_env, int index); +uint64_t hexagon_get_sys_pcycle_count(CPUHexagonState *env); +uint32_t hexagon_get_sys_pcycle_count_low(CPUHexagonState *env); +uint32_t hexagon_get_sys_pcycle_count_high(CPUHexagonState *env); +void hexagon_set_sys_pcycle_count(CPUHexagonState *env, uint64_t); +void hexagon_set_sys_pcycle_count_low(CPUHexagonState *env, uint32_t); +void hexagon_set_sys_pcycle_count_high(CPUHexagonState *env, uint32_t); + static inline void arch_set_thread_reg(CPUHexagonState *env, uint32_t reg, uint32_t val) { diff --git a/target/hexagon/helper.h b/target/hexagon/helper.h index 04c01649683..9ca87acfe63 100644 --- a/target/hexagon/helper.h +++ b/target/hexagon/helper.h @@ -121,8 +121,7 @@ DEF_HELPER_2(sreg_read, i32, env, i32) DEF_HELPER_2(sreg_read_pair, i64, env, i32) DEF_HELPER_2(greg_read, i32, env, i32) DEF_HELPER_2(greg_read_pair, i64, env, i32) -DEF_HELPER_3(sreg_write, void, env, i32, i32) -DEF_HELPER_3(sreg_write_pair, void, env, i32, i64) +DEF_HELPER_3(sreg_write_masked, void, env, i32, i32) DEF_HELPER_3(setprio, void, env, i32, i32) DEF_HELPER_2(start, void, env, i32) DEF_HELPER_1(stop, void, env) diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index a8f2f9e238a..1010fa866b5 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -338,7 +338,6 @@ static void hexagon_cpu_realize(DeviceState *dev, Error= **errp) =20 qemu_init_vcpu(cs); cpu_reset(cs); - mcc->parent_realize(dev, errp); } =20 diff --git a/target/hexagon/cpu_helper.c b/target/hexagon/cpu_helper.c new file mode 100644 index 00000000000..8e11cbb20dd --- /dev/null +++ b/target/hexagon/cpu_helper.c @@ -0,0 +1,70 @@ +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "cpu.h" +#include "cpu_helper.h" +#include "system/cpus.h" +#ifdef CONFIG_USER_ONLY +#include "qemu.h" +#include "exec/helper-proto.h" +#else +#include "hw/core/boards.h" +#include "hw/hexagon/hexagon.h" +#endif +#include "exec/cpu-interrupt.h" +#include "exec/target_page.h" +#include "accel/tcg/cpu-ldst.h" +#include "exec/cputlb.h" +#include "qemu/log.h" +#include "tcg/tcg-op.h" +#include "internal.h" +#include "macros.h" +#include "sys_macros.h" +#include "arch.h" + + +#ifndef CONFIG_USER_ONLY + +uint32_t hexagon_get_pmu_counter(CPUHexagonState *cur_env, int index) +{ + g_assert_not_reached(); +} + +uint64_t hexagon_get_sys_pcycle_count(CPUHexagonState *env) +{ + g_assert_not_reached(); +} + +uint32_t hexagon_get_sys_pcycle_count_high(CPUHexagonState *env) +{ + g_assert_not_reached(); +} + +uint32_t hexagon_get_sys_pcycle_count_low(CPUHexagonState *env) +{ + g_assert_not_reached(); +} + +void hexagon_set_sys_pcycle_count_high(CPUHexagonState *env, + uint32_t cycles_hi) +{ + g_assert_not_reached(); +} + +void hexagon_set_sys_pcycle_count_low(CPUHexagonState *env, + uint32_t cycles_lo) +{ + g_assert_not_reached(); +} + +void hexagon_set_sys_pcycle_count(CPUHexagonState *env, uint64_t cycles) +{ + g_assert_not_reached(); +} + + +#endif diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c index 6754c491ff5..9b9655da961 100644 --- a/target/hexagon/op_helper.c +++ b/target/hexagon/op_helper.c @@ -19,9 +19,10 @@ #include "qemu/log.h" #include "accel/tcg/cpu-ldst.h" #include "accel/tcg/probe.h" +#include "qemu/main-loop.h" +#include "cpu.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" -#include "cpu.h" #include "internal.h" #include "macros.h" #include "sys_macros.h" @@ -1451,25 +1452,36 @@ void HELPER(setimask)(CPUHexagonState *env, uint32_= t pred, uint32_t imask) g_assert_not_reached(); } =20 -void HELPER(sreg_write)(CPUHexagonState *env, uint32_t reg, uint32_t val) +void HELPER(sreg_write_masked)(CPUHexagonState *env, uint32_t reg, uint32_= t val) { - g_assert_not_reached(); + BQL_LOCK_GUARD(); + arch_set_system_reg_masked(env, reg, val); } =20 -void HELPER(sreg_write_pair)(CPUHexagonState *env, uint32_t reg, uint64_t = val) - +static inline QEMU_ALWAYS_INLINE uint32_t sreg_read(CPUHexagonState *env, + uint32_t reg) { - g_assert_not_reached(); + g_assert(bql_locked()); + if (reg < HEX_SREG_GLB_START) { + return env->t_sreg[reg]; + } + HexagonCPU *cpu =3D env_archcpu(env); + return cpu->globalregs ? + hexagon_globalreg_read(cpu->globalregs, reg, env->threadId) : 0; } =20 uint32_t HELPER(sreg_read)(CPUHexagonState *env, uint32_t reg) { - g_assert_not_reached(); + BQL_LOCK_GUARD(); + return sreg_read(env, reg); } =20 uint64_t HELPER(sreg_read_pair)(CPUHexagonState *env, uint32_t reg) { - g_assert_not_reached(); + BQL_LOCK_GUARD(); + + return deposit64((uint64_t) sreg_read(env, reg), 32, 32, + sreg_read(env, reg + 1)); } =20 uint32_t HELPER(greg_read)(CPUHexagonState *env, uint32_t reg) diff --git a/target/hexagon/meson.build b/target/hexagon/meson.build index 528beca3cd0..9aabf5dd3c1 100644 --- a/target/hexagon/meson.build +++ b/target/hexagon/meson.build @@ -240,6 +240,7 @@ hexagon_ss.add(files( 'cpu.c', 'translate.c', 'op_helper.c', + 'cpu_helper.c', 'gdbstub.c', 'genptr.c', 'reg_fields.c', --=20 2.34.1