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Correct this to reset both FIFOs. Cc: qemu-stable@nongnu.org Signed-off-by: Weixie Cui Reviewed-by: Thomas Huth Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson Message-id: 20260223095905.67709-1-cuiweixie@gmail.com [Rewrote commit message] Signed-off-by: Peter Maydell --- hw/ssi/xilinx_spips.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index a4718fb72d..f6e717bc01 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -369,7 +369,7 @@ static void xilinx_spips_reset(DeviceState *d) memset(s->regs, 0, sizeof(s->regs)); =20 fifo8_reset(&s->rx_fifo); - fifo8_reset(&s->rx_fifo); + fifo8_reset(&s->tx_fifo); /* non zero resets */ s->regs[R_CONFIG] |=3D MODEFAIL_GEN_EN; s->regs[R_SLAVE_IDLE_COUNT] =3D 0xFF; @@ -397,7 +397,7 @@ static void xlnx_zynqmp_qspips_reset(DeviceState *d) memset(s->regs, 0, sizeof(s->regs)); =20 fifo8_reset(&s->rx_fifo_g); - fifo8_reset(&s->rx_fifo_g); + fifo8_reset(&s->tx_fifo_g); fifo32_reset(&s->fifo_g); s->regs[R_INTR_STATUS] =3D R_INTR_STATUS_RESET; s->regs[R_GPIO] =3D 1; --=20 2.43.0