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charset="utf-8" Introduce a SMMUv3AccelCmdqvType enum and a helper to query the CMDQV implementation type associated with an accelerated SMMUv3 instance. A subsequent patch will use this helper when generating the Tegra241 CMDQV DSDT. Signed-off-by: Shameer Kolothum --- hw/arm/smmuv3-accel.h | 7 +++++++ hw/arm/smmuv3-accel-stubs.c | 5 +++++ hw/arm/smmuv3-accel.c | 12 ++++++++++++ hw/arm/tegra241-cmdqv.c | 6 ++++++ 4 files changed, 30 insertions(+) diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h index c349981e79..6d21788006 100644 --- a/hw/arm/smmuv3-accel.h +++ b/hw/arm/smmuv3-accel.h @@ -15,6 +15,11 @@ #include #endif =20 +typedef enum SMMUv3AccelCmdqvType { + SMMUV3_CMDQV_NONE =3D 0, + SMMUV3_CMDQV_TEGRA241, +} SMMUv3AccelCmdqvType; + /* * CMDQ-Virtualization (CMDQV) hardware support, extends the SMMUv3 to * support multiple VCMDQs with virtualization capabilities. @@ -30,6 +35,7 @@ typedef struct SMMUv3AccelCmdqvOps { void (*free_viommu)(SMMUv3State *s); bool (*alloc_veventq)(SMMUv3State *s, Error **errp); void (*free_veventq)(SMMUv3State *s); + SMMUv3AccelCmdqvType (*get_type)(void); void (*reset)(SMMUv3State *s); } SMMUv3AccelCmdqvOps; =20 @@ -73,5 +79,6 @@ bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **e= rrp); bool smmuv3_accel_event_read_validate(IOMMUFDVeventq *veventq, uint32_t ty= pe, void *buf, size_t size, Error **errp= ); void smmuv3_accel_reset(SMMUv3State *s); +SMMUv3AccelCmdqvType smmuv3_accel_cmdqv_type(Object *obj); =20 #endif /* HW_ARM_SMMUV3_ACCEL_H */ diff --git a/hw/arm/smmuv3-accel-stubs.c b/hw/arm/smmuv3-accel-stubs.c index 1d5d3bb10c..5ca94d605f 100644 --- a/hw/arm/smmuv3-accel-stubs.c +++ b/hw/arm/smmuv3-accel-stubs.c @@ -55,3 +55,8 @@ void smmuv3_accel_idr_override(SMMUv3State *s) void smmuv3_accel_reset(SMMUv3State *s) { } + +SMMUv3AccelCmdqvType smmuv3_accel_cmdqv_type(Object *obj) +{ + return SMMUV3_CMDQV_NONE; +} diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c index 9a570b8af9..585b460943 100644 --- a/hw/arm/smmuv3-accel.c +++ b/hw/arm/smmuv3-accel.c @@ -998,6 +998,18 @@ static void smmuv3_accel_as_init(SMMUv3State *s) address_space_init(shared_as_sysmem, &root, "smmuv3-accel-as-sysmem"); } =20 +SMMUv3AccelCmdqvType smmuv3_accel_cmdqv_type(Object *obj) +{ + SMMUv3State *s =3D ARM_SMMUV3(obj); + SMMUv3AccelState *accel =3D s->s_accel; + + if (!accel || !accel->cmdqv_ops || !accel->cmdqv_ops->get_type) { + return SMMUV3_CMDQV_NONE; + } + + return accel->cmdqv_ops->get_type(); +} + bool smmuv3_accel_init(SMMUv3State *s, Error **errp) { SMMUState *bs =3D ARM_SMMU(s); diff --git a/hw/arm/tegra241-cmdqv.c b/hw/arm/tegra241-cmdqv.c index a379341c0a..42d7dbfde7 100644 --- a/hw/arm/tegra241-cmdqv.c +++ b/hw/arm/tegra241-cmdqv.c @@ -736,6 +736,11 @@ static bool tegra241_cmdqv_init(SMMUv3State *s, Error = **errp) return true; } =20 +static SMMUv3AccelCmdqvType tegra241_cmdqv_get_type(void) +{ + return SMMUV3_CMDQV_TEGRA241; +}; + static bool tegra241_cmdqv_probe(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *i= dev, Error **errp) { @@ -778,6 +783,7 @@ static const SMMUv3AccelCmdqvOps tegra241_cmdqv_ops =3D= { .free_viommu =3D tegra241_cmdqv_free_viommu, .alloc_veventq =3D tegra241_cmdqv_alloc_veventq, .free_veventq =3D tegra241_cmdqv_free_veventq, + .get_type =3D tegra241_cmdqv_get_type, .reset =3D tegra241_cmdqv_reset, }; =20 --=20 2.43.0