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Tue, 24 Feb 2026 04:10:17 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: Peter Maydell , qemu-arm@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PATCH 4/8] PLAN.md: add plan for the current work Date: Tue, 24 Feb 2026 12:10:10 +0000 Message-ID: <20260224121014.279248-5-alex.bennee@linaro.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260224121014.279248-1-alex.bennee@linaro.org> References: <20260224121014.279248-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1771935080346158500 This is entirely generated by ECA/Gemini using the gemini-3-flash-preview model. My initial prompt was: I want to generate a PLAN.md for a piece of development work. Recently support for WFE was added for M-profile but I want to extend that support to A-profile along side proper semantics for WFI, WFE, WFIT and WFET instructions. That includes setting the full ISS fields for the traps (RN and RV fields of the ISS encoding from WF* intructions). See syn_wfx() for where we currently build this up. Keep in mind we want each commit to be kept small and review-able while maintaining bisect-ability. We also should think about how we can test and defend the functionality in QEMU's testing suite. This will form the "guide" for the agents next steps. Signed-off-by: Alex Benn=C3=A9e --- PLAN.md | 77 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 PLAN.md diff --git a/PLAN.md b/PLAN.md new file mode 100644 index 00000000000..49f330b802d --- /dev/null +++ b/PLAN.md @@ -0,0 +1,77 @@ +# Plan: Extend WFX Support for A-profile + +This document outlines the plan to extend WFE support to A-profile ARM and= ensure proper semantics for WFI, WFE, WFIT, and WFET instructions, includi= ng full ISS field support for traps. + +## 1. Syndrome Enhancements + +### 1.1 Update `syn_wfx` in `target/arm/syndrome.h` +- Modify `syn_wfx` to include `rd` (RN) and `rv` (Register Valid) fields. +- Ensure the bitfields match the ARM ARM for EC 0x01. +- Bit layout: + - ISS[24]: CV + - ISS[23:20]: COND + - ISS[19:15]: RN (rd) + - ISS[14]: RV + - ISS[1:0]: TI + +### 1.2 Update WFX Syndrome Construction in Helpers +- In `target/arm/tcg/op_helper.c`, update `HELPER(wfi)`, `HELPER(wfit)`, a= nd implement `HELPER(wfet)` to: + - Check `is_a64(env)`. + - For AArch64: Set `cv =3D 0` and `cond =3D 0xf`. + - For AArch32: Maintain `cv =3D 1` and `cond =3D 0xe` (or pass the actua= l condition). + - Pass the correct `rd` and `rv` based on the instruction. + +## 2. Instruction Helpers and Translation + +### 2.1 Update `HELPER(wfit)` and `trans_WFIT` +- Change `HELPER(wfit)` to accept the register number `rd`. +- Update `trans_WFIT` in `target/arm/tcg/translate-a64.c` to pass `a->rd`. + +### 2.2 Implement `HELPER(wfet)` and update `trans_WFET` +- Create `HELPER(wfet)` in `op_helper.c`. It should: + - Check for traps using `check_wfx_trap(env, true, &excp)`. + - If trapped, raise exception with `ti=3D1` and `rv=3Dtrue, rd=3Drd`. + - If not trapped, check `event_register` and timeout. +- Update `trans_WFET` to call the new helper instead of just setting `DISA= S_WFE`. + +### 2.3 Refactor `HELPER(wfe)` for A-profile +- Update `HELPER(wfe)` to handle A-profile: + - Check for traps using `check_wfx_trap(env, true, &excp)`. + - If trapped, raise exception. + - If not trapped: + - If `env->event_register` is set, clear it and return. + - Otherwise, halt the CPU (`cs->halted =3D 1`, `cs->exception_index = =3D EXCP_HLT`, `cpu_loop_exit`). + +## 3. Wake-up Logic and Event Register + +### 3.1 Update `HELPER(sev)` +- Ensure `event_register` is set for all CPUs, not just M-profile. +- Kick all other CPUs to wake them from `EXCP_HLT`. + +### 3.2 Update `arm_cpu_has_work` +- Modify `target/arm/cpu.c` to check `event_register` for A-profile CPUs a= s well. +- This ensures that a CPU halted by WFE wakes up when the event register i= s set. + +## 4. Testing and Verification + +### 4.1 TCG Tests +- Add a new test case in `tests/tcg/aarch64` that: + - Executes WFI, WFE, WFIT, WFET. + - Verifies that WFE/WFI halt the CPU and can be woken up. + - (Optional) Exercises traps by running at EL0 with SCTLR_EL1.nTWE/nTWI = =3D 0 and verifying the syndrome in a signal handler or a small EL1 kernel. + +### 4.2 Regression Testing +- Ensure no regressions for M-profile WFE. +- Run `make check-qtest` and `make check-tcg`. + +## Commit Breakdown (Proposed) + +1. `target/arm: Update syn_wfx to include RN and RV` +2. `target/arm: Update HELPER(wfi) to use correct CV/COND for AArch64` +3. `target/arm: Update HELPER(wfit) to accept rd and use correct syndrome` +4. `target/arm: Implement HELPER(wfet) and update trans_WFET` +5. `target/arm: Update HELPER(wfe) to implement proper A-profile semantics` +6. `target/arm: Update HELPER(sev) and arm_cpu_has_work for A-profile even= t register` +7. `tests/tcg/aarch64: Add tests for WFX instructions` + +=F0=9F=A4=96 Generated with [eca](https://eca.dev) --=20 2.47.3