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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.84.202; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.798, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.79, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1771783420256158500 Content-Type: text/plain; charset="utf-8" From: Bernhard Beschow When compiling for i386-softmmu under MSYS2, GCC emits the following warnin= g: In function 'get_reg_val', inlined from 'calc_modrm_operand64' at ../src/target/i386/emulate/x86= _decode.c:1796:15: ../src/target/i386/emulate/x86_decode.c:1703:5: error: 'memcpy' forming o= ffset [4, 7] is out of the bounds [0, 4] of object 'val' with type 'target_= ulong' {aka 'unsigned int'} [-Werror=3Darray-bounds=3D] 1703 | memcpy(&val, | ^~~~~~~~~~~~ 1704 | get_reg_ref(env, reg, rex_present, is_extended, size), | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 1705 | size); | ~~~~~ ../src/target/i386/emulate/x86_decode.c: In function 'calc_modrm_operand6= 4': ../src/target/i386/emulate/x86_decode.c:1702:18: note: 'val' declared here 1702 | target_ulong val =3D 0; | ^~~ In the calc_modrm_operand64() case the compiler sees size =3D=3D 8 to be me= m-copied to a target_ulong variable which is only 4 bytes wide in case of i386-softm= mu. Note that when size !=3D 1, get_reg_ref() always returns a pointer to an 8 = byte register, regardless of the target_ulong size. Fix the compiler warning by always providing 8 bytes of storage by means of uint64_t. Fixes: 77a2dba45cc9 ("target/i386/emulate: stop overloading decode->op[N].p= tr") cc: qemu-stable Signed-off-by: Bernhard Beschow Reviewed-by: Mohamed Mediouni Reviewed-by: Wei Liu (Microsoft) --- target/i386/emulate/x86_decode.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/emulate/x86_decode.c b/target/i386/emulate/x86_dec= ode.c index d037ed1142..6ad03b71b0 100644 --- a/target/i386/emulate/x86_decode.c +++ b/target/i386/emulate/x86_decode.c @@ -1699,7 +1699,7 @@ void *get_reg_ref(CPUX86State *env, int reg, int rex_= present, target_ulong get_reg_val(CPUX86State *env, int reg, int rex_present, int is_extended, int size) { - target_ulong val =3D 0; + uint64_t val =3D 0; memcpy(&val, get_reg_ref(env, reg, rex_present, is_extended, size), size); --=20 2.50.1 (Apple Git-155) From nobody Sun Apr 12 00:55:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Sun, 22 Feb 2026 18:02:50 +0000 (UTC) Received: from localhost.localdomain (unknown [17.57.155.37]) by p00-icloudmta-asmtp-us-east-2d-100-percent-12 (Postfix) with ESMTPSA id 81E6318004FD; Sun, 22 Feb 2026 18:02:47 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; t=1771783374; x=1774375374; bh=eGBzMnvYi2plqRMYS3s+jPbPqZ3R3tScJhTlruf1lkA=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type:x-icloud-hme; b=CTp6YA8pv80Mxbaqnshst24Otnt3O8PFJAYFVwo5Eksb9X+O6gsq1MdvIUyQvvNvEpdD+iaTqysG8E+65YiMh3DZP0x64clRZG7KjxIw+5+K/9mQnrtl1YoAIjGSEF6nRlkyvAeXqg5rUx1KMhFJEf8cj5tFtTHkp1rlatLJhFuyde9zJUcsVqc8TBndwiJa9n4AJ7dWizVPYwwjNTs67qsCkQrrL7nnr4nYsPAcdbAzdo+16iZXPTKVNYCJPKXhK+F6vn930ZfyZ/Bb/kTECQ53tyvMxvTTjEmXunpX/R6LOsrfm8AzRCptFyMqmeSbMlXqn1rQNrRBfzEoaV+cDg== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org Cc: Mohamed Mediouni , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Peter Maydell , Cameron Esfahani , qemu-arm@nongnu.org, Magnus Kulke , Paolo Bonzini , Bernhard Beschow , Pedro Barbuda , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Zhao Liu , Roman Bolshakov , Phil Dennis-Jordan , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Wei Liu Subject: [PATCH v4 02/16] target/i386/hvf/x86_mmu: Fix compiler warning Date: Sun, 22 Feb 2026 19:02:26 +0100 Message-ID: <20260222180241.14621-3-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260222180241.14621-1-mohamed@unpredictable.fr> References: <20260222180241.14621-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Type: text/plain; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.84.201; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -11 X-Spam_score: -1.2 X-Spam_bar: - X-Spam_report: (-1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.798, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.79, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1771783402875158500 From: Bernhard Beschow When reusing the code in WHPX, GCC emits the following warning when compili= ng for i386-softmmu under MSYS2: In file included from ../src/target/i386/emulate/x86_mmu.c:20: ../src/target/i386/emulate/x86_mmu.c: In function 'vmx_write_mem': ../src/target/i386/emulate/x86_mmu.c:251:25: error: format '%llx' expects= argument of type 'long long unsigned int', but argument 3 has type 'target= _ulong' {aka 'unsigned int'} [-Werror=3Dformat=3D] 251 | VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __fun= c__, gva); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ = ~~~ | = | | = target_ulong {aka unsigned int} ../src/target/i386/emulate/panic.h:34:12: note: in definition of macro 'V= M_PANIC_EX' 34 | printf(__VA_ARGS__); \ | ^~~~~~~~~~~ ../src/target/i386/emulate/x86_mmu.c:251:48: note: format string is defin= ed here 251 | VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __fun= c__, gva); | ~~~^ | | | long long unsigned= int | %x Fix the warning by reusing the target-specific macro TARGET_FMT_lx which ex= ists for this exact purpose. Fixes: c97d6d2cdf97 ("i386: hvf: add code base from Google's QEMU repositor= y") cc: qemu-stable Signed-off-by: Bernhard Beschow Reviewed-by: Mohamed Mediouni Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Wei Liu (Microsoft) --- target/i386/hvf/x86_mmu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/i386/hvf/x86_mmu.c b/target/i386/hvf/x86_mmu.c index afc5c17d5d..fe44d2edf4 100644 --- a/target/i386/hvf/x86_mmu.c +++ b/target/i386/hvf/x86_mmu.c @@ -244,7 +244,8 @@ void vmx_write_mem(CPUState *cpu, target_ulong gva, voi= d *data, int bytes) int copy =3D MIN(bytes, 0x1000 - (gva & 0xfff)); =20 if (!mmu_gva_to_gpa(cpu, gva, &gpa)) { - VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva); + VM_PANIC_EX("%s: mmu_gva_to_gpa " TARGET_FMT_lx " failed\n", + __func__, gva); } else { address_space_write(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED, data, copy); @@ -265,7 +266,8 @@ void vmx_read_mem(CPUState *cpu, void *data, target_ulo= ng gva, int bytes) int copy =3D MIN(bytes, 0x1000 - (gva & 0xfff)); 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.84.208; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.798, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.79, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1771783421565154100 Content-Type: text/plain; charset="utf-8" From: Bernhard Beschow Compared to decode_instruction(), decode_instruction_stream() has an additi= onal stream parameter which avoids some guest memory accesses during instruction decoding. Both functions defer the actual work to decode_opcode() which wou= ld set the stream pointer to zero such that decode_instruction_stream() essent= ially behaved like decode_instruction(). Given that all callers of decode_instruction_stream() properly zero-initialize the decode parameter, = the memset() call can be moved into decode_instruction() which is the only other user of decode_opcode(). This preserves the non-zero stream pointer which avoids extra guest memory accesses. Fixes: 1e25327b244a ("target/i386/emulate: Allow instruction decoding from = stream") cc: qemu-stable Signed-off-by: Bernhard Beschow Reviewed-by: Mohamed Mediouni Reviewed-by: Wei Liu (Microsoft) Tested-by: Magnus Kulke --- target/i386/emulate/x86_decode.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/i386/emulate/x86_decode.c b/target/i386/emulate/x86_dec= ode.c index 6ad03b71b0..7bbcd2a9a2 100644 --- a/target/i386/emulate/x86_decode.c +++ b/target/i386/emulate/x86_decode.c @@ -2088,8 +2088,6 @@ static void decode_opcodes(CPUX86State *env, struct x= 86_decode *decode) =20 static uint32_t decode_opcode(CPUX86State *env, struct x86_decode *decode) { - memset(decode, 0, sizeof(*decode)); - decode_prefix(env, decode); set_addressing_size(env, decode); set_operand_size(env, decode); @@ -2101,6 +2099,8 @@ static uint32_t decode_opcode(CPUX86State *env, struc= t x86_decode *decode) =20 uint32_t decode_instruction(CPUX86State *env, struct x86_decode *decode) { + memset(decode, 0, sizeof(*decode)); + return decode_opcode(env, decode); } =20 --=20 2.50.1 (Apple Git-155) From nobody Sun Apr 12 00:55:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1771783402; cv=none; d=zohomail.com; s=zohoarc; b=aBgsjDjDl6D7pFMVYwm35pllpvAgdu13L0Oxi48f84zAcLtkSoZLJisnjRZMIgRJd6YlyiFL9G/9AQOnLPS9EagF4KGuRR/Flqni7cSZScdnVmUwIJ6a7zDhghaOGavw1TTyPnESQe7Bqox8H9ukckwBPbvvO/XQF0+lVR1yiFM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1771783402; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=7itu/O5CELa9iPuSolCH3YRKKsdLS4pTb1/OCKKFmrA=; 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Sun, 22 Feb 2026 13:02:58 -0500 Received: from outbound.qs.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-east-2d-100-percent-12 (Postfix) with ESMTPS id 026591800509; Sun, 22 Feb 2026 18:02:53 +0000 (UTC) Received: from localhost.localdomain (unknown [17.57.155.37]) by p00-icloudmta-asmtp-us-east-2d-100-percent-12 (Postfix) with ESMTPSA id 7F5EF180011A; Sun, 22 Feb 2026 18:02:51 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; t=1771783376; x=1774375376; bh=7itu/O5CELa9iPuSolCH3YRKKsdLS4pTb1/OCKKFmrA=; h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme; b=ZWsNXHaE/Hoy2FAJ+omh69eC7WZYA33vkRmPxcAv/2T9Bhl7bwQ9y/Dmmo/6CsqBHhwkCmxSGu1rR8JySudZvDAxHJVKdFq4syDNpjFWaFpbbfCZGJtcQIZRHcxkAI8k7layFX26Yq2HIEzqBvsZIcVL9k2kgL6/aC6jB1oXLEGqXHE4ylW8kFUk7i/9Qyp6PDYx3OqoIWOD1XUhxpPxsSFRC7f3q4swko7qKHabTzlQFpcMGYxniMt/eK360vhyJFc6fVruaaAknca2T94dIKle8W+IqC4R0X8KTpdn+vo4NPKmYtqHzzjXBdN2CYn7+LsQBYAn5mAVLDLI21FY7Q== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org Cc: Mohamed Mediouni , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Peter Maydell , Cameron Esfahani , qemu-arm@nongnu.org, Magnus Kulke , Paolo Bonzini , Bernhard Beschow , Pedro Barbuda , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Zhao Liu , Roman Bolshakov , Phil Dennis-Jordan , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Wei Liu Subject: [PATCH v4 04/16] target/i386/emulate: rework string_rep emulation Date: Sun, 22 Feb 2026 19:02:28 +0100 Message-ID: <20260222180241.14621-5-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260222180241.14621-1-mohamed@unpredictable.fr> References: <20260222180241.14621-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: ElkNTvSZuP2vLwAqrIL3Ys-x2n-dRg8a X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjIyMDE3NCBTYWx0ZWRfX5gjUHMilNKyG waFAMrsBoG1XWHjwVtcYrkGB74yN2rEDSeHhrLjlsO4RGzMAWqlgUNrPUWupnA33gQA0cV0opKY KFv2RuQ/UQe12wWiCfRJdSx5Myf7IKe7E5zTZe+/Z+V9Fa958R7rTjKDuBoHj4rjL3aFpnsobBg oOe/Uur3AtysuebaUDQCzmkDDqmJIhxAcrdNhr4RXGW6/H4pUL8Y/PeanTrHg86YdMS5qEJTJHg Nsgc3osEWMGPx/kvTH61OAf1wVU7STOBX82HUjyOUw9SpfHnoOGbFAoOZ50JgkytChk5SGRnpO7 r+inHwB47uPZNOt8dYUQdRzbHShInJQkX8uXdXseFQxyrP7hExODzSrEU/6fl4= X-Authority-Info-Out: v=2.4 cv=WItyn3sR c=1 sm=1 tr=0 ts=699b44cf cx=c_apl:c_apl_out:c_pps a=bsP7O+dXZ5uKcj+dsLqiMw==:117 a=bsP7O+dXZ5uKcj+dsLqiMw==:17 a=HzLeVaNsDn8A:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=6_-HZhw-fp-CqYksV2EA:9 X-Proofpoint-ORIG-GUID: ElkNTvSZuP2vLwAqrIL3Ys-x2n-dRg8a X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-22_04,2026-02-20_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 clxscore=1030 adultscore=0 suspectscore=0 lowpriorityscore=0 spamscore=0 mlxscore=0 malwarescore=0 bulkscore=0 mlxlogscore=870 phishscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602220174 X-JNJ: AAAAAAABNie4RdAPSx70dBVrdFCq4ua5+6t+VdtgTuwfSSi/GAYZAknz2sW2RTm39Liu6+7H1Op9FGNTOVU4++rzyO5YTcVbElE5N1iW6jZv4VM+zbUi4Lq7eEsBGD6u+5sYRtwENW8rfDpfIvubaIloInJSQQr9zTSYpB3vjUrF2tQa8AsDKOVZij0nq4p9gEOpsfuZE5S23GqNFjaQX1q9KhcmHU7afe8zvtU42S06/MgZX5xZXGl+TxC6Y5UirBnIIxVEAGMaYbqjcGV4PInONomPEq8kBqAx5y9kf1CQXWThmYmAP8K4w6HonwdiI1vSs9A4iEWae86wmbvb74C0ENXFpwh5S221ui9PQO0a6GIFRZfKiTx6WEJDzwTn4FJzJsHuRk2NGGJOC3Iux3NUwr/wkeXORIi7J1edKL9rr5EI7Z3smtk6Wl1avWiAWXnlUooDPZEkZwEoJYvVAs6Mb8wu0Cft6Krdmg2gkXul41mq1htL5tkdc+N3C5Ea/pakyDUcVEWGuwW5Pps43Ce0eWW2Liscw4RGW6IO/l15clFYIh3uAL5pqH+cBPjWwBSV7tyyywfyhTILhIy1bwq7uI/p3vhOBEfKALuHve4k/FpgIhL5mmN8wIItBW3ZLkmDVHvRsuSXlDn+GwhCgT+bTTxO8r8JIBCrYvm0kKu55jno6uwkPNVxmt69WHN5qmvypl/Prdqq93S7elVxHbMf9JUC3Q+5hQrwPIrkaMAjkyUM2HN6wwVse5SMx+w1tiko+K9kWeaQQJIRYl5bwJn4YRuNtvHn4YBzBw== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.84.196; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.798, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.79, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1771783404016158500 Content-Type: text/plain; charset="utf-8" Signed-off-by: Mohamed Mediouni --- target/i386/emulate/x86_emu.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/target/i386/emulate/x86_emu.c b/target/i386/emulate/x86_emu.c index 4409f7bc13..bf96fe06b4 100644 --- a/target/i386/emulate/x86_emu.c +++ b/target/i386/emulate/x86_emu.c @@ -466,18 +466,25 @@ static inline void string_increment_reg(CPUX86State *= env, int reg, write_reg(env, reg, val, decode->addressing_size); } =20 +static inline int get_ZF(CPUX86State *env) { + return env->cc_dst ? 0 : CC_Z; +} + static inline void string_rep(CPUX86State *env, struct x86_decode *decode, void (*func)(CPUX86State *env, struct x86_decode *ins), int re= p) { target_ulong rcx =3D read_reg(env, R_ECX, decode->addressing_size); - while (rcx--) { + + while (rcx !=3D 0) { + bool is_cmps_or_scas =3D decode->cmd =3D=3D X86_DECODE_CMD_CMPS ||= decode->cmd =3D=3D X86_DECODE_CMD_SCAS; func(env, decode); + rcx--; write_reg(env, R_ECX, rcx, decode->addressing_size); - if ((PREFIX_REP =3D=3D rep) && !env->cc_dst) { + if ((PREFIX_REP =3D=3D rep) && !get_ZF(env) && is_cmps_or_scas) { break; } - if ((PREFIX_REPN =3D=3D rep) && env->cc_dst) { + if ((PREFIX_REPN =3D=3D rep) && get_ZF(env)&& is_cmps_or_scas) { break; } } --=20 2.50.1 (Apple Git-155) From nobody Sun Apr 12 00:55:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.84.151; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -11 X-Spam_score: -1.2 X-Spam_bar: - X-Spam_report: (-1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.798, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.79, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1771783536677154100 Signed-off-by: Mohamed Mediouni Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/i386/emulate/meson.build | 1 + target/i386/{hvf =3D> emulate}/x86_mmu.c | 14 +++++++++----- target/i386/{hvf =3D> emulate}/x86_mmu.h | 0 target/i386/hvf/hvf.c | 10 +++++++++- target/i386/hvf/meson.build | 1 - target/i386/hvf/x86.c | 2 +- target/i386/hvf/x86_task.c | 2 +- 7 files changed, 21 insertions(+), 9 deletions(-) rename target/i386/{hvf =3D> emulate}/x86_mmu.c (95%) rename target/i386/{hvf =3D> emulate}/x86_mmu.h (100%) diff --git a/target/i386/emulate/meson.build b/target/i386/emulate/meson.bu= ild index b6dafb6a5b..dd047c424a 100644 --- a/target/i386/emulate/meson.build +++ b/target/i386/emulate/meson.build @@ -2,6 +2,7 @@ emulator_files =3D files( 'x86_decode.c', 'x86_emu.c', 'x86_flags.c', + 'x86_mmu.c' ) =20 i386_system_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: emulator_files) diff --git a/target/i386/hvf/x86_mmu.c b/target/i386/emulate/x86_mmu.c similarity index 95% rename from target/i386/hvf/x86_mmu.c rename to target/i386/emulate/x86_mmu.c index fe44d2edf4..b82a55a3da 100644 --- a/target/i386/hvf/x86_mmu.c +++ b/target/i386/emulate/x86_mmu.c @@ -19,10 +19,10 @@ #include "qemu/osdep.h" #include "panic.h" #include "cpu.h" +#include "system/address-spaces.h" +#include "system/memory.h" #include "emulate/x86.h" -#include "x86_mmu.h" -#include "vmcs.h" -#include "vmx.h" +#include "emulate/x86_mmu.h" =20 #define pte_present(pte) (pte & PT_PRESENT) #define pte_write_access(pte) (pte & PT_WRITE) @@ -99,6 +99,8 @@ static bool get_pt_entry(CPUState *cpu, struct gpt_transl= ation *pt, static bool test_pt_entry(CPUState *cpu, struct gpt_translation *pt, int level, int *largeness, bool pae) { + X86CPU *x86_cpu =3D X86_CPU(cpu); + CPUX86State *env =3D &x86_cpu->env; uint64_t pte =3D pt->pte[level]; =20 if (pt->write_access) { @@ -127,7 +129,7 @@ static bool test_pt_entry(CPUState *cpu, struct gpt_tra= nslation *pt, pt->err_code |=3D MMU_PAGE_PT; } =20 - uint32_t cr0 =3D rvmcs(cpu->accel->fd, VMCS_GUEST_CR0); + uint32_t cr0 =3D env->cr[0]; /* check protection */ if (cr0 & CR0_WP_MASK) { if (pt->write_access && !pte_write_access(pte)) { @@ -179,9 +181,11 @@ static inline uint64_t large_page_gpa(struct gpt_trans= lation *pt, bool pae, static bool walk_gpt(CPUState *cpu, target_ulong addr, int err_code, struct gpt_translation *pt, bool pae) { + X86CPU *x86_cpu =3D X86_CPU(cpu); + CPUX86State *env =3D &x86_cpu->env; int top_level, level; int largeness =3D 0; - target_ulong cr3 =3D rvmcs(cpu->accel->fd, VMCS_GUEST_CR3); + target_ulong cr3 =3D env->cr[3]; uint64_t page_mask =3D pae ? PAE_PTE_PAGE_MASK : LEGACY_PTE_PAGE_MASK; =20 memset(pt, 0, sizeof(*pt)); diff --git a/target/i386/hvf/x86_mmu.h b/target/i386/emulate/x86_mmu.h similarity index 100% rename from target/i386/hvf/x86_mmu.h rename to target/i386/emulate/x86_mmu.h diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index ce54020f00..0b3674ad33 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -62,7 +62,7 @@ #include "emulate/x86.h" #include "x86_descr.h" #include "emulate/x86_flags.h" -#include "x86_mmu.h" +#include "emulate/x86_mmu.h" #include "emulate/x86_decode.h" #include "emulate/x86_emu.h" #include "x86_task.h" @@ -254,11 +254,19 @@ static void hvf_read_segment_descriptor(CPUState *s, = struct x86_segment_descript =20 static void hvf_read_mem(CPUState *cpu, void *data, target_ulong gva, int = bytes) { + X86CPU *x86_cpu =3D X86_CPU(cpu); + CPUX86State *env =3D &x86_cpu->env; + env->cr[0] =3D rvmcs(cpu->accel->fd, VMCS_GUEST_CR0); + env->cr[3] =3D rvmcs(cpu->accel->fd, VMCS_GUEST_CR3); vmx_read_mem(cpu, data, gva, bytes); } =20 static void hvf_write_mem(CPUState *cpu, void *data, target_ulong gva, int= bytes) { + X86CPU *x86_cpu =3D X86_CPU(cpu); + CPUX86State *env =3D &x86_cpu->env; + env->cr[0] =3D rvmcs(cpu->accel->fd, VMCS_GUEST_CR0); + env->cr[3] =3D rvmcs(cpu->accel->fd, VMCS_GUEST_CR3); vmx_write_mem(cpu, gva, data, bytes); } =20 diff --git a/target/i386/hvf/meson.build b/target/i386/hvf/meson.build index 519d190f0e..22bf886978 100644 --- a/target/i386/hvf/meson.build +++ b/target/i386/hvf/meson.build @@ -3,7 +3,6 @@ i386_system_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: file= s( 'x86.c', 'x86_cpuid.c', 'x86_descr.c', - 'x86_mmu.c', 'x86_task.c', 'x86hvf.c', 'hvf-cpu.c', diff --git a/target/i386/hvf/x86.c b/target/i386/hvf/x86.c index 5c75ec9a00..2fa210ff60 100644 --- a/target/i386/hvf/x86.c +++ b/target/i386/hvf/x86.c @@ -23,7 +23,7 @@ #include "emulate/x86_emu.h" #include "vmcs.h" #include "vmx.h" -#include "x86_mmu.h" +#include "emulate/x86_mmu.h" #include "x86_descr.h" =20 /* static uint32_t x86_segment_access_rights(struct x86_segment_descriptor= *var) diff --git a/target/i386/hvf/x86_task.c b/target/i386/hvf/x86_task.c index bdf8b51ae6..b1e541a642 100644 --- a/target/i386/hvf/x86_task.c +++ b/target/i386/hvf/x86_task.c @@ -16,7 +16,7 @@ #include "vmx.h" #include "emulate/x86.h" #include "x86_descr.h" -#include "x86_mmu.h" +#include "emulate/x86_mmu.h" #include "emulate/x86_decode.h" #include "emulate/x86_emu.h" #include "x86_task.h" --=20 2.50.1 (Apple Git-155) From nobody Sun Apr 12 00:55:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.84.141; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -11 X-Spam_score: -1.2 X-Spam_bar: - X-Spam_report: (-1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.798, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.79, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1771783448414158500 Fix what got broken several years ago by adding ops->supports_guest_debug support as an architecture-specific function. arm64 WHP doesn't currently provide support needed for this. Signed-off-by: Mohamed Mediouni Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- accel/whpx/whpx-accel-ops.c | 8 ++++++++ include/system/whpx-all.h | 4 ++++ target/arm/whpx/whpx-all.c | 5 +++++ target/i386/whpx/whpx-all.c | 5 +++++ 4 files changed, 22 insertions(+) diff --git a/accel/whpx/whpx-accel-ops.c b/accel/whpx/whpx-accel-ops.c index 50fadea0fd..b8f41544cb 100644 --- a/accel/whpx/whpx-accel-ops.c +++ b/accel/whpx/whpx-accel-ops.c @@ -17,6 +17,7 @@ =20 #include "system/whpx.h" #include "system/whpx-internal.h" +#include "system/whpx-all.h" #include "system/whpx-accel-ops.h" =20 static void *whpx_cpu_thread_fn(void *arg) @@ -81,6 +82,12 @@ static bool whpx_vcpu_thread_is_idle(CPUState *cpu) return !whpx_irqchip_in_kernel(); } =20 +static bool whpx_supports_guest_debug(void) +{ + return whpx_arch_supports_guest_debug(); +} + + static void whpx_accel_ops_class_init(ObjectClass *oc, const void *data) { AccelOpsClass *ops =3D ACCEL_OPS_CLASS(oc); @@ -89,6 +96,7 @@ static void whpx_accel_ops_class_init(ObjectClass *oc, co= nst void *data) ops->kick_vcpu_thread =3D whpx_kick_vcpu_thread; ops->cpu_thread_is_idle =3D whpx_vcpu_thread_is_idle; ops->handle_interrupt =3D generic_handle_interrupt; + ops->supports_guest_debug =3D whpx_supports_guest_debug; =20 ops->synchronize_post_reset =3D whpx_cpu_synchronize_post_reset; ops->synchronize_post_init =3D whpx_cpu_synchronize_post_init; diff --git a/include/system/whpx-all.h b/include/system/whpx-all.h index f13cdf7f66..3db074c38c 100644 --- a/include/system/whpx-all.h +++ b/include/system/whpx-all.h @@ -17,4 +17,8 @@ void whpx_translate_cpu_breakpoints( struct whpx_breakpoints *breakpoints, CPUState *cpu, int cpu_breakpoint_count); + +/* called by whpx-accel-ops */ +bool whpx_arch_supports_guest_debug(void); + #endif diff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c index 36c5e30a03..8d0ca794af 100644 --- a/target/arm/whpx/whpx-all.c +++ b/target/arm/whpx/whpx-all.c @@ -304,6 +304,11 @@ void whpx_translate_cpu_breakpoints( /* Breakpoints aren=E2=80=99t supported on this platform */ } =20 +bool whpx_arch_supports_guest_debug(void)=20 +{ + return false; +} + static void whpx_get_reg(CPUState *cpu, WHV_REGISTER_NAME reg, WHV_REGISTE= R_VALUE* val) { struct whpx_state *whpx =3D &whpx_global; diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index 8210250dc3..e1f0fa5e77 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -1272,6 +1272,11 @@ void whpx_apply_breakpoints( } } =20 +bool whpx_arch_supports_guest_debug(void)=20 +{ + return true; +} + /* Returns the address of the next instruction that is about to be execute= d. */ static vaddr whpx_vcpu_get_pc(CPUState *cpu, bool exit_context_valid) { --=20 2.50.1 (Apple Git-155) From nobody Sun Apr 12 00:55:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1771783533; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.84.216; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.798, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.79, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1771783534801158500 Content-Type: text/plain; charset="utf-8" Signed-off-by: Mohamed Mediouni --- target/i386/cpu.h | 2 +- target/i386/emulate/meson.build | 1 + target/i386/mshv/meson.build | 4 ++++ 3 files changed, 6 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 9f222a0c9f..065613722f 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2286,7 +2286,7 @@ typedef struct CPUArchState { QEMUTimer *xen_periodic_timer; QemuMutex xen_timers_lock; #endif -#if defined(CONFIG_HVF) || defined(CONFIG_MSHV) +#if defined(CONFIG_HVF) || defined(CONFIG_MSHV) || defined(CONFIG_WHPX) void *emu_mmio_buf; #endif =20 diff --git a/target/i386/emulate/meson.build b/target/i386/emulate/meson.bu= ild index dd047c424a..1bb3516249 100644 --- a/target/i386/emulate/meson.build +++ b/target/i386/emulate/meson.build @@ -7,3 +7,4 @@ emulator_files =3D files( =20 i386_system_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: emulator_files) i386_system_ss.add(when: 'CONFIG_MSHV', if_true: emulator_files) +i386_system_ss.add(when: 'CONFIG_WHPX', if_true: emulator_files) diff --git a/target/i386/mshv/meson.build b/target/i386/mshv/meson.build index 647e5dafb7..3fadd4598a 100644 --- a/target/i386/mshv/meson.build +++ b/target/i386/mshv/meson.build @@ -6,3 +6,7 @@ i386_mshv_ss.add(files( )) =20 i386_system_ss.add_all(when: 'CONFIG_MSHV', if_true: i386_mshv_ss) + +i386_system_ss.add(when: 'CONFIG_WHPX', if_true: files( + 'x86.c', +)) --=20 2.50.1 (Apple Git-155) From nobody Sun Apr 12 00:55:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.84.199; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.798, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.79, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1771783542372158500 Avoid a TARGET_X86_64 define by moving platform-specific code away from generic WHPX support. Signed-off-by: Mohamed Mediouni Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- accel/whpx/whpx-common.c | 5 +---- include/system/whpx-all.h | 1 + target/arm/whpx/whpx-all.c | 5 +++++ target/i386/whpx/whpx-all.c | 6 ++++++ 4 files changed, 13 insertions(+), 4 deletions(-) diff --git a/accel/whpx/whpx-common.c b/accel/whpx/whpx-common.c index f018a8f5c7..c57a0d3f0f 100644 --- a/accel/whpx/whpx-common.c +++ b/accel/whpx/whpx-common.c @@ -236,10 +236,7 @@ void whpx_destroy_vcpu(CPUState *cpu) struct whpx_state *whpx =3D &whpx_global; =20 whp_dispatch.WHvDeleteVirtualProcessor(whpx->partition, cpu->cpu_index= ); -#ifdef HOST_X86_64 - AccelCPUState *vcpu =3D cpu->accel; - whp_dispatch.WHvEmulatorDestroyEmulator(vcpu->emulator); -#endif + whpx_arch_destroy_vcpu(cpu); g_free(cpu->accel); } =20 diff --git a/include/system/whpx-all.h b/include/system/whpx-all.h index 3db074c38c..b831c463b0 100644 --- a/include/system/whpx-all.h +++ b/include/system/whpx-all.h @@ -17,6 +17,7 @@ void whpx_translate_cpu_breakpoints( struct whpx_breakpoints *breakpoints, CPUState *cpu, int cpu_breakpoint_count); +void whpx_arch_destroy_vcpu(CPUState *cpu); =20 /* called by whpx-accel-ops */ bool whpx_arch_supports_guest_debug(void); diff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c index 8d0ca794af..d52580a082 100644 --- a/target/arm/whpx/whpx-all.c +++ b/target/arm/whpx/whpx-all.c @@ -309,6 +309,11 @@ bool whpx_arch_supports_guest_debug(void) return false; } =20 +void whpx_arch_destroy_vcpu(CPUState *cpu) +{ + /* currently empty on Arm */ +} + static void whpx_get_reg(CPUState *cpu, WHV_REGISTER_NAME reg, WHV_REGISTE= R_VALUE* val) { struct whpx_state *whpx =3D &whpx_global; diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index e1f0fa5e77..cdcaebbe16 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -1277,6 +1277,12 @@ bool whpx_arch_supports_guest_debug(void) return true; } =20 +void whpx_arch_destroy_vcpu(CPUState *cpu) +{ + AccelCPUState *vcpu =3D cpu->accel; + whp_dispatch.WHvEmulatorDestroyEmulator(vcpu->emulator); +} + /* Returns the address of the next instruction that is about to be execute= d. */ static vaddr whpx_vcpu_get_pc(CPUState *cpu, bool exit_context_valid) { --=20 2.50.1 (Apple Git-155) From nobody Sun Apr 12 00:55:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.84.137; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.798, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.79, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1771783436350158500 Content-Type: text/plain; charset="utf-8" These will be used in the next commit on the x86_64 backend too. Also move flush_cpu_state as it's used by get_reg/set_reg and the arm64 cod= e. Signed-off-by: Mohamed Mediouni Reviewed-by: Bernhard Beschow --- accel/whpx/whpx-common.c | 35 ++++++++++++++++++++++++++++++++++ include/system/whpx-common.h | 3 +++ target/arm/whpx/whpx-all.c | 37 +----------------------------------- 3 files changed, 39 insertions(+), 36 deletions(-) diff --git a/accel/whpx/whpx-common.c b/accel/whpx/whpx-common.c index c57a0d3f0f..21e9f1a178 100644 --- a/accel/whpx/whpx-common.c +++ b/accel/whpx/whpx-common.c @@ -46,6 +46,41 @@ static HMODULE hWinHvEmulation; struct whpx_state whpx_global; struct WHPDispatch whp_dispatch; =20 +void whpx_flush_cpu_state(CPUState *cpu) +{ + if (cpu->vcpu_dirty) { + whpx_set_registers(cpu, WHPX_SET_RUNTIME_STATE); + cpu->vcpu_dirty =3D false; + } +} + +void whpx_get_reg(CPUState *cpu, WHV_REGISTER_NAME reg, WHV_REGISTER_VALUE= * val) +{ + struct whpx_state *whpx =3D &whpx_global; + HRESULT hr; + + whpx_flush_cpu_state(cpu); + + hr =3D whp_dispatch.WHvGetVirtualProcessorRegisters(whpx->partition, c= pu->cpu_index, + ®, 1, val); + + if (FAILED(hr)) { + error_report("WHPX: Failed to get register %08x, hr=3D%08lx", reg,= hr); + } +} + +void whpx_set_reg(CPUState *cpu, WHV_REGISTER_NAME reg, WHV_REGISTER_VALUE= val) +{ + struct whpx_state *whpx =3D &whpx_global; + HRESULT hr; + hr =3D whp_dispatch.WHvSetVirtualProcessorRegisters(whpx->partition, c= pu->cpu_index, + ®, 1, &val); + + if (FAILED(hr)) { + error_report("WHPX: Failed to set register %08x, hr=3D%08lx", reg,= hr); + } +} + /* Tries to find a breakpoint at the specified address. */ struct whpx_breakpoint *whpx_lookup_breakpoint_by_addr(uint64_t address) { diff --git a/include/system/whpx-common.h b/include/system/whpx-common.h index b86fe9db6e..a4e16e1309 100644 --- a/include/system/whpx-common.h +++ b/include/system/whpx-common.h @@ -20,6 +20,9 @@ int whpx_first_vcpu_starting(CPUState *cpu); int whpx_last_vcpu_stopping(CPUState *cpu); void whpx_memory_init(void); struct whpx_breakpoint *whpx_lookup_breakpoint_by_addr(uint64_t address); +void whpx_flush_cpu_state(CPUState *cpu); +void whpx_get_reg(CPUState *cpu, WHV_REGISTER_NAME reg, WHV_REGISTER_VALUE= * val); +void whpx_set_reg(CPUState *cpu, WHV_REGISTER_NAME reg, WHV_REGISTER_VALUE= val); =20 /* On x64: same as WHvX64ExceptionTypeDebugTrapOrFault */ #define WHPX_INTERCEPT_DEBUG_TRAPS 1 diff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c index d52580a082..9a9a19c196 100644 --- a/target/arm/whpx/whpx-all.c +++ b/target/arm/whpx/whpx-all.c @@ -274,14 +274,6 @@ static struct whpx_sreg_match whpx_sreg_match[] =3D { { WHvArm64RegisterSpEl1, ENCODE_AA64_CP_REG(4, 1, 3, 4, 0) }, }; =20 -static void flush_cpu_state(CPUState *cpu) -{ - if (cpu->vcpu_dirty) { - whpx_set_registers(cpu, WHPX_SET_RUNTIME_STATE); - cpu->vcpu_dirty =3D false; - } -} - HRESULT whpx_set_exception_exit_bitmap(UINT64 exceptions) { if (exceptions !=3D 0) { @@ -314,33 +306,6 @@ void whpx_arch_destroy_vcpu(CPUState *cpu) /* currently empty on Arm */ } =20 -static void whpx_get_reg(CPUState *cpu, WHV_REGISTER_NAME reg, WHV_REGISTE= R_VALUE* val) -{ - struct whpx_state *whpx =3D &whpx_global; - HRESULT hr; - - flush_cpu_state(cpu); - - hr =3D whp_dispatch.WHvGetVirtualProcessorRegisters(whpx->partition, c= pu->cpu_index, - ®, 1, val); - - if (FAILED(hr)) { - error_report("WHPX: Failed to get register %08x, hr=3D%08lx", reg,= hr); - } -} - -static void whpx_set_reg(CPUState *cpu, WHV_REGISTER_NAME reg, WHV_REGISTE= R_VALUE val) -{ - struct whpx_state *whpx =3D &whpx_global; - HRESULT hr; - hr =3D whp_dispatch.WHvSetVirtualProcessorRegisters(whpx->partition, c= pu->cpu_index, - ®, 1, &val); - - if (FAILED(hr)) { - error_report("WHPX: Failed to set register %08x, hr=3D%08lx", reg,= hr); - } -} - static void whpx_get_global_reg(WHV_REGISTER_NAME reg, WHV_REGISTER_VALUE = *val) { struct whpx_state *whpx =3D &whpx_global; @@ -527,7 +492,7 @@ int whpx_vcpu_run(CPUState *cpu) if (advance_pc) { WHV_REGISTER_VALUE pc; =20 - flush_cpu_state(cpu); + whpx_flush_cpu_state(cpu); pc.Reg64 =3D vcpu->exit_ctx.MemoryAccess.Header.Pc + 4; whpx_set_reg(cpu, WHvArm64RegisterPc, pc); } --=20 2.50.1 (Apple Git-155) From nobody Sun Apr 12 00:55:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.84.241; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -11 X-Spam_score: -1.2 X-Spam_bar: - X-Spam_report: (-1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.798, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.79, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1771783462417158500 Content-Type: text/plain; charset="utf-8" Using the mshv backend as a base, move away from winhvemulation to using common QEMU code used by the HVF and mshv backends. Signed-off-by: Mohamed Mediouni --- target/i386/whpx/whpx-all.c | 250 ++++++++++++++++-------------------- 1 file changed, 114 insertions(+), 136 deletions(-) diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index cdcaebbe16..eb6076d2f4 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -15,6 +15,7 @@ #include "gdbstub/helpers.h" #include "qemu/accel.h" #include "accel/accel-ops.h" +#include "system/memory.h" #include "system/whpx.h" #include "system/cpus.h" #include "system/runstate.h" @@ -36,8 +37,12 @@ #include "system/whpx-all.h" #include "system/whpx-common.h" =20 +#include "emulate/x86_decode.h" +#include "emulate/x86_emu.h" +#include "emulate/x86_flags.h" +#include "emulate/x86_mmu.h" + #include -#include =20 #define HYPERV_APIC_BUS_FREQUENCY (200000000ULL) =20 @@ -756,158 +761,138 @@ void whpx_get_registers(CPUState *cpu) x86_update_hflags(env); } =20 -static HRESULT CALLBACK whpx_emu_ioport_callback( - void *ctx, - WHV_EMULATOR_IO_ACCESS_INFO *IoAccess) +static int emulate_instruction(CPUState *cpu, const uint8_t *insn_bytes, s= ize_t insn_len) { - MemTxAttrs attrs =3D { 0 }; - address_space_rw(&address_space_io, IoAccess->Port, attrs, - &IoAccess->Data, IoAccess->AccessSize, - IoAccess->Direction); - return S_OK; -} + X86CPU *x86_cpu =3D X86_CPU(cpu); + CPUX86State *env =3D &x86_cpu->env; + struct x86_decode decode =3D { 0 }; + x86_insn_stream stream =3D { .bytes =3D insn_bytes, .len =3D insn_len = }; =20 -static HRESULT CALLBACK whpx_emu_mmio_callback( - void *ctx, - WHV_EMULATOR_MEMORY_ACCESS_INFO *ma) -{ - CPUState *cs =3D (CPUState *)ctx; - AddressSpace *as =3D cpu_addressspace(cs, MEMTXATTRS_UNSPECIFIED); + whpx_get_registers(cpu); + decode_instruction_stream(env, &decode, &stream); + exec_instruction(env, &decode); + whpx_set_registers(cpu, WHPX_SET_RUNTIME_STATE); =20 - address_space_rw(as, ma->GpaAddress, MEMTXATTRS_UNSPECIFIED, - ma->Data, ma->AccessSize, ma->Direction); - return S_OK; + return 0; } =20 -static HRESULT CALLBACK whpx_emu_getreg_callback( - void *ctx, - const WHV_REGISTER_NAME *RegisterNames, - UINT32 RegisterCount, - WHV_REGISTER_VALUE *RegisterValues) +static int whpx_handle_mmio(CPUState *cpu, WHV_RUN_VP_EXIT_CONTEXT *exit_c= tx) { - HRESULT hr; - struct whpx_state *whpx =3D &whpx_global; - CPUState *cpu =3D (CPUState *)ctx; + WHV_MEMORY_ACCESS_CONTEXT *ctx =3D &exit_ctx->MemoryAccess; + int ret; =20 - hr =3D whp_dispatch.WHvGetVirtualProcessorRegisters( - whpx->partition, cpu->cpu_index, - RegisterNames, RegisterCount, - RegisterValues); - if (FAILED(hr)) { - error_report("WHPX: Failed to get virtual processor registers," - " hr=3D%08lx", hr); + ret =3D emulate_instruction(cpu, ctx->InstructionBytes, ctx->Instructi= onByteCount); + if (ret < 0) { + error_report("failed to emulate mmio"); + return -1; } =20 - return hr; + return 0; } =20 -static HRESULT CALLBACK whpx_emu_setreg_callback( - void *ctx, - const WHV_REGISTER_NAME *RegisterNames, - UINT32 RegisterCount, - const WHV_REGISTER_VALUE *RegisterValues) +static void handle_io(CPUState *env, uint16_t port, void *buffer, + int direction, int size, int count) { - HRESULT hr; - struct whpx_state *whpx =3D &whpx_global; - CPUState *cpu =3D (CPUState *)ctx; + int i; + uint8_t *ptr =3D buffer; =20 - hr =3D whp_dispatch.WHvSetVirtualProcessorRegisters( - whpx->partition, cpu->cpu_index, - RegisterNames, RegisterCount, - RegisterValues); - if (FAILED(hr)) { - error_report("WHPX: Failed to set virtual processor registers," - " hr=3D%08lx", hr); + for (i =3D 0; i < count; i++) { + address_space_rw(&address_space_io, port, MEMTXATTRS_UNSPECIFIED, + ptr, size, + direction); + ptr +=3D size; } - - /* - * The emulator just successfully wrote the register state. We clear t= he - * dirty state so we avoid the double write on resume of the VP. - */ - cpu->vcpu_dirty =3D false; - - return hr; } =20 -static HRESULT CALLBACK whpx_emu_translate_callback( - void *ctx, - WHV_GUEST_VIRTUAL_ADDRESS Gva, - WHV_TRANSLATE_GVA_FLAGS TranslateFlags, - WHV_TRANSLATE_GVA_RESULT_CODE *TranslationResult, - WHV_GUEST_PHYSICAL_ADDRESS *Gpa) +static void whpx_bump_rip(CPUState *cpu, WHV_RUN_VP_EXIT_CONTEXT *exit_ctx) { - HRESULT hr; - struct whpx_state *whpx =3D &whpx_global; - CPUState *cpu =3D (CPUState *)ctx; - WHV_TRANSLATE_GVA_RESULT res; - - hr =3D whp_dispatch.WHvTranslateGva(whpx->partition, cpu->cpu_index, - Gva, TranslateFlags, &res, Gpa); - if (FAILED(hr)) { - error_report("WHPX: Failed to translate GVA, hr=3D%08lx", hr); - } else { - *TranslationResult =3D res.ResultCode; - } - - return hr; + WHV_REGISTER_VALUE reg; + whpx_get_reg(cpu, WHvX64RegisterRip, ®); + reg.Reg64 =3D exit_ctx->VpContext.Rip + exit_ctx->VpContext.Instructio= nLength; + whpx_set_reg(cpu, WHvX64RegisterRip, reg); } =20 -static const WHV_EMULATOR_CALLBACKS whpx_emu_callbacks =3D { - .Size =3D sizeof(WHV_EMULATOR_CALLBACKS), - .WHvEmulatorIoPortCallback =3D whpx_emu_ioport_callback, - .WHvEmulatorMemoryCallback =3D whpx_emu_mmio_callback, - .WHvEmulatorGetVirtualProcessorRegisters =3D whpx_emu_getreg_callback, - .WHvEmulatorSetVirtualProcessorRegisters =3D whpx_emu_setreg_callback, - .WHvEmulatorTranslateGvaPage =3D whpx_emu_translate_callback, -}; - -static int whpx_handle_mmio(CPUState *cpu, WHV_MEMORY_ACCESS_CONTEXT *ctx) +static int whpx_handle_portio(CPUState *cpu, + WHV_RUN_VP_EXIT_CONTEXT *exit_ctx) { - HRESULT hr; - AccelCPUState *vcpu =3D cpu->accel; - WHV_EMULATOR_STATUS emu_status; - - hr =3D whp_dispatch.WHvEmulatorTryMmioEmulation( - vcpu->emulator, cpu, - &vcpu->exit_ctx.VpContext, ctx, - &emu_status); - if (FAILED(hr)) { - error_report("WHPX: Failed to parse MMIO access, hr=3D%08lx", hr); - return -1; - } + WHV_X64_IO_PORT_ACCESS_CONTEXT *ctx =3D &exit_ctx->IoPortAccess; + X86CPU *x86_cpu =3D X86_CPU(cpu); + CPUX86State *env =3D &x86_cpu->env; + int ret; =20 - if (!emu_status.EmulationSuccessful) { - error_report("WHPX: Failed to emulate MMIO access with" - " EmulatorReturnStatus: %u", emu_status.AsUINT32); + if (!ctx->AccessInfo.StringOp && !ctx->AccessInfo.IsWrite) { + uint64_t val =3D 0; + WHV_REGISTER_VALUE reg; + + whpx_get_reg(cpu, WHvX64RegisterRax, ®); + handle_io(cpu, ctx->PortNumber, &val, 0, ctx->AccessInfo.AccessSiz= e, 1); + if (ctx->AccessInfo.AccessSize =3D=3D 1) { + reg.Reg8 =3D val; + } else if (ctx->AccessInfo.AccessSize =3D=3D 2) { + reg.Reg16 =3D val; + } else if (ctx->AccessInfo.AccessSize =3D=3D 4) { + reg.Reg64 =3D (uint32_t)val; + } else { + reg.Reg64 =3D (uint64_t)val; + } + whpx_bump_rip(cpu, exit_ctx); + whpx_set_reg(cpu, WHvX64RegisterRax, reg); + return 0; + } else if (!ctx->AccessInfo.StringOp && ctx->AccessInfo.IsWrite) { + RAX(env) =3D ctx->Rax; + handle_io(cpu, ctx->PortNumber, &RAX(env), 1, ctx->AccessInfo.Acce= ssSize, 1); + whpx_bump_rip(cpu, exit_ctx); + return 0; + } + + ret =3D emulate_instruction(cpu, ctx->InstructionBytes, exit_ctx->VpCo= ntext.InstructionLength); + if (ret < 0) { + error_report("failed to emulate I/O port access"); return -1; } =20 return 0; } =20 -static int whpx_handle_portio(CPUState *cpu, - WHV_X64_IO_PORT_ACCESS_CONTEXT *ctx) +static void write_mem(CPUState *cpu, void *data, target_ulong addr, int by= tes) { - HRESULT hr; - AccelCPUState *vcpu =3D cpu->accel; - WHV_EMULATOR_STATUS emu_status; + vmx_write_mem(cpu, addr, data, bytes); +} =20 - hr =3D whp_dispatch.WHvEmulatorTryIoEmulation( - vcpu->emulator, cpu, - &vcpu->exit_ctx.VpContext, ctx, - &emu_status); - if (FAILED(hr)) { - error_report("WHPX: Failed to parse PortIO access, hr=3D%08lx", hr= ); - return -1; - } +static void read_mem(CPUState *cpu, void *data, target_ulong addr, int byt= es) +{ + vmx_read_mem(cpu, data, addr, bytes); +} =20 - if (!emu_status.EmulationSuccessful) { - error_report("WHPX: Failed to emulate PortIO access with" - " EmulatorReturnStatus: %u", emu_status.AsUINT32); - return -1; +static void read_segment_descriptor(CPUState *cpu, + struct x86_segment_descriptor *desc, + enum X86Seg seg_idx) +{ + bool ret; + X86CPU *x86_cpu =3D X86_CPU(cpu); + CPUX86State *env =3D &x86_cpu->env; + SegmentCache *seg =3D &env->segs[seg_idx]; + x86_segment_selector sel =3D { .sel =3D seg->selector & 0xFFFF }; + + ret =3D x86_read_segment_descriptor(cpu, desc, sel); + if (ret =3D=3D false) { + error_report("failed to read segment descriptor"); + abort(); } +} =20 - return 0; + +static const struct x86_emul_ops whpx_x86_emul_ops =3D { + .read_mem =3D read_mem, + .write_mem =3D write_mem, + .read_segment_descriptor =3D read_segment_descriptor, + .handle_io =3D handle_io +}; + +static void whpx_init_emu(void) +{ + init_decoder(); + init_emu(&whpx_x86_emul_ops); } =20 /* @@ -1279,8 +1264,9 @@ bool whpx_arch_supports_guest_debug(void) =20 void whpx_arch_destroy_vcpu(CPUState *cpu) { - AccelCPUState *vcpu =3D cpu->accel; - whp_dispatch.WHvEmulatorDestroyEmulator(vcpu->emulator); + X86CPU *x86cpu =3D X86_CPU(cpu); + CPUX86State *env =3D &x86cpu->env; + g_free(env->emu_mmio_buf); } =20 /* Returns the address of the next instruction that is about to be execute= d. */ @@ -1639,11 +1625,11 @@ int whpx_vcpu_run(CPUState *cpu) =20 switch (vcpu->exit_ctx.ExitReason) { case WHvRunVpExitReasonMemoryAccess: - ret =3D whpx_handle_mmio(cpu, &vcpu->exit_ctx.MemoryAccess); + ret =3D whpx_handle_mmio(cpu, &vcpu->exit_ctx); break; =20 case WHvRunVpExitReasonX64IoPortAccess: - ret =3D whpx_handle_portio(cpu, &vcpu->exit_ctx.IoPortAccess); + ret =3D whpx_handle_portio(cpu, &vcpu->exit_ctx); break; =20 case WHvRunVpExitReasonX64InterruptWindow: @@ -1990,22 +1976,11 @@ int whpx_init_vcpu(CPUState *cpu) =20 vcpu =3D g_new0(AccelCPUState, 1); =20 - hr =3D whp_dispatch.WHvEmulatorCreateEmulator( - &whpx_emu_callbacks, - &vcpu->emulator); - if (FAILED(hr)) { - error_report("WHPX: Failed to setup instruction completion support= ," - " hr=3D%08lx", hr); - ret =3D -EINVAL; - goto error; - } - hr =3D whp_dispatch.WHvCreateVirtualProcessor( whpx->partition, cpu->cpu_index, 0); if (FAILED(hr)) { error_report("WHPX: Failed to create a virtual processor," " hr=3D%08lx", hr); - whp_dispatch.WHvEmulatorDestroyEmulator(vcpu->emulator); ret =3D -EINVAL; goto error; } @@ -2067,6 +2042,8 @@ int whpx_init_vcpu(CPUState *cpu) max_vcpu_index =3D max(max_vcpu_index, cpu->cpu_index); qemu_add_vm_change_state_handler(whpx_cpu_update_state, env); =20 + env->emu_mmio_buf =3D g_new(char, 4096); + return 0; =20 error: @@ -2256,6 +2233,7 @@ int whpx_accel_init(AccelState *as, MachineState *ms) } =20 whpx_memory_init(); + whpx_init_emu(); =20 printf("Windows Hypervisor Platform accelerator is operational\n"); return 0; --=20 2.50.1 (Apple Git-155) From nobody Sun Apr 12 00:55:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.84.208; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.798, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.79, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1771783437973158500 Content-Type: text/plain; charset="utf-8" Signed-off-by: Mohamed Mediouni --- target/i386/whpx/whpx-all.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index eb6076d2f4..0524885053 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -412,6 +412,7 @@ void whpx_set_registers(CPUState *cpu, int level) vcxt.values[idx++].Reg64 =3D env->eip; =20 assert(whpx_register_names[idx] =3D=3D WHvX64RegisterRflags); + lflags_to_rflags(env); vcxt.values[idx++].Reg64 =3D env->eflags; =20 /* Translate 6+4 segment registers. HV and QEMU order matches */ @@ -637,6 +638,7 @@ void whpx_get_registers(CPUState *cpu) env->eip =3D vcxt.values[idx++].Reg64; assert(whpx_register_names[idx] =3D=3D WHvX64RegisterRflags); env->eflags =3D vcxt.values[idx++].Reg64; + rflags_to_lflags(env); =20 /* Translate 6+4 segment registers. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.84.170; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.798, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.79, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1771783510789154100 Content-Type: text/plain; charset="utf-8" After moving away to target/i386/emulate, this is no longer necessary. Signed-off-by: Mohamed Mediouni --- accel/whpx/whpx-common.c | 22 ---------------------- include/system/whpx-common.h | 3 --- include/system/whpx-internal.h | 16 ---------------- meson.build | 3 +-- 4 files changed, 1 insertion(+), 43 deletions(-) diff --git a/accel/whpx/whpx-common.c b/accel/whpx/whpx-common.c index 21e9f1a178..88eef55799 100644 --- a/accel/whpx/whpx-common.c +++ b/accel/whpx/whpx-common.c @@ -39,9 +39,6 @@ bool whpx_allowed; bool whpx_irqchip_in_kernel; static bool whp_dispatch_initialized; static HMODULE hWinHvPlatform; -#ifdef HOST_X86_64 -static HMODULE hWinHvEmulation; -#endif =20 struct whpx_state whpx_global; struct WHPDispatch whp_dispatch; @@ -393,7 +390,6 @@ static bool load_whp_dispatch_fns(HMODULE *handle, HMODULE hLib =3D *handle; =20 #define WINHV_PLATFORM_DLL "WinHvPlatform.dll" - #define WINHV_EMULATION_DLL "WinHvEmulation.dll" #define WHP_LOAD_FIELD_OPTIONAL(return_type, function_name, signature)= \ whp_dispatch.function_name =3D \ (function_name ## _t)GetProcAddress(hLib, #function_name); \ @@ -420,14 +416,6 @@ static bool load_whp_dispatch_fns(HMODULE *handle, WHP_LOAD_LIB(WINHV_PLATFORM_DLL, hLib) LIST_WINHVPLATFORM_FUNCTIONS(WHP_LOAD_FIELD) break; - case WINHV_EMULATION_FNS_DEFAULT: -#ifdef HOST_X86_64 - WHP_LOAD_LIB(WINHV_EMULATION_DLL, hLib) - LIST_WINHVEMULATION_FUNCTIONS(WHP_LOAD_FIELD) -#else - g_assert_not_reached(); -#endif - break; case WINHV_PLATFORM_FNS_SUPPLEMENTAL: WHP_LOAD_LIB(WINHV_PLATFORM_DLL, hLib) LIST_WINHVPLATFORM_FUNCTIONS_SUPPLEMENTAL(WHP_LOAD_FIELD_OPTIONAL) @@ -543,11 +531,6 @@ bool init_whp_dispatch(void) if (!load_whp_dispatch_fns(&hWinHvPlatform, WINHV_PLATFORM_FNS_DEFAULT= )) { goto error; } -#ifdef HOST_X86_64 - if (!load_whp_dispatch_fns(&hWinHvEmulation, WINHV_EMULATION_FNS_DEFAU= LT)) { - goto error; - } -#endif assert(load_whp_dispatch_fns(&hWinHvPlatform, WINHV_PLATFORM_FNS_SUPPLEMENTAL)); whp_dispatch_initialized =3D true; @@ -557,11 +540,6 @@ error: if (hWinHvPlatform) { FreeLibrary(hWinHvPlatform); } -#ifdef HOST_X86_64 - if (hWinHvEmulation) { - FreeLibrary(hWinHvEmulation); - } -#endif return false; } =20 diff --git a/include/system/whpx-common.h b/include/system/whpx-common.h index a4e16e1309..04289afd97 100644 --- a/include/system/whpx-common.h +++ b/include/system/whpx-common.h @@ -3,9 +3,6 @@ #define SYSTEM_WHPX_COMMON_H =20 struct AccelCPUState { -#ifdef HOST_X86_64 - WHV_EMULATOR_HANDLE emulator; -#endif bool window_registered; bool interruptable; bool ready_for_pic_interrupt; diff --git a/include/system/whpx-internal.h b/include/system/whpx-internal.h index ad6ade223e..7a1c9871f1 100644 --- a/include/system/whpx-internal.h +++ b/include/system/whpx-internal.h @@ -4,9 +4,6 @@ =20 #include #include -#ifdef HOST_X86_64 -#include -#endif #include "hw/i386/apic.h" #include "exec/vaddr.h" =20 @@ -89,12 +86,6 @@ void whpx_apic_get(APICCommonState *s); X(HRESULT, WHvResetPartition, \ (WHV_PARTITION_HANDLE Partition)) \ =20 -#define LIST_WINHVEMULATION_FUNCTIONS(X) \ - X(HRESULT, WHvEmulatorCreateEmulator, (const WHV_EMULATOR_CALLBACKS* Cal= lbacks, WHV_EMULATOR_HANDLE* Emulator)) \ - X(HRESULT, WHvEmulatorDestroyEmulator, (WHV_EMULATOR_HANDLE Emulator)) \ - X(HRESULT, WHvEmulatorTryIoEmulation, (WHV_EMULATOR_HANDLE Emulator, VOI= D* Context, const WHV_VP_EXIT_CONTEXT* VpContext, const WHV_X64_IO_PORT_ACC= ESS_CONTEXT* IoInstructionContext, WHV_EMULATOR_STATUS* EmulatorReturnStatu= s)) \ - X(HRESULT, WHvEmulatorTryMmioEmulation, (WHV_EMULATOR_HANDLE Emulator, V= OID* Context, const WHV_VP_EXIT_CONTEXT* VpContext, const WHV_MEMORY_ACCESS= _CONTEXT* MmioInstructionContext, WHV_EMULATOR_STATUS* EmulatorReturnStatus= )) \ - #define WHP_DEFINE_TYPE(return_type, function_name, signature) \ typedef return_type (WINAPI *function_name ## _t) signature; =20 @@ -103,16 +94,10 @@ void whpx_apic_get(APICCommonState *s); =20 /* Define function typedef */ LIST_WINHVPLATFORM_FUNCTIONS(WHP_DEFINE_TYPE) -#ifdef HOST_X86_64 -LIST_WINHVEMULATION_FUNCTIONS(WHP_DEFINE_TYPE) -#endif LIST_WINHVPLATFORM_FUNCTIONS_SUPPLEMENTAL(WHP_DEFINE_TYPE) =20 struct WHPDispatch { LIST_WINHVPLATFORM_FUNCTIONS(WHP_DECLARE_MEMBER) -#ifdef HOST_X86_64 - LIST_WINHVEMULATION_FUNCTIONS(WHP_DECLARE_MEMBER) -#endif LIST_WINHVPLATFORM_FUNCTIONS_SUPPLEMENTAL(WHP_DECLARE_MEMBER) }; =20 @@ -122,7 +107,6 @@ bool init_whp_dispatch(void); =20 typedef enum WHPFunctionList { WINHV_PLATFORM_FNS_DEFAULT, - WINHV_EMULATION_FNS_DEFAULT, WINHV_PLATFORM_FNS_SUPPLEMENTAL } WHPFunctionList; =20 diff --git a/meson.build b/meson.build index 4af32c3e1f..86bc807e56 100644 --- a/meson.build +++ b/meson.build @@ -865,8 +865,7 @@ if get_option('whpx').allowed() and host_os =3D=3D 'win= dows' endif # Leave CONFIG_WHPX disabled else - if cc.has_header('winhvplatform.h', required: get_option('whpx')) and \ - cc.has_header('winhvemulation.h', required: get_option('whpx')) + if cc.has_header('winhvplatform.h', required: get_option('whpx')) accelerators +=3D 'CONFIG_WHPX' endif endif --=20 2.50.1 (Apple Git-155) From nobody Sun Apr 12 00:55:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Signed-off-by: Mohamed Mediouni Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/i386/whpx/whpx-all.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index 0524885053..2f2c613eda 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -2163,7 +2163,6 @@ int whpx_accel_init(AccelState *as, MachineState *ms) whp_dispatch.WHvSetVirtualProcessorInterruptControllerState2) { WHV_X64_LOCAL_APIC_EMULATION_MODE mode =3D WHvX64LocalApicEmulationModeXApic; - printf("WHPX: setting APIC emulation mode in the hypervisor\n"); hr =3D whp_dispatch.WHvSetPartitionProperty( whpx->partition, WHvPartitionPropertyCodeLocalApicEmulationMode, @@ -2237,7 +2236,6 @@ int whpx_accel_init(AccelState *as, MachineState *ms) whpx_memory_init(); whpx_init_emu(); =20 - printf("Windows Hypervisor Platform accelerator is operational\n"); return 0; =20 error: --=20 2.50.1 (Apple Git-155) From nobody Sun Apr 12 00:55:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.84.134; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.798, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.79, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1771783498468154100 Content-Type: text/plain; charset="utf-8" Very partial in its current state and results in significantly inconsistent CPUID data. Remove it until it's reimplemented later. Signed-off-by: Mohamed Mediouni --- target/i386/whpx/whpx-all.c | 104 ------------------------------------ 1 file changed, 104 deletions(-) diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index 2f2c613eda..baa3169c55 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -1795,75 +1795,6 @@ int whpx_vcpu_run(CPUState *cpu) ret =3D 0; break; } - case WHvRunVpExitReasonX64Cpuid: { - WHV_REGISTER_VALUE reg_values[5]; - WHV_REGISTER_NAME reg_names[5]; - UINT32 reg_count =3D 5; - UINT64 cpuid_fn, rip =3D 0, rax =3D 0, rcx =3D 0, rdx =3D 0, r= bx =3D 0; - X86CPU *x86_cpu =3D X86_CPU(cpu); - CPUX86State *env =3D &x86_cpu->env; - - memset(reg_values, 0, sizeof(reg_values)); - - rip =3D vcpu->exit_ctx.VpContext.Rip + - vcpu->exit_ctx.VpContext.InstructionLength; - cpuid_fn =3D vcpu->exit_ctx.CpuidAccess.Rax; - - /* - * Ideally, these should be supplied to the hypervisor during = VCPU - * initialization and it should be able to satisfy this reques= t. - * But, currently, WHPX doesn't support setting CPUID values i= n the - * hypervisor once the partition has been setup, which is too = late - * since VCPUs are realized later. For now, use the values from - * QEMU to satisfy these requests, until WHPX adds support for - * being able to set these values in the hypervisor at runtime. - */ - cpu_x86_cpuid(env, cpuid_fn, 0, (UINT32 *)&rax, (UINT32 *)&rbx, - (UINT32 *)&rcx, (UINT32 *)&rdx); - switch (cpuid_fn) { - case 0x40000000: - /* Expose the vmware cpu frequency cpuid leaf */ - rax =3D 0x40000010; - rbx =3D rcx =3D rdx =3D 0; - break; - - case 0x40000010: - rax =3D env->tsc_khz; - rbx =3D env->apic_bus_freq / 1000; /* Hz to KHz */ - rcx =3D rdx =3D 0; - break; - - case 0x80000001: - /* Remove any support of OSVW */ - rcx &=3D ~CPUID_EXT3_OSVW; - break; - } - - reg_names[0] =3D WHvX64RegisterRip; - reg_names[1] =3D WHvX64RegisterRax; - reg_names[2] =3D WHvX64RegisterRcx; - reg_names[3] =3D WHvX64RegisterRdx; - reg_names[4] =3D WHvX64RegisterRbx; - - reg_values[0].Reg64 =3D rip; - reg_values[1].Reg64 =3D rax; - reg_values[2].Reg64 =3D rcx; - reg_values[3].Reg64 =3D rdx; - reg_values[4].Reg64 =3D rbx; - - hr =3D whp_dispatch.WHvSetVirtualProcessorRegisters( - whpx->partition, cpu->cpu_index, - reg_names, - reg_count, - reg_values); - - if (FAILED(hr)) { - error_report("WHPX: Failed to set CpuidAccess state regist= ers," - " hr=3D%08lx", hr); - } - ret =3D 0; - break; - } case WHvRunVpExitReasonException: whpx_get_registers(cpu); =20 @@ -2017,26 +1948,6 @@ int whpx_init_vcpu(CPUState *cpu) } } =20 - /* - * If the vmware cpuid frequency leaf option is set, and we have a val= id - * tsc value, trap the corresponding cpuid's. - */ - if (x86_cpu->vmware_cpuid_freq && env->tsc_khz) { - UINT32 cpuidExitList[] =3D {1, 0x80000001, 0x40000000, 0x40000010}; - - hr =3D whp_dispatch.WHvSetPartitionProperty( - whpx->partition, - WHvPartitionPropertyCodeCpuidExitList, - cpuidExitList, - RTL_NUMBER_OF(cpuidExitList) * sizeof(UINT32)); - - if (FAILED(hr)) { - error_report("WHPX: Failed to set partition CpuidExitList hr= =3D%08lx", - hr); - ret =3D -EINVAL; - goto error; - } - } =20 vcpu->interruptable =3D true; cpu->vcpu_dirty =3D true; @@ -2073,7 +1984,6 @@ int whpx_accel_init(AccelState *as, MachineState *ms) WHV_CAPABILITY whpx_cap; UINT32 whpx_cap_size; WHV_PARTITION_PROPERTY prop; - UINT32 cpuidExitList[] =3D {1, 0x80000001}; WHV_CAPABILITY_FEATURES features =3D {0}; =20 whpx =3D &whpx_global; @@ -2183,7 +2093,6 @@ int whpx_accel_init(AccelState *as, MachineState *ms) /* Register for MSR and CPUID exits */ memset(&prop, 0, sizeof(WHV_PARTITION_PROPERTY)); prop.ExtendedVmExits.X64MsrExit =3D 1; - prop.ExtendedVmExits.X64CpuidExit =3D 1; prop.ExtendedVmExits.ExceptionExit =3D 1; if (whpx_irqchip_in_kernel()) { prop.ExtendedVmExits.X64ApicInitSipiExitTrap =3D 1; @@ -2200,19 +2109,6 @@ int whpx_accel_init(AccelState *as, MachineState *ms) goto error; } =20 - hr =3D whp_dispatch.WHvSetPartitionProperty( - whpx->partition, - WHvPartitionPropertyCodeCpuidExitList, - cpuidExitList, - RTL_NUMBER_OF(cpuidExitList) * sizeof(UINT32)); - - if (FAILED(hr)) { - error_report("WHPX: Failed to set partition CpuidExitList hr=3D%08= lx", - hr); - ret =3D -EINVAL; - goto error; - } - /* * We do not want to intercept any exceptions from the guest, * until we actually start debugging with gdb. --=20 2.50.1 (Apple Git-155) From nobody Sun Apr 12 00:55:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Make register state loads use state levels too. Signed-off-by: Mohamed Mediouni Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- accel/whpx/whpx-common.c | 8 ++++---- include/system/whpx-accel-ops.h | 16 ++++++++++------ include/system/whpx-all.h | 6 ++++-- target/arm/whpx/whpx-all.c | 8 ++++---- target/i386/whpx/whpx-all.c | 16 ++++++++-------- 5 files changed, 30 insertions(+), 24 deletions(-) diff --git a/accel/whpx/whpx-common.c b/accel/whpx/whpx-common.c index 88eef55799..4863fc8663 100644 --- a/accel/whpx/whpx-common.c +++ b/accel/whpx/whpx-common.c @@ -46,7 +46,7 @@ struct WHPDispatch whp_dispatch; void whpx_flush_cpu_state(CPUState *cpu) { if (cpu->vcpu_dirty) { - whpx_set_registers(cpu, WHPX_SET_RUNTIME_STATE); + whpx_set_registers(cpu, WHPX_LEVEL_RUNTIME_STATE); cpu->vcpu_dirty =3D false; } } @@ -180,7 +180,7 @@ int whpx_last_vcpu_stopping(CPUState *cpu) static void do_whpx_cpu_synchronize_state(CPUState *cpu, run_on_cpu_data a= rg) { if (!cpu->vcpu_dirty) { - whpx_get_registers(cpu); + whpx_get_registers(cpu, WHPX_LEVEL_FULL_STATE); cpu->vcpu_dirty =3D true; } } @@ -188,14 +188,14 @@ static void do_whpx_cpu_synchronize_state(CPUState *c= pu, run_on_cpu_data arg) static void do_whpx_cpu_synchronize_post_reset(CPUState *cpu, run_on_cpu_data arg) { - whpx_set_registers(cpu, WHPX_SET_RESET_STATE); + whpx_set_registers(cpu, WHPX_LEVEL_RESET_STATE); cpu->vcpu_dirty =3D false; } =20 static void do_whpx_cpu_synchronize_post_init(CPUState *cpu, run_on_cpu_data arg) { - whpx_set_registers(cpu, WHPX_SET_FULL_STATE); + whpx_set_registers(cpu, WHPX_LEVEL_FULL_STATE); cpu->vcpu_dirty =3D false; } =20 diff --git a/include/system/whpx-accel-ops.h b/include/system/whpx-accel-op= s.h index ed9d4c49f4..4b2a732654 100644 --- a/include/system/whpx-accel-ops.h +++ b/include/system/whpx-accel-ops.h @@ -22,11 +22,15 @@ void whpx_cpu_synchronize_post_reset(CPUState *cpu); void whpx_cpu_synchronize_post_init(CPUState *cpu); void whpx_cpu_synchronize_pre_loadvm(CPUState *cpu); =20 -/* state subset only touched by the VCPU itself during runtime */ -#define WHPX_SET_RUNTIME_STATE 1 -/* state subset modified during VCPU reset */ -#define WHPX_SET_RESET_STATE 2 -/* full state set, modified during initialization or on vmload */ -#define WHPX_SET_FULL_STATE 3 +typedef enum WHPXStateLevel { + /* subset of runtime state for faster returns from vmexit */ + WHPX_LEVEL_FAST_RUNTIME_STATE, + /* state subset only touched by the VCPU itself during runtime */ + WHPX_LEVEL_RUNTIME_STATE, + /* state subset modified during VCPU reset */ + WHPX_LEVEL_RESET_STATE, + /* full state set, modified during initialization or on vmload */ + WHPX_LEVEL_FULL_STATE +} WHPXStateLevel; =20 #endif /* TARGET_I386_WHPX_ACCEL_OPS_H */ diff --git a/include/system/whpx-all.h b/include/system/whpx-all.h index b831c463b0..2cbea71b14 100644 --- a/include/system/whpx-all.h +++ b/include/system/whpx-all.h @@ -2,10 +2,12 @@ #ifndef SYSTEM_WHPX_ALL_H #define SYSTEM_WHPX_ALL_H =20 +#include "system/whpx-accel-ops.h" + /* Called by whpx-common */ int whpx_vcpu_run(CPUState *cpu); -void whpx_get_registers(CPUState *cpu); -void whpx_set_registers(CPUState *cpu, int level); +void whpx_get_registers(CPUState *cpu, WHPXStateLevel level); +void whpx_set_registers(CPUState *cpu, WHPXStateLevel level); int whpx_accel_init(AccelState *as, MachineState *ms); void whpx_cpu_instance_init(CPUState *cs); HRESULT whpx_set_exception_exit_bitmap(UINT64 exceptions); diff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c index 9a9a19c196..a4d54b027f 100644 --- a/target/arm/whpx/whpx-all.c +++ b/target/arm/whpx/whpx-all.c @@ -418,7 +418,7 @@ int whpx_vcpu_run(CPUState *cpu) do { bool advance_pc =3D false; if (cpu->vcpu_dirty) { - whpx_set_registers(cpu, WHPX_SET_RUNTIME_STATE); + whpx_set_registers(cpu, WHPX_LEVEL_RUNTIME_STATE); cpu->vcpu_dirty =3D false; } =20 @@ -483,7 +483,7 @@ int whpx_vcpu_run(CPUState *cpu) default: error_report("WHPX: Unexpected VP exit code 0x%08x", vcpu->exit_ctx.ExitReason); - whpx_get_registers(cpu); + whpx_get_registers(cpu, WHPX_LEVEL_FULL_STATE); bql_lock(); qemu_system_guest_panicked(cpu_get_crash_info(cpu)); bql_unlock(); @@ -517,7 +517,7 @@ static void clean_whv_register_value(WHV_REGISTER_VALUE= *val) memset(val, 0, sizeof(WHV_REGISTER_VALUE)); } =20 -void whpx_get_registers(CPUState *cpu) +void whpx_get_registers(CPUState *cpu, WHPXStateLevel level) { ARMCPU *arm_cpu =3D ARM_CPU(cpu); CPUARMState *env =3D &arm_cpu->env; @@ -564,7 +564,7 @@ void whpx_get_registers(CPUState *cpu) aarch64_restore_sp(env, arm_current_el(env)); } =20 -void whpx_set_registers(CPUState *cpu, int level) +void whpx_set_registers(CPUState *cpu, WHPXStateLevel level) { ARMCPU *arm_cpu =3D ARM_CPU(cpu); CPUARMState *env =3D &arm_cpu->env; diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index baa3169c55..c09d9affef 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -367,7 +367,7 @@ static uint64_t whpx_cr8_to_apic_tpr(uint64_t cr8) return cr8 << 4; } =20 -void whpx_set_registers(CPUState *cpu, int level) +void whpx_set_registers(CPUState *cpu, WHPXStateLevel level) { struct whpx_state *whpx =3D &whpx_global; AccelCPUState *vcpu =3D cpu->accel; @@ -386,7 +386,7 @@ void whpx_set_registers(CPUState *cpu, int level) * Following MSRs have side effects on the guest or are too heavy for * runtime. Limit them to full state update. */ - if (level >=3D WHPX_SET_RESET_STATE) { + if (level >=3D WHPX_LEVEL_RESET_STATE) { whpx_set_tsc(cpu); } =20 @@ -583,7 +583,7 @@ static void whpx_get_xcrs(CPUState *cpu) cpu_env(cpu)->xcr0 =3D xcr0.Reg64; } =20 -void whpx_get_registers(CPUState *cpu) +void whpx_get_registers(CPUState *cpu, WHPXStateLevel level) { struct whpx_state *whpx =3D &whpx_global; AccelCPUState *vcpu =3D cpu->accel; @@ -770,10 +770,10 @@ static int emulate_instruction(CPUState *cpu, const u= int8_t *insn_bytes, size_t struct x86_decode decode =3D { 0 }; x86_insn_stream stream =3D { .bytes =3D insn_bytes, .len =3D insn_len = }; =20 - whpx_get_registers(cpu); + whpx_get_registers(cpu, WHPX_LEVEL_FAST_RUNTIME_STATE); decode_instruction_stream(env, &decode, &stream); exec_instruction(env, &decode); - whpx_set_registers(cpu, WHPX_SET_RUNTIME_STATE); + whpx_set_registers(cpu, WHPX_LEVEL_FAST_RUNTIME_STATE); =20 return 0; } @@ -1589,7 +1589,7 @@ int whpx_vcpu_run(CPUState *cpu) =20 do { if (cpu->vcpu_dirty) { - whpx_set_registers(cpu, WHPX_SET_RUNTIME_STATE); + whpx_set_registers(cpu, WHPX_LEVEL_RUNTIME_STATE); cpu->vcpu_dirty =3D false; } =20 @@ -1796,7 +1796,7 @@ int whpx_vcpu_run(CPUState *cpu) break; } case WHvRunVpExitReasonException: - whpx_get_registers(cpu); + whpx_get_registers(cpu, WHPX_LEVEL_FULL_STATE); =20 if ((vcpu->exit_ctx.VpException.ExceptionType =3D=3D WHvX64ExceptionTypeDebugTrapOrFault) && @@ -1828,7 +1828,7 @@ int whpx_vcpu_run(CPUState *cpu) default: error_report("WHPX: Unexpected VP exit code %d", vcpu->exit_ctx.ExitReason); - whpx_get_registers(cpu); + whpx_get_registers(cpu, WHPX_LEVEL_FULL_STATE); bql_lock(); qemu_system_guest_panicked(cpu_get_crash_info(cpu)); bql_unlock(); --=20 2.50.1 (Apple Git-155) From nobody Sun Apr 12 00:55:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.87.114; envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.798, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.79, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1771783447797154100 Content-Type: text/plain; charset="utf-8" Optimise vmexits by save/restoring less state in those cases instead of the= full state. Signed-off-by: Mohamed Mediouni Reviewed-by: Bernhard Beschow Tested-by: Bernhard Beschow --- target/i386/whpx/whpx-all.c | 202 +++++++++++++++++++----------------- 1 file changed, 104 insertions(+), 98 deletions(-) diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index c09d9affef..ab583e922d 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -422,118 +422,124 @@ void whpx_set_registers(CPUState *cpu, WHPXStateLev= el level) } =20 assert(idx =3D=3D WHvX64RegisterLdtr); - vcxt.values[idx++].Segment =3D whpx_seg_q2h(&env->ldt, 0, 0); - - assert(idx =3D=3D WHvX64RegisterTr); - vcxt.values[idx++].Segment =3D whpx_seg_q2h(&env->tr, 0, 0); - - assert(idx =3D=3D WHvX64RegisterIdtr); - vcxt.values[idx].Table.Base =3D env->idt.base; - vcxt.values[idx].Table.Limit =3D env->idt.limit; - idx +=3D 1; - - assert(idx =3D=3D WHvX64RegisterGdtr); - vcxt.values[idx].Table.Base =3D env->gdt.base; - vcxt.values[idx].Table.Limit =3D env->gdt.limit; - idx +=3D 1; - - /* CR0, 2, 3, 4, 8 */ - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterCr0); - vcxt.values[idx++].Reg64 =3D env->cr[0]; - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterCr2); - vcxt.values[idx++].Reg64 =3D env->cr[2]; - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterCr3); - vcxt.values[idx++].Reg64 =3D env->cr[3]; - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterCr4); - vcxt.values[idx++].Reg64 =3D env->cr[4]; - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterCr8); - vcxt.values[idx++].Reg64 =3D vcpu->tpr; - - /* 8 Debug Registers - Skipped */ - /* - * Extended control registers needs to be handled separately depending - * on whether xsave is supported/enabled or not. + * Skip those registers for synchronisation after MMIO accesses + * as they're not going to be modified in that case. */ - whpx_set_xcrs(cpu); - - /* 16 XMM registers */ - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterXmm0); - idx_next =3D idx + 16; - for (i =3D 0; i < sizeof(env->xmm_regs) / sizeof(ZMMReg); i +=3D 1, id= x +=3D 1) { - vcxt.values[idx].Reg128.Low64 =3D env->xmm_regs[i].ZMM_Q(0); - vcxt.values[idx].Reg128.High64 =3D env->xmm_regs[i].ZMM_Q(1); - } - idx =3D idx_next; - - /* 8 FP registers */ - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterFpMmx0); - for (i =3D 0; i < 8; i +=3D 1, idx +=3D 1) { - vcxt.values[idx].Fp.AsUINT128.Low64 =3D env->fpregs[i].mmx.MMX_Q(0= ); - /* vcxt.values[idx].Fp.AsUINT128.High64 =3D - env->fpregs[i].mmx.MMX_Q(1); - */ - } + if (level > WHPX_LEVEL_FAST_RUNTIME_STATE) { + vcxt.values[idx++].Segment =3D whpx_seg_q2h(&env->ldt, 0, 0); + + assert(idx =3D=3D WHvX64RegisterTr); + vcxt.values[idx++].Segment =3D whpx_seg_q2h(&env->tr, 0, 0); + + assert(idx =3D=3D WHvX64RegisterIdtr); + vcxt.values[idx].Table.Base =3D env->idt.base; + vcxt.values[idx].Table.Limit =3D env->idt.limit; + idx +=3D 1; + + assert(idx =3D=3D WHvX64RegisterGdtr); + vcxt.values[idx].Table.Base =3D env->gdt.base; + vcxt.values[idx].Table.Limit =3D env->gdt.limit; + idx +=3D 1; + + /* CR0, 2, 3, 4, 8 */ + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterCr0); + vcxt.values[idx++].Reg64 =3D env->cr[0]; + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterCr2); + vcxt.values[idx++].Reg64 =3D env->cr[2]; + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterCr3); + vcxt.values[idx++].Reg64 =3D env->cr[3]; + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterCr4); + vcxt.values[idx++].Reg64 =3D env->cr[4]; + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterCr8); + vcxt.values[idx++].Reg64 =3D vcpu->tpr; + + /* 8 Debug Registers - Skipped */ =20 - /* FP control status register */ - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterFpControlStatus); - vcxt.values[idx].FpControlStatus.FpControl =3D env->fpuc; - vcxt.values[idx].FpControlStatus.FpStatus =3D - (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; - vcxt.values[idx].FpControlStatus.FpTag =3D 0; - for (i =3D 0; i < 8; ++i) { - vcxt.values[idx].FpControlStatus.FpTag |=3D (!env->fptags[i]) << i; - } - vcxt.values[idx].FpControlStatus.Reserved =3D 0; - vcxt.values[idx].FpControlStatus.LastFpOp =3D env->fpop; - vcxt.values[idx].FpControlStatus.LastFpRip =3D env->fpip; - idx +=3D 1; - - /* XMM control status register */ - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterXmmControlStatus); - vcxt.values[idx].XmmControlStatus.LastFpRdp =3D 0; - vcxt.values[idx].XmmControlStatus.XmmStatusControl =3D env->mxcsr; - vcxt.values[idx].XmmControlStatus.XmmStatusControlMask =3D 0x0000ffff; - idx +=3D 1; + /* + * Extended control registers needs to be handled separately depen= ding + * on whether xsave is supported/enabled or not. + */ + whpx_set_xcrs(cpu); + + /* 16 XMM registers */ + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterXmm0); + idx_next =3D idx + 16; + for (i =3D 0; i < sizeof(env->xmm_regs) / sizeof(ZMMReg); i +=3D 1= , idx +=3D 1) { + vcxt.values[idx].Reg128.Low64 =3D env->xmm_regs[i].ZMM_Q(0); + vcxt.values[idx].Reg128.High64 =3D env->xmm_regs[i].ZMM_Q(1); + } + idx =3D idx_next; + + /* 8 FP registers */ + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterFpMmx0); + for (i =3D 0; i < 8; i +=3D 1, idx +=3D 1) { + vcxt.values[idx].Fp.AsUINT128.Low64 =3D env->fpregs[i].mmx.MMX= _Q(0); + /* vcxt.values[idx].Fp.AsUINT128.High64 =3D + env->fpregs[i].mmx.MMX_Q(1); + */ + } =20 - /* MSRs */ - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterEfer); - vcxt.values[idx++].Reg64 =3D env->efer; + /* FP control status register */ + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterFpControlStat= us); + vcxt.values[idx].FpControlStatus.FpControl =3D env->fpuc; + vcxt.values[idx].FpControlStatus.FpStatus =3D + (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; + vcxt.values[idx].FpControlStatus.FpTag =3D 0; + for (i =3D 0; i < 8; ++i) { + vcxt.values[idx].FpControlStatus.FpTag |=3D (!env->fptags[i]) = << i; + } + vcxt.values[idx].FpControlStatus.Reserved =3D 0; + vcxt.values[idx].FpControlStatus.LastFpOp =3D env->fpop; + vcxt.values[idx].FpControlStatus.LastFpRip =3D env->fpip; + idx +=3D 1; + + /* XMM control status register */ + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterXmmControlSta= tus); + vcxt.values[idx].XmmControlStatus.LastFpRdp =3D 0; + vcxt.values[idx].XmmControlStatus.XmmStatusControl =3D env->mxcsr; + vcxt.values[idx].XmmControlStatus.XmmStatusControlMask =3D 0x0000f= fff; + idx +=3D 1; + + /* MSRs */ + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterEfer); + vcxt.values[idx++].Reg64 =3D env->efer; #ifdef TARGET_X86_64 - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterKernelGsBase); - vcxt.values[idx++].Reg64 =3D env->kernelgsbase; + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterKernelGsBase); + vcxt.values[idx++].Reg64 =3D env->kernelgsbase; #endif =20 - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterApicBase); - vcxt.values[idx++].Reg64 =3D vcpu->apic_base; + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterApicBase); + vcxt.values[idx++].Reg64 =3D vcpu->apic_base; =20 - /* WHvX64RegisterPat - Skipped */ + /* WHvX64RegisterPat - Skipped */ =20 - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterSysenterCs); - vcxt.values[idx++].Reg64 =3D env->sysenter_cs; - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterSysenterEip); - vcxt.values[idx++].Reg64 =3D env->sysenter_eip; - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterSysenterEsp); - vcxt.values[idx++].Reg64 =3D env->sysenter_esp; - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterStar); - vcxt.values[idx++].Reg64 =3D env->star; + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterSysenterCs); + vcxt.values[idx++].Reg64 =3D env->sysenter_cs; + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterSysenterEip); + vcxt.values[idx++].Reg64 =3D env->sysenter_eip; + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterSysenterEsp); + vcxt.values[idx++].Reg64 =3D env->sysenter_esp; + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterStar); + vcxt.values[idx++].Reg64 =3D env->star; #ifdef TARGET_X86_64 - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterLstar); - vcxt.values[idx++].Reg64 =3D env->lstar; - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterCstar); - vcxt.values[idx++].Reg64 =3D env->cstar; - assert(whpx_register_names[idx] =3D=3D WHvX64RegisterSfmask); - vcxt.values[idx++].Reg64 =3D env->fmask; + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterLstar); + vcxt.values[idx++].Reg64 =3D env->lstar; + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterCstar); + vcxt.values[idx++].Reg64 =3D env->cstar; + assert(whpx_register_names[idx] =3D=3D WHvX64RegisterSfmask); + vcxt.values[idx++].Reg64 =3D env->fmask; #endif =20 - /* Interrupt / Event Registers - Skipped */ + /* Interrupt / Event Registers - Skipped */ =20 - assert(idx =3D=3D RTL_NUMBER_OF(whpx_register_names)); + assert(idx =3D=3D RTL_NUMBER_OF(whpx_register_names)); + } =20 hr =3D whp_dispatch.WHvSetVirtualProcessorRegisters( whpx->partition, cpu->cpu_index, whpx_register_names, - RTL_NUMBER_OF(whpx_register_names), + idx, &vcxt.values[0]); =20 if (FAILED(hr)) { @@ -613,7 +619,7 @@ void whpx_get_registers(CPUState *cpu, WHPXStateLevel l= evel) hr); } =20 - if (whpx_irqchip_in_kernel()) { + if (level > WHPX_LEVEL_FAST_RUNTIME_STATE && whpx_irqchip_in_kernel())= { /* * Fetch the TPR value from the emulated APIC. It may get overwrit= ten * below with the value from CR8 returned by @@ -670,7 +676,7 @@ void whpx_get_registers(CPUState *cpu, WHPXStateLevel l= evel) env->cr[4] =3D vcxt.values[idx++].Reg64; assert(whpx_register_names[idx] =3D=3D WHvX64RegisterCr8); tpr =3D vcxt.values[idx++].Reg64; - if (tpr !=3D vcpu->tpr) { + if (level > WHPX_LEVEL_FAST_RUNTIME_STATE && tpr !=3D vcpu->tpr) { vcpu->tpr =3D tpr; cpu_set_apic_tpr(x86_cpu->apic_state, whpx_cr8_to_apic_tpr(tpr)); } @@ -756,7 +762,7 @@ void whpx_get_registers(CPUState *cpu, WHPXStateLevel l= evel) =20 assert(idx =3D=3D RTL_NUMBER_OF(whpx_register_names)); =20 - if (whpx_irqchip_in_kernel()) { + if (level > WHPX_LEVEL_FAST_RUNTIME_STATE && whpx_irqchip_in_kernel())= { whpx_apic_get(x86_cpu->apic_state); } =20 --=20 2.50.1 (Apple Git-155)