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Checked all call sites to make sure we were already passing signed values, so extending works as expected. Use vaddr for pc_curr and pc_save. Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Pierrick Bouvier --- target/arm/tcg/translate-a32.h | 2 +- target/arm/tcg/translate.h | 12 ++++++------ target/arm/tcg/translate.c | 18 +++++++++--------- 3 files changed, 16 insertions(+), 16 deletions(-) diff --git a/target/arm/tcg/translate-a32.h b/target/arm/tcg/translate-a32.h index 0b1fa57965c..a8df364171b 100644 --- a/target/arm/tcg/translate-a32.h +++ b/target/arm/tcg/translate-a32.h @@ -40,7 +40,7 @@ void write_neon_element64(TCGv_i64 src, int reg, int ele,= MemOp memop); TCGv_i32 add_reg_for_lit(DisasContext *s, int reg, int ofs); void gen_set_cpsr(TCGv_i32 var, uint32_t mask); void gen_set_condexec(DisasContext *s); -void gen_update_pc(DisasContext *s, target_long diff); +void gen_update_pc(DisasContext *s, int64_t diff); void gen_lookup_tb(DisasContext *s); long vfp_reg_offset(bool dp, unsigned reg); long neon_full_reg_offset(unsigned reg); diff --git a/target/arm/tcg/translate.h b/target/arm/tcg/translate.h index 2c8358dd7fa..3e3094a463e 100644 --- a/target/arm/tcg/translate.h +++ b/target/arm/tcg/translate.h @@ -27,8 +27,8 @@ typedef struct DisasLabel { typedef struct DisasDelayException { struct DisasDelayException *next; TCGLabel *lab; - target_long pc_curr; - target_long pc_save; + vaddr pc_curr; + vaddr pc_save; int condexec_mask; int condexec_cond; uint32_t excp; @@ -359,14 +359,14 @@ static inline int curr_insn_len(DisasContext *s) =20 #ifdef TARGET_AARCH64 void a64_translate_init(void); -void gen_a64_update_pc(DisasContext *s, target_long diff); +void gen_a64_update_pc(DisasContext *s, int64_t diff); extern const TranslatorOps aarch64_translator_ops; #else static inline void a64_translate_init(void) { } =20 -static inline void gen_a64_update_pc(DisasContext *s, target_long diff) +static inline void gen_a64_update_pc(DisasContext *s, int64_t diff) { } #endif @@ -377,9 +377,9 @@ void arm_gen_test_cc(int cc, TCGLabel *label); MemOp pow2_align(unsigned i); void unallocated_encoding(DisasContext *s); void gen_exception_internal(int excp); -void gen_exception_insn_el(DisasContext *s, target_long pc_diff, int excp, +void gen_exception_insn_el(DisasContext *s, int64_t pc_diff, int excp, uint32_t syn, uint32_t target_el); -void gen_exception_insn(DisasContext *s, target_long pc_diff, +void gen_exception_insn(DisasContext *s, int64_t pc_diff, int excp, uint32_t syn); TCGLabel *delay_exception_el(DisasContext *s, int excp, uint32_t syn, uint32_t target_el); diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c index 3f57006f9df..f9d1b8897d2 100644 --- a/target/arm/tcg/translate.c +++ b/target/arm/tcg/translate.c @@ -253,12 +253,12 @@ static inline int get_a32_user_mem_index(DisasContext= *s) } =20 /* The pc_curr difference for an architectural jump. */ -static target_long jmp_diff(DisasContext *s, target_long diff) +static int64_t jmp_diff(DisasContext *s, int64_t diff) { return diff + (s->thumb ? 4 : 8); } =20 -static void gen_pc_plus_diff(DisasContext *s, TCGv_i32 var, target_long di= ff) +static void gen_pc_plus_diff(DisasContext *s, TCGv_i32 var, int64_t diff) { assert(s->pc_save !=3D -1); if (tb_cflags(s->base.tb) & CF_PCREL) { @@ -738,7 +738,7 @@ void gen_set_condexec(DisasContext *s) } } =20 -void gen_update_pc(DisasContext *s, target_long diff) +void gen_update_pc(DisasContext *s, int64_t diff) { gen_pc_plus_diff(s, cpu_R[15], diff); s->pc_save =3D s->pc_curr + diff; @@ -1058,7 +1058,7 @@ static void gen_exception(int excp, uint32_t syndrome) tcg_constant_i32(syndrome)); } =20 -static void gen_exception_insn_el_v(DisasContext *s, target_long pc_diff, +static void gen_exception_insn_el_v(DisasContext *s, int64_t pc_diff, int excp, uint32_t syn, TCGv_i32 tcg_e= l) { if (s->aarch64) { @@ -1071,14 +1071,14 @@ static void gen_exception_insn_el_v(DisasContext *s= , target_long pc_diff, s->base.is_jmp =3D DISAS_NORETURN; } =20 -void gen_exception_insn_el(DisasContext *s, target_long pc_diff, int excp, +void gen_exception_insn_el(DisasContext *s, int64_t pc_diff, int excp, uint32_t syn, uint32_t target_el) { gen_exception_insn_el_v(s, pc_diff, excp, syn, tcg_constant_i32(target_el)); } =20 -void gen_exception_insn(DisasContext *s, target_long pc_diff, +void gen_exception_insn(DisasContext *s, int64_t pc_diff, int excp, uint32_t syn) { if (s->aarch64) { @@ -1313,7 +1313,7 @@ static void gen_goto_ptr(void) * cpu_loop_exec. Any live exit_requests will be processed as we * enter the next TB. */ -static void gen_goto_tb(DisasContext *s, unsigned tb_slot_idx, target_long= diff) +static void gen_goto_tb(DisasContext *s, unsigned tb_slot_idx, int64_t dif= f) { if (translator_use_goto_tb(&s->base, s->pc_curr + diff)) { /* @@ -1340,7 +1340,7 @@ static void gen_goto_tb(DisasContext *s, unsigned tb_= slot_idx, target_long diff) } =20 /* Jump, specifying which TB number to use if we gen_goto_tb() */ -static void gen_jmp_tb(DisasContext *s, target_long diff, int tbno) +static void gen_jmp_tb(DisasContext *s, int64_t diff, int tbno) { if (unlikely(s->ss_active)) { /* An indirect jump so that we still trigger the debug exception. = */ @@ -1383,7 +1383,7 @@ static void gen_jmp_tb(DisasContext *s, target_long d= iff, int tbno) } } =20 -static inline void gen_jmp(DisasContext *s, target_long diff) +static inline void gen_jmp(DisasContext *s, int64_t diff) { gen_jmp_tb(s, diff, 0); } --=20 2.47.3