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Register them by setting the CPUClass::gdb_core_xml_file field and calling gdb_register_coprocessor() in sparc_cpu_register_gdb_regs(). [*] https://sourceware.org/git/?p=3Dbinutils-gdb.git;a=3Dtree;f=3Dgdb/featu= res/sparc;hb=3Drefs/tags/binutils-2_46 Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- configs/targets/sparc-linux-user.mak | 1 + configs/targets/sparc-softmmu.mak | 1 + target/sparc/cpu.c | 3 +- target/sparc/gdbstub.c | 13 +++++---- gdb-xml/sparc32-cp0.xml | 18 ++++++++++++ gdb-xml/sparc32-cpu.xml | 42 ++++++++++++++++++++++++++++ gdb-xml/sparc32-fpu.xml | 42 ++++++++++++++++++++++++++++ 7 files changed, 114 insertions(+), 6 deletions(-) create mode 100644 gdb-xml/sparc32-cp0.xml create mode 100644 gdb-xml/sparc32-cpu.xml create mode 100644 gdb-xml/sparc32-fpu.xml diff --git a/configs/targets/sparc-linux-user.mak b/configs/targets/sparc-l= inux-user.mak index d3f0716ca2d..01446e28783 100644 --- a/configs/targets/sparc-linux-user.mak +++ b/configs/targets/sparc-linux-user.mak @@ -2,5 +2,6 @@ TARGET_ARCH=3Dsparc TARGET_SYSTBL_ABI=3Dcommon,32 TARGET_SYSTBL=3Dsyscall.tbl TARGET_BIG_ENDIAN=3Dy +TARGET_XML_FILES=3Dgdb-xml/sparc32-cpu.xml gdb-xml/sparc32-fpu.xml gdb-xml= /sparc32-cp0.xml TARGET_LONG_BITS=3D32 TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=3Dy diff --git a/configs/targets/sparc-softmmu.mak b/configs/targets/sparc-soft= mmu.mak index c4c38946d54..ed846735f41 100644 --- a/configs/targets/sparc-softmmu.mak +++ b/configs/targets/sparc-softmmu.mak @@ -1,5 +1,6 @@ TARGET_ARCH=3Dsparc TARGET_BIG_ENDIAN=3Dy +TARGET_XML_FILES=3Dgdb-xml/sparc32-cpu.xml gdb-xml/sparc32-fpu.xml gdb-xml= /sparc32-cp0.xml TARGET_LONG_BITS=3D32 TARGET_NOT_USING_LEGACY_LDST_PHYS_API=3Dy TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=3Dy diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 08ebbd3640b..ec454affaad 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -1096,7 +1096,8 @@ static void sparc_cpu_class_init(ObjectClass *oc, con= st void *data) cc->gdb_core_xml_file =3D "sparc64-cpu.xml"; cc->gdb_num_core_regs =3D 32; #else - cc->gdb_num_core_regs =3D 72; + cc->gdb_core_xml_file =3D "sparc32-cpu.xml"; + cc->gdb_num_core_regs =3D 32; #endif cc->tcg_ops =3D &sparc_tcg_ops; } diff --git a/target/sparc/gdbstub.c b/target/sparc/gdbstub.c index b5b1494950a..ed52e521dcc 100644 --- a/target/sparc/gdbstub.c +++ b/target/sparc/gdbstub.c @@ -43,7 +43,6 @@ int sparc_cpu_gdb_read_register(CPUState *cs, GByteArray = *mem_buf, int n) return 0; } =20 -__attribute__((unused)) static int sparc_fpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, = int n) { CPUSPARCState *env =3D cpu_env(cs); @@ -79,7 +78,6 @@ static int sparc_fpu_gdb_read_register(CPUState *cs, GByt= eArray *mem_buf, int n) return 0; } =20 -__attribute__((unused)) static int sparc_cp0_gdb_read_register(CPUState *cs, GByteArray *mem_buf, = int n) { CPUSPARCState *env =3D cpu_env(cs); @@ -154,7 +152,6 @@ int sparc_cpu_gdb_write_register(CPUState *cs, uint8_t = *mem_buf, int n) #endif } =20 -__attribute__((unused)) static int sparc_fpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, in= t n) { CPUSPARCState *env =3D cpu_env(cs); @@ -197,7 +194,6 @@ static int sparc_fpu_gdb_write_register(CPUState *cs, u= int8_t *mem_buf, int n) #endif } =20 -__attribute__((unused)) static int sparc_cp0_gdb_write_register(CPUState *cs, uint8_t *mem_buf, in= t n) { CPUSPARCState *env =3D cpu_env(cs); @@ -271,7 +267,14 @@ static int sparc_cp0_gdb_write_register(CPUState *cs, = uint8_t *mem_buf, int n) void sparc_cpu_register_gdb_regs(CPUState *cs) { #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64) - /* Not yet supported */ + gdb_register_coprocessor(cs, sparc_fpu_gdb_read_register, + sparc_fpu_gdb_write_register, + gdb_find_static_feature("sparc32-fpu.xml"), + 0); + gdb_register_coprocessor(cs, sparc_cp0_gdb_read_register, + sparc_cp0_gdb_write_register, + gdb_find_static_feature("sparc32-cp0.xml"), + 0); #else gdb_register_coprocessor(cs, sparc_fpu_gdb_read_register, sparc_fpu_gdb_write_register, diff --git a/gdb-xml/sparc32-cp0.xml b/gdb-xml/sparc32-cp0.xml new file mode 100644 index 00000000000..eacd89cf3b5 --- /dev/null +++ b/gdb-xml/sparc32-cp0.xml @@ -0,0 +1,18 @@ + + + + + + + + + + + + + + diff --git a/gdb-xml/sparc32-cpu.xml b/gdb-xml/sparc32-cpu.xml new file mode 100644 index 00000000000..242295c886e --- /dev/null +++ b/gdb-xml/sparc32-cpu.xml @@ -0,0 +1,42 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/gdb-xml/sparc32-fpu.xml b/gdb-xml/sparc32-fpu.xml new file mode 100644 index 00000000000..38217ca7a92 --- /dev/null +++ b/gdb-xml/sparc32-fpu.xml @@ -0,0 +1,42 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + --=20 2.52.0