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Wed, 11 Feb 2026 19:34:43 -0800 (PST) From: Taylor Simpson To: qemu-devel@nongnu.org Cc: brian.cain@oss.qualcomm.com, matheus.bernardino@oss.qualcomm.com, sid.manning@oss.qualcomm.com, marco.liebel@oss.qualcomm.com, richard.henderson@linaro.org, philmd@linaro.org, ale@rev.ng, anjo@rev.ng, ltaylorsimpson@gmail.com Subject: [PATCH 4/8] Hexagon (target/hexagon) Introduce tag_rev_info.c.inc Date: Wed, 11 Feb 2026 20:34:31 -0700 Message-ID: <20260212033435.3598-5-ltaylorsimpson@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260212033435.3598-1-ltaylorsimpson@gmail.com> References: <20260212033435.3598-1-ltaylorsimpson@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32c; envelope-from=ltaylorsimpson@gmail.com; helo=mail-ot1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1770867367539158500 From: Matheus Tavares Bernardino Table that records which CPU revision introduced or removed each opcode Co-authored-by: Brian Cain Co-authored-by: Taylor Simpson Signed-off-by: Brian Cain Signed-off-by: Taylor Simpson --- target/hexagon/tag_rev_info.c.inc | 61 +++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 target/hexagon/tag_rev_info.c.inc diff --git a/target/hexagon/tag_rev_info.c.inc b/target/hexagon/tag_rev_inf= o.c.inc new file mode 100644 index 0000000000..ed7fb68aaf --- /dev/null +++ b/target/hexagon/tag_rev_info.c.inc @@ -0,0 +1,61 @@ +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef HEXAGON_TAG_ARCH_TABLE_H +#define HEXAGON_TAG_ARCH_TABLE_H + +struct tag_rev_info { int introduced, removed; }; + +static const struct tag_rev_info tag_rev_info[XX_LAST_OPCODE] =3D { + [A7_clip] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [A7_croundd_ri] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [A7_croundd_rr] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [A7_vclip] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [F2_dfmax] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [F2_dfmin] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [F2_dfmpyfix] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [F2_dfmpyhh] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [F2_dfmpylh] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [F2_dfmpyll] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [J2_callrh] =3D { .introduced =3D 0x73, .removed =3D 0x0 }, + [J2_jumprh] =3D { .introduced =3D 0x73, .removed =3D 0x0 }, + [L2_loadw_aq] =3D { .introduced =3D 0x68, .removed =3D 0x0 }, + [L4_loadd_aq] =3D { .introduced =3D 0x68, .removed =3D 0x0 }, + [M7_dcmpyiw] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [M7_dcmpyiw_acc] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [M7_dcmpyiwc] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [M7_dcmpyiwc_acc] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [M7_dcmpyrw] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [M7_dcmpyrw_acc] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [M7_dcmpyrwc] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [M7_dcmpyrwc_acc] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [M7_wcmpyiw] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [M7_wcmpyiw_rnd] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [M7_wcmpyiwc] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [M7_wcmpyiwc_rnd] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [M7_wcmpyrw] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [M7_wcmpyrw_rnd] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [M7_wcmpyrwc] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [M7_wcmpyrwc_rnd] =3D { .introduced =3D 0x67, .removed =3D 0x0 }, + [R6_release_at_vi] =3D { .introduced =3D 0x68, .removed =3D 0x0 }, + [R6_release_st_vi] =3D { .introduced =3D 0x68, .removed =3D 0x0 }, + [S2_storew_rl_at_vi] =3D { .introduced =3D 0x68, .removed =3D 0x0 }, + [S2_storew_rl_st_vi] =3D { .introduced =3D 0x68, .removed =3D 0x0 }, + [S4_stored_rl_at_vi] =3D { .introduced =3D 0x68, .removed =3D 0x0 }, + [S4_stored_rl_st_vi] =3D { .introduced =3D 0x68, .removed =3D 0x0 }, + [V6_v6mpyhubs10] =3D { .introduced =3D 0x68, .removed =3D 0x0 }, + [V6_v6mpyhubs10_vxx] =3D { .introduced =3D 0x68, .removed =3D 0x0 }, + [V6_v6mpyvubs10] =3D { .introduced =3D 0x68, .removed =3D 0x0 }, + [V6_v6mpyvubs10_vxx] =3D { .introduced =3D 0x68, .removed =3D 0x0 }, + [V6_vasrvuhubrndsat] =3D { .introduced =3D 0x69, .removed =3D 0x0 }, + [V6_vasrvuhubsat] =3D { .introduced =3D 0x69, .removed =3D 0x0 }, + [V6_vasrvwuhrndsat] =3D { .introduced =3D 0x69, .removed =3D 0x0 }, + [V6_vasrvwuhsat] =3D { .introduced =3D 0x69, .removed =3D 0x0 }, + [V6_vassign_tmp] =3D { .introduced =3D 0x69, .removed =3D 0x0 }, + [V6_vcombine_tmp] =3D { .introduced =3D 0x69, .removed =3D 0x0 }, + [V6_vmpyuhvs] =3D { .introduced =3D 0x69, .removed =3D 0x0 }, +}; + +#endif /* HEXAGON_TAG_ARCH_TABLE_H */ --=20 2.43.0