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Tue, 10 Feb 2026 13:42:31 +0000 (GMT) Received: from smtpav03.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CB5BA58054; Tue, 10 Feb 2026 13:42:29 +0000 (GMT) Received: from gfwr526.rchland.ibm.com (unknown [9.10.239.119]) by smtpav03.wdc07v.mail.ibm.com (Postfix) with ESMTP; Tue, 10 Feb 2026 13:42:29 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pp1; bh=N+ZjMg ZgtOzJcKLQl5aGQ8nA57L7MuJwiF0xXpPfGj8=; b=TS3XaRsVSU3G+lU4fUWh0o ozfkKz+N63gNxWsAPEhO96tm29zDekbB/U9UW6S5HGqgqMZ2o5tJw5s0KTQa0U07 zM/0Je6WIoiNbSO0DxTZ4qUO21vdFnRGQDZxdQcII5KfuVWAK8+iPKyR/pgUF1GO uPXFMSo/mu6gL87eS1fnxrkA+DnAaiJJmNt7+0ouZihcHiIb02ih1cVQ/vc7CUFy yw/BZUBuWYmQzsqF+7hLSrAXdkE9nD9xvLQqH2lT5dJ7DiF5x/8XjMBuMyNtzY0e WMgtlhGiPL+av3FxuOxtU9FVed/5XevN/J0sGFzdeubO82x/Y99CnfXVPc1sHdyA == From: Saif Abrar To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: clg@kaod.org, npiggin@gmail.com, fbarrat@linux.ibm.com, mst@redhat.com, marcel.apfelbaum@gmail.com, cohuck@redhat.com, pbonzini@redhat.com, thuth@redhat.com, lvivier@redhat.com, danielhb413@gmail.com, saif.abrar@linux.vnet.ibm.com Subject: [PATCH v3 7/9] pnv/phb4: Set link speed and width in the DLP training control register Date: Tue, 10 Feb 2026 07:40:57 -0600 Message-ID: <20260210134110.1515322-8-saif.abrar@linux.vnet.ibm.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260210134110.1515322-1-saif.abrar@linux.vnet.ibm.com> References: <20251230102156.886288-1-saif.abrar@linux.vnet.ibm.com> <20260210134110.1515322-1-saif.abrar@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=148.163.156.1; envelope-from=saif.abrar@linux.vnet.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1770731016629158500 Get the current link-status from PCIE macro. Extract link-speed and link-width from the link-status and set in the DLP training control (PCIE_DLP_TCR) register. Signed-off-by: Saif Abrar Reviewed-by: C=C3=A9dric Le Goater --- v3: Updates for coding guidelines. hw/pci-host/pnv_phb4.c | 34 +++++++++++++++++++++++++++------- 1 file changed, 27 insertions(+), 7 deletions(-) diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index ebbdaf77b3..a7a4ba46db 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -956,10 +956,30 @@ static uint64_t pnv_phb4_reg_read(void *opaque, hwadd= r off, unsigned size) val |=3D PHB_PCIE_SCR_PLW_X16; /* RO bit */ break; =20 - /* Link training always appears trained */ case PHB_PCIE_DLP_TRAIN_CTL: - /* TODO: Do something sensible with speed ? */ + /* Get the current link-status from PCIE */ + PCIHostState *pci =3D PCI_HOST_BRIDGE(phb->phb_base); + PCIDevice *pdev =3D pci_find_device(pci->bus, 0, 0); + uint32_t exp_offset =3D get_exp_offset(pdev); + uint32_t lnkstatus =3D bswap32(pnv_phb4_rc_config_read(phb, + exp_offset + PCI_EXP_LNKSTA, 4)); + + /* Extract link-speed from the link-status */ + uint32_t v =3D lnkstatus & PCI_EXP_LNKSTA_CLS; + + /* Link training always appears trained */ val |=3D PHB_PCIE_DLP_INBAND_PRESENCE | PHB_PCIE_DLP_TL_LINKACT; + + /* Set the current link-speed at the LINK_SPEED position */ + val =3D SETFIELD(PHB_PCIE_DLP_LINK_SPEED, val, v); + + /* + * Extract link-width from the link-status, + * after shifting the required bitfields. + */ + v =3D (lnkstatus & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT; + /* Set the current link-width at the LINK_WIDTH position */ + val =3D SETFIELD(PHB_PCIE_DLP_LINK_WIDTH, val, v); return val; =20 /* @@ -968,6 +988,11 @@ static uint64_t pnv_phb4_reg_read(void *opaque, hwaddr= off, unsigned size) * - Link active (bit 12) */ case PHB_PCIE_HOTPLUG_STATUS: + /* Get the PCI-E capability offset from the root-port */ + pci =3D PCI_HOST_BRIDGE(phb->phb_base); + pdev =3D pci_find_device(pci->bus, 0, 0); + uint32_t exp_base =3D get_exp_offset(pdev); + /* * Presence-status bit hpi_present_n is active-low, with reset val= ue 1. * Start by setting this bit to 1, indicating the card is not pres= ent. @@ -975,11 +1000,6 @@ static uint64_t pnv_phb4_reg_read(void *opaque, hwadd= r off, unsigned size) */ val |=3D PHB_PCIE_HPSTAT_PRESENCE; =20 - /* Get the PCI-E capability offset from the root-port */ - PCIHostState *pci =3D PCI_HOST_BRIDGE(phb->phb_base); - PCIDevice *pdev =3D pci_find_device(pci->bus, 0, 0); - uint32_t exp_base =3D get_exp_offset(pdev); - /* * Config-read the PCI-E macro register for slot-status. * Method for config-read converts to BE value. --=20 2.47.3