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Tue, 10 Feb 2026 13:42:24 +0000 (GMT) Received: from smtpav03.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C684658054; Tue, 10 Feb 2026 13:42:22 +0000 (GMT) Received: from gfwr526.rchland.ibm.com (unknown [9.10.239.119]) by smtpav03.wdc07v.mail.ibm.com (Postfix) with ESMTP; Tue, 10 Feb 2026 13:42:22 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=qxQJzP1/6E8GYWUza ILV/2Lg+XdZWAPa0N+uDJZFGnY=; b=k5FHKLKwwQF6t7mtvJ8WgjgncegYm8duT 8ii9I4mUeTyQyoFGCcgmcnrRgsCPKZl44ocCRk+bVrcfketouo1AHU4HPOR60YRX AjY2+V99O5a3InLYCQ5bDGBNZW4rrLf9HGB+qD5f0lST6kQXiC6AEDD+xPWZZ56g 56PglnhIe2nUmxPd0QuEa5oTWXYI5OZVH3lVNUmI/ysoKGSIwHzHfisXW0F6a2Ee i8YuZYrl6JEJMjsyTdbBQeEVDTvTyTOB60JiWSzyYdX7ny65rv00pRLGYojpLcc2 ANCjs8WZdwEz/5/M5PmAkDby4VveR44hbOLTolx/WHIFQutuoovqw== From: Saif Abrar To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: clg@kaod.org, npiggin@gmail.com, fbarrat@linux.ibm.com, mst@redhat.com, marcel.apfelbaum@gmail.com, cohuck@redhat.com, pbonzini@redhat.com, thuth@redhat.com, lvivier@redhat.com, danielhb413@gmail.com, saif.abrar@linux.vnet.ibm.com Subject: [PATCH v3 6/9] pnv/phb4: Set link-active status in HPSTAT and LMR registers Date: Tue, 10 Feb 2026 07:40:56 -0600 Message-ID: <20260210134110.1515322-7-saif.abrar@linux.vnet.ibm.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260210134110.1515322-1-saif.abrar@linux.vnet.ibm.com> References: <20251230102156.886288-1-saif.abrar@linux.vnet.ibm.com> <20260210134110.1515322-1-saif.abrar@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Authority-Analysis: v=2.4 cv=YeCwJgRf c=1 sm=1 tr=0 ts=698b35c3 cx=c_pps a=bLidbwmWQ0KltjZqbj+ezA==:117 a=bLidbwmWQ0KltjZqbj+ezA==:17 a=HzLeVaNsDn8A:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=VnNF1IyMAAAA:8 a=E9s9Sk2w9S_N8XOcZ00A:9 X-Proofpoint-GUID: _scJS16wOugyqyhp7N-PvDmKy8-Mx97z X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjEwMDExMiBTYWx0ZWRfX9lYDIFfbeS/3 G9fvnINwk6f/6Rn7q8uF/D5NTBQyOTZCKmBTQDOWYv2BTA+hfv9CBt2PnHXENXkGX4qfFwBipH4 k8PdutPO67AzNrDt2ay2qTRfR+tuZHXCrB5oKSLdUTANZakZR7QQZc+/KhwFQ+fnayWAZoT8saF nunGbDRHuQbOKTi8ZQR9CxoyLi7I1KS22vJ8FJ19UzZZgubU9i7/BVvmgPoVZTKa4blNOZoTtNi znnaGPlCqZbvAQiENNnNcd9/AySf9go50sUr0u+sbWB0k04EPeC1VWSYMcU3E38XA38/IJTpDW5 +kvowfw8siXWHQLPReIr3xY0MSNrN0aHge4BQGJ8aJ9UrHmNT6hUcyyGLJ+RSrk9qZkDeo0uYIv C/BclxkYDbeY6Adc/bOvSU2LzKjSOsGyj4iGGuoODDzJlimqnCX9Kui76U0lPvwULkxzig9/moR JzRnZ0Ge0RxXL0Vwr/w== X-Proofpoint-ORIG-GUID: c7vRcfQUygkuy1cihp-9GaHTRpTP56na X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-10_01,2026-02-10_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 bulkscore=0 malwarescore=0 phishscore=0 priorityscore=1501 lowpriorityscore=0 clxscore=1015 impostorscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602100112 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Config-read the link-status register in the PCI-E macro, Depending on the link-active bit, set the link-active status in the HOTPLUG_STATUS and LINK_MANAGEMENT registers Also, clear the Presence-status active low bit in HOTPLUG_STATUS reg after config-reading the slot-status in the PCI-E macro. Signed-off-by: Saif Abrar --- v3: Updates for coding guidelines. hw/pci-host/pnv_phb4.c | 60 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 59 insertions(+), 1 deletion(-) diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index c044e9d2a3..ebbdaf77b3 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -510,6 +510,20 @@ static uint32_t get_exp_offset(PCIDevice *pdev) return rpc->exp_offset; } =20 +/* + * Config-read the link-status register in the PCI-E macro, + * convert to LE and check the link-active bit. + */ +static uint32_t is_link_active(PnvPHB4 *phb) +{ + PCIHostState *pci =3D PCI_HOST_BRIDGE(phb->phb_base); + PCIDevice *pdev =3D pci_find_device(pci->bus, 0, 0); + uint32_t exp_offset =3D get_exp_offset(pdev); + + return (bswap32(pnv_phb4_rc_config_read(phb, exp_offset + PCI_EXP_LNKS= TA, 4) + ) & PCI_EXP_LNKSTA_DLLLA); +} + /* * Apply sticky-mask 's' to the reset-value 'v' and write to the address '= a'. * RC-config space values and masks are LE. @@ -728,6 +742,11 @@ static void pnv_phb4_reg_write(void *opaque, hwaddr of= f, uint64_t val, val =3D 0; break; =20 + case PHB_PCIE_HOTPLUG_STATUS: + /* For normal operations, Simspeed diagnostic bit is always zero */ + val &=3D PHB_PCIE_HPSTAT_SIMDIAG; + break; + /* Read only registers */ case PHB_CPU_LOADSTORE_STATUS: case PHB_ETU_ERR_SUMMARY: @@ -943,8 +962,42 @@ static uint64_t pnv_phb4_reg_read(void *opaque, hwaddr= off, unsigned size) val |=3D PHB_PCIE_DLP_INBAND_PRESENCE | PHB_PCIE_DLP_TL_LINKACT; return val; =20 + /* + * Read PCI-E registers and set status for: + * - Card present (active low bit 10) + * - Link active (bit 12) + */ case PHB_PCIE_HOTPLUG_STATUS: - /* Clear write-only bit */ + /* + * Presence-status bit hpi_present_n is active-low, with reset val= ue 1. + * Start by setting this bit to 1, indicating the card is not pres= ent. + * Then check the PCI-E register and clear the bit if card is pres= ent. + */ + val |=3D PHB_PCIE_HPSTAT_PRESENCE; + + /* Get the PCI-E capability offset from the root-port */ + PCIHostState *pci =3D PCI_HOST_BRIDGE(phb->phb_base); + PCIDevice *pdev =3D pci_find_device(pci->bus, 0, 0); + uint32_t exp_base =3D get_exp_offset(pdev); + + /* + * Config-read the PCI-E macro register for slot-status. + * Method for config-read converts to BE value. + * To check actual bit in the PCI-E register, + * convert the value back to LE using bswap32(). + * Clear the Presence-status active low bit. + */ + if (bswap32(pnv_phb4_rc_config_read(phb, exp_base + PCI_EXP_SLTSTA= , 4)) + & PCI_EXP_SLTSTA_PDS) { + val &=3D ~PHB_PCIE_HPSTAT_PRESENCE; + } + + /* Check if link is active and set the bit */ + if (is_link_active(phb)) { + val |=3D PHB_PCIE_HPSTAT_LINKACTIVE; + } + + /* Clear write-only resample-bit */ val &=3D ~PHB_PCIE_HPSTAT_RESAMPLE; return val; =20 @@ -952,6 +1005,11 @@ static uint64_t pnv_phb4_reg_read(void *opaque, hwadd= r off, unsigned size) case PHB_PCIE_LMR: /* These write-only bits always read as 0 */ val &=3D ~(PHB_PCIE_LMR_CHANGELW | PHB_PCIE_LMR_RETRAINLINK); + + /* Check if link is active and set the bit */ + if (is_link_active(phb)) { + val |=3D PHB_PCIE_LMR_LINKACTIVE; + } return val; =20 /* Silent simple reads */ --=20 2.47.3