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bh=vNJGnvv7T716ktIxUUvnlNKynsTuSSmaB6lUz0Q6bU0=; b=LCGjlTaFRFqfXNidFFgbysHLQrpRD8LOs8A4SL7Ven5vvO9kh4lmFJ3j0LP2MJS5qK39F57khUcPhsJla77zQ2mM69VM1Q9NtICKku5yL1rAVUYmFMUCxQyhuVNg8HaNXw6+qint497FUGMXY9i4IEm0AKnlp3O0J728HCTCv3xdAugqUk407g/+0kY7uZ2C+OSWDZobSQ0eOMSOGXeQs4kwC5xolFuB7fBYN+u1BVdsGWJNRKL5tD2JQiJS0rqiHKCi1fvW1X3l3i08hrnerzMgimxcLvxjM28ODWg62h2PZi7+JfhixzSm//y7MGvWnuO2GcZpVnx+dms02ayFdA== From: Jamin Lin To: Paolo Bonzini , Peter Maydell , =?iso-8859-1?Q?C=E9dric_Le_Goater?= , Steven Lee , Troy Lee , Andrew Jeffery , Joel Stanley , =?iso-8859-1?Q?Marc-Andr=E9_Lureau?= , =?iso-8859-1?Q?Daniel_P=2E_Berrang=E9?= , =?iso-8859-1?Q?Philippe_Mathieu-Daud=E9?= , "open list:All patches CC here" , "open list:ARM TCG CPUs" CC: Jamin Lin , Troy Lee , Kane Chen , "nabihestefan@google.com" , Joe Komlodi , Patrick Venture , Titus Rwantare , =?iso-8859-1?Q?C=E9dric_Le_Goater?= Subject: [PATCH v4 01/20] hw/misc/aspeed_i3c: Move to i3c directory Thread-Topic: [PATCH v4 01/20] hw/misc/aspeed_i3c: Move to i3c directory Thread-Index: AQHcmaTH/oGLrNr/9UuyTPMTKjqzHQ== Date: Mon, 9 Feb 2026 09:16:31 +0000 Message-ID: <20260209091629.823457-2-jamin_lin@aspeedtech.com> References: <20260209091629.823457-1-jamin_lin@aspeedtech.com> In-Reply-To: <20260209091629.823457-1-jamin_lin@aspeedtech.com> Accept-Language: zh-TW, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=aspeedtech.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a01:111:f403:c405::7; envelope-from=jamin_lin@aspeedtech.com; helo=TYDPR03CU002.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @aspeedtech.com) X-ZM-MESSAGEID: 1770628801710154101 Content-Type: text/plain; charset="utf-8" Moves the Aspeed I3C model and traces into hw/i3c and creates I3C build files. Signed-off-by: Joe Komlodi Reviewed-by: Patrick Venture Reviewed-by: Titus Rwantare Reviewed-by: C=C3=A9dric Le Goater Reviewed-by: Jamin Lin Signed-off-by: Jamin Lin --- meson.build | 1 + hw/i3c/trace.h | 2 ++ include/hw/arm/aspeed_soc.h | 2 +- include/hw/{misc =3D> i3c}/aspeed_i3c.h | 0 hw/{misc =3D> i3c}/aspeed_i3c.c | 2 +- hw/Kconfig | 1 + hw/arm/Kconfig | 1 + hw/i3c/Kconfig | 2 ++ hw/i3c/meson.build | 3 +++ hw/i3c/trace-events | 7 +++++++ hw/meson.build | 1 + hw/misc/meson.build | 1 - hw/misc/trace-events | 6 ------ 13 files changed, 20 insertions(+), 9 deletions(-) create mode 100644 hw/i3c/trace.h rename include/hw/{misc =3D> i3c}/aspeed_i3c.h (100%) rename hw/{misc =3D> i3c}/aspeed_i3c.c (99%) create mode 100644 hw/i3c/Kconfig create mode 100644 hw/i3c/meson.build create mode 100644 hw/i3c/trace-events diff --git a/meson.build b/meson.build index 8c6c0a9a32..d20ec383df 100644 --- a/meson.build +++ b/meson.build @@ -3602,6 +3602,7 @@ if have_system 'hw/fsi', 'hw/hyperv', 'hw/i2c', + 'hw/i3c', 'hw/i386', 'hw/i386/xen', 'hw/i386/kvm', diff --git a/hw/i3c/trace.h b/hw/i3c/trace.h new file mode 100644 index 0000000000..1e0c4eadf0 --- /dev/null +++ b/hw/i3c/trace.h @@ -0,0 +1,2 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include "trace/trace-hw_i3c.h" diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index b185b04186..d7b3647ca1 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -23,7 +23,7 @@ #include "hw/timer/aspeed_timer.h" #include "hw/rtc/aspeed_rtc.h" #include "hw/i2c/aspeed_i2c.h" -#include "hw/misc/aspeed_i3c.h" +#include "hw/i3c/aspeed_i3c.h" #include "hw/ssi/aspeed_smc.h" #include "hw/misc/aspeed_hace.h" #include "hw/misc/aspeed_sbc.h" diff --git a/include/hw/misc/aspeed_i3c.h b/include/hw/i3c/aspeed_i3c.h similarity index 100% rename from include/hw/misc/aspeed_i3c.h rename to include/hw/i3c/aspeed_i3c.h diff --git a/hw/misc/aspeed_i3c.c b/hw/i3c/aspeed_i3c.c similarity index 99% rename from hw/misc/aspeed_i3c.c rename to hw/i3c/aspeed_i3c.c index ac6db214ee..fff259ff66 100644 --- a/hw/misc/aspeed_i3c.c +++ b/hw/i3c/aspeed_i3c.c @@ -10,7 +10,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "qemu/error-report.h" -#include "hw/misc/aspeed_i3c.h" +#include "hw/i3c/aspeed_i3c.h" #include "hw/core/registerfields.h" #include "hw/core/qdev-properties.h" #include "qapi/error.h" diff --git a/hw/Kconfig b/hw/Kconfig index 9e6c789ae7..c53f94d96a 100644 --- a/hw/Kconfig +++ b/hw/Kconfig @@ -13,6 +13,7 @@ source fsi/Kconfig source gpio/Kconfig source hyperv/Kconfig source i2c/Kconfig +source i3c/Kconfig source ide/Kconfig source input/Kconfig source intc/Kconfig diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index c66c452737..8344b9769f 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -545,6 +545,7 @@ config ASPEED_SOC select DS1338 select FTGMAC100 select I2C + select I3C select DPS310 select PCA9552 select PCA9554 diff --git a/hw/i3c/Kconfig b/hw/i3c/Kconfig new file mode 100644 index 0000000000..e07fe445c6 --- /dev/null +++ b/hw/i3c/Kconfig @@ -0,0 +1,2 @@ +config I3C + bool diff --git a/hw/i3c/meson.build b/hw/i3c/meson.build new file mode 100644 index 0000000000..ebf20325cb --- /dev/null +++ b/hw/i3c/meson.build @@ -0,0 +1,3 @@ +i3c_ss =3D ss.source_set() +i3c_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_i3c.c')) +system_ss.add_all(when: 'CONFIG_I3C', if_true: i3c_ss) diff --git a/hw/i3c/trace-events b/hw/i3c/trace-events new file mode 100644 index 0000000000..3ead84eb45 --- /dev/null +++ b/hw/i3c/trace-events @@ -0,0 +1,7 @@ +# See docs/devel/tracing.rst for syntax documentation. + +# aspeed_i3c.c +aspeed_i3c_read(uint64_t offset, uint64_t data) "I3C read: offset 0x%" PRI= x64 " data 0x%" PRIx64 +aspeed_i3c_write(uint64_t offset, uint64_t data) "I3C write: offset 0x%" P= RIx64 " data 0x%" PRIx64 +aspeed_i3c_device_read(uint32_t deviceid, uint64_t offset, uint64_t data) = "I3C Dev[%u] read: offset 0x%" PRIx64 " data 0x%" PRIx64 +aspeed_i3c_device_write(uint32_t deviceid, uint64_t offset, uint64_t data)= "I3C Dev[%u] write: offset 0x%" PRIx64 " data 0x%" PRIx64 diff --git a/hw/meson.build b/hw/meson.build index 1022bdb806..e05dc4864c 100644 --- a/hw/meson.build +++ b/hw/meson.build @@ -35,6 +35,7 @@ subdir('dma') subdir('gpio') subdir('hyperv') subdir('i2c') +subdir('i3c') subdir('ide') subdir('input') subdir('intc') diff --git a/hw/misc/meson.build b/hw/misc/meson.build index d304a98498..96b6705b7d 100644 --- a/hw/misc/meson.build +++ b/hw/misc/meson.build @@ -135,7 +135,6 @@ system_ss.add(when: 'CONFIG_PVPANIC_MMIO', if_true: fil= es('pvpanic-mmio.c')) system_ss.add(when: 'CONFIG_AUX', if_true: files('auxbus.c')) system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files( 'aspeed_hace.c', - 'aspeed_i3c.c', 'aspeed_lpc.c', 'aspeed_ltpi.c', 'aspeed_pwm.c', diff --git a/hw/misc/trace-events b/hw/misc/trace-events index d6af2fcf85..b88accc437 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -293,12 +293,6 @@ armsse_mhu_write(uint64_t offset, uint64_t data, unsig= ned size) "SSE-200 MHU wri # aspeed_xdma.c aspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%"= PRIx64 " data 0x%" PRIx64 =20 -# aspeed_i3c.c -aspeed_i3c_read(uint64_t offset, uint64_t data) "I3C read: offset 0x%" PRI= x64 " data 0x%" PRIx64 -aspeed_i3c_write(uint64_t offset, uint64_t data) "I3C write: offset 0x%" P= RIx64 " data 0x%" PRIx64 -aspeed_i3c_device_read(uint32_t deviceid, uint64_t offset, uint64_t data) = "I3C Dev[%u] read: offset 0x%" PRIx64 " data 0x%" PRIx64 -aspeed_i3c_device_write(uint32_t deviceid, uint64_t offset, uint64_t data)= "I3C Dev[%u] write: offset 0x%" PRIx64 " data 0x%" PRIx64 - # aspeed_pwm.c aspeed_pwm_read(uint64_t offset, uint64_t data) "read: offset 0x%" PRIx64 = " data 0x%" PRIx64 aspeed_pwm_write(uint64_t offset, uint64_t data) "write: offset 0x%" PRIx6= 4 " data 0x%" PRIx64 --=20 2.43.0