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[216.71.219.44]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-8244168fdf5sm926914b3a.17.2026.02.05.20.22.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Feb 2026 20:22:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1770351730; x=1770956530; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BZQOTv1ZWaw7/m+ukhNnjzXfOk5Em/QF1TWzcoaJze0=; b=gF0BLRdVMWm6JoHAZAgM7LzfFyrf191SU27o013BhJua9CUCWSqqGiLNHWmmjC8kAk 8bKkV307sNX8xFkBw4NDwP37+Mrrs6WoMqMoSeyW9q7KFxvympKCm7d0cKPxrDm3uKxs rl6vKyIaw+hbg7zkWmrTKBfkyalcIzwlfWDOJunX/sH32O1MSY/srdkagRBhr1TgknEo /H+PwzCaPD0Md8UTrMx5jnriagAWIFo6apTGu4aRVVDFadrZd2n7fK+BJ3M8PmaZNkw3 IP1h5owl/+ow+eW+auEhAuT2e48mXdIZMrvo+PrZKCIzGWYHqojJLo8gmnBDSpdupQiL sJ8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770351730; x=1770956530; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=BZQOTv1ZWaw7/m+ukhNnjzXfOk5Em/QF1TWzcoaJze0=; b=NGkoKiK5zusYfqnYad0sMZtZ0Q76Eh22pVxEn/CIWaDWLCj0wqIFw8jMs/zYtg33N8 OfofDisW2aIr/2TwUhIViRD7xAHgPDhv0h9AF4RrvXgMRwWxH/1o0KQtL2+0z5JiS2vW Jqp5l5b5MFBbPVF//lVkhKJsRtwvnCkluzypIk0P+GUv3viDDmt0YGzVWSLjrY3X0Oxt SjlzM1PTidyU4sIiHipinnMlWXYma6/CSQeoGHG3VFrcm1kgVW0r3zVV5WyFVWR2Wx26 0dqGtjcyTN91IzI+GbWw5qlabP4YSVVjDLlNcqF2IvUdP/hXSEFXqQmk9eRt2YaB334I 9bmA== X-Gm-Message-State: AOJu0YzEokzYt2pKiaX4Nb5omT02HAR6q98zp7GksRQ02Yvs5ZeoK6oS VymexaWJ4FO+DJnQ0eKSjZsnWIyamgasMy2wJ70EoS777viQ8oEu9uxB3HksJPNf4hV3qdUsmDk F2Q45fOM= X-Gm-Gg: AZuq6aJ7AJ0THzjamUudWmkq5J5rlbCnXAykG/h1/J49zEtZ/LJAK/xdyBZPmfkPcpD 7MTFTCziGu7jm/mWRJPuVQDHkcyrNenSjK4cef9919nviKp1uC7az0Wmy74hg8YkQbDVyMSR/FF 2MDLPOT6ynVjKDMHjh+apXdHxvVdpWWqE/uWIGGCgCjVmF7R2+bPnpZAZQAEfOGOfCMOax9moFi 74WWJ1PUkY6z/kqARt6coxfLTrR6ssOo0w3IR8HJEmoILv4wIWWcxIZj2feJjkIBm2/qkAJmD3d /LtPaKwqdbBUAsmkffdWx01MeI5dxYzm+h7kUFnab5/K3V5FptOa2+4IUngSNaTIw4RahiPUNDo 7jDgqshLRYpb3ZaAhpAzyXxDGMPuJYzKIn8mYr9W23twsYMFtWhMPCrBlQ8JEkFjYkwaidVhGlo MUt66yba5MYRheG2Tc/F/3R1htpwmx3KctrQGYh8XnJq1P/Of/UoQK2Lll7GWPbBIM X-Received: by 2002:a05:6a00:240b:b0:823:1094:2458 with SMTP id d2e1a72fcca58-824413c12b8mr1285493b3a.0.1770351730491; Thu, 05 Feb 2026 20:22:10 -0800 (PST) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: anjo@rev.ng, Richard Henderson , Jim MacArthur , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Peter Maydell , Paolo Bonzini , kvm@vger.kernel.org, qemu-arm@nongnu.org, Pierrick Bouvier Subject: [PATCH v2 12/12] target/arm/tcg/translate.h: replace target_long with int64_t Date: Thu, 5 Feb 2026 20:21:50 -0800 Message-ID: <20260206042150.912578-13-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260206042150.912578-1-pierrick.bouvier@linaro.org> References: <20260206042150.912578-1-pierrick.bouvier@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::442; envelope-from=pierrick.bouvier@linaro.org; helo=mail-pf1-x442.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1770351775765154100 target_long is used to represent a pc diff. Checked all call sites to make sure we were already passing signed values, so extending works as expected. Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Pierrick Bouvier --- target/arm/tcg/translate-a32.h | 2 +- target/arm/tcg/translate.h | 12 ++++++------ target/arm/tcg/translate.c | 18 +++++++++--------- 3 files changed, 16 insertions(+), 16 deletions(-) diff --git a/target/arm/tcg/translate-a32.h b/target/arm/tcg/translate-a32.h index 0b1fa57965c..a8df364171b 100644 --- a/target/arm/tcg/translate-a32.h +++ b/target/arm/tcg/translate-a32.h @@ -40,7 +40,7 @@ void write_neon_element64(TCGv_i64 src, int reg, int ele,= MemOp memop); TCGv_i32 add_reg_for_lit(DisasContext *s, int reg, int ofs); void gen_set_cpsr(TCGv_i32 var, uint32_t mask); void gen_set_condexec(DisasContext *s); -void gen_update_pc(DisasContext *s, target_long diff); +void gen_update_pc(DisasContext *s, int64_t diff); void gen_lookup_tb(DisasContext *s); long vfp_reg_offset(bool dp, unsigned reg); long neon_full_reg_offset(unsigned reg); diff --git a/target/arm/tcg/translate.h b/target/arm/tcg/translate.h index 2c8358dd7fa..1f455e4c434 100644 --- a/target/arm/tcg/translate.h +++ b/target/arm/tcg/translate.h @@ -27,8 +27,8 @@ typedef struct DisasLabel { typedef struct DisasDelayException { struct DisasDelayException *next; TCGLabel *lab; - target_long pc_curr; - target_long pc_save; + int64_t pc_curr; + int64_t pc_save; int condexec_mask; int condexec_cond; uint32_t excp; @@ -359,14 +359,14 @@ static inline int curr_insn_len(DisasContext *s) =20 #ifdef TARGET_AARCH64 void a64_translate_init(void); -void gen_a64_update_pc(DisasContext *s, target_long diff); +void gen_a64_update_pc(DisasContext *s, int64_t diff); extern const TranslatorOps aarch64_translator_ops; #else static inline void a64_translate_init(void) { } =20 -static inline void gen_a64_update_pc(DisasContext *s, target_long diff) +static inline void gen_a64_update_pc(DisasContext *s, int64_t diff) { } #endif @@ -377,9 +377,9 @@ void arm_gen_test_cc(int cc, TCGLabel *label); MemOp pow2_align(unsigned i); void unallocated_encoding(DisasContext *s); void gen_exception_internal(int excp); -void gen_exception_insn_el(DisasContext *s, target_long pc_diff, int excp, +void gen_exception_insn_el(DisasContext *s, int64_t pc_diff, int excp, uint32_t syn, uint32_t target_el); -void gen_exception_insn(DisasContext *s, target_long pc_diff, +void gen_exception_insn(DisasContext *s, int64_t pc_diff, int excp, uint32_t syn); TCGLabel *delay_exception_el(DisasContext *s, int excp, uint32_t syn, uint32_t target_el); diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c index 982c83ef42a..42b2785fb06 100644 --- a/target/arm/tcg/translate.c +++ b/target/arm/tcg/translate.c @@ -250,12 +250,12 @@ static inline int get_a32_user_mem_index(DisasContext= *s) } =20 /* The pc_curr difference for an architectural jump. */ -static target_long jmp_diff(DisasContext *s, target_long diff) +static int64_t jmp_diff(DisasContext *s, int64_t diff) { return diff + (s->thumb ? 4 : 8); } =20 -static void gen_pc_plus_diff(DisasContext *s, TCGv_i32 var, target_long di= ff) +static void gen_pc_plus_diff(DisasContext *s, TCGv_i32 var, int64_t diff) { assert(s->pc_save !=3D -1); if (tb_cflags(s->base.tb) & CF_PCREL) { @@ -735,7 +735,7 @@ void gen_set_condexec(DisasContext *s) } } =20 -void gen_update_pc(DisasContext *s, target_long diff) +void gen_update_pc(DisasContext *s, int64_t diff) { gen_pc_plus_diff(s, cpu_R[15], diff); s->pc_save =3D s->pc_curr + diff; @@ -1055,7 +1055,7 @@ static void gen_exception(int excp, uint32_t syndrome) tcg_constant_i32(syndrome)); } =20 -static void gen_exception_insn_el_v(DisasContext *s, target_long pc_diff, +static void gen_exception_insn_el_v(DisasContext *s, int64_t pc_diff, int excp, uint32_t syn, TCGv_i32 tcg_e= l) { if (s->aarch64) { @@ -1068,14 +1068,14 @@ static void gen_exception_insn_el_v(DisasContext *s= , target_long pc_diff, s->base.is_jmp =3D DISAS_NORETURN; } =20 -void gen_exception_insn_el(DisasContext *s, target_long pc_diff, int excp, +void gen_exception_insn_el(DisasContext *s, int64_t pc_diff, int excp, uint32_t syn, uint32_t target_el) { gen_exception_insn_el_v(s, pc_diff, excp, syn, tcg_constant_i32(target_el)); } =20 -void gen_exception_insn(DisasContext *s, target_long pc_diff, +void gen_exception_insn(DisasContext *s, int64_t pc_diff, int excp, uint32_t syn) { if (s->aarch64) { @@ -1310,7 +1310,7 @@ static void gen_goto_ptr(void) * cpu_loop_exec. Any live exit_requests will be processed as we * enter the next TB. */ -static void gen_goto_tb(DisasContext *s, unsigned tb_slot_idx, target_long= diff) +static void gen_goto_tb(DisasContext *s, unsigned tb_slot_idx, int64_t dif= f) { if (translator_use_goto_tb(&s->base, s->pc_curr + diff)) { /* @@ -1337,7 +1337,7 @@ static void gen_goto_tb(DisasContext *s, unsigned tb_= slot_idx, target_long diff) } =20 /* Jump, specifying which TB number to use if we gen_goto_tb() */ -static void gen_jmp_tb(DisasContext *s, target_long diff, int tbno) +static void gen_jmp_tb(DisasContext *s, int64_t diff, int tbno) { if (unlikely(s->ss_active)) { /* An indirect jump so that we still trigger the debug exception. = */ @@ -1380,7 +1380,7 @@ static void gen_jmp_tb(DisasContext *s, target_long d= iff, int tbno) } } =20 -static inline void gen_jmp(DisasContext *s, target_long diff) +static inline void gen_jmp(DisasContext *s, int64_t diff) { gen_jmp_tb(s, diff, 0); } --=20 2.47.3