From nobody Mon Feb 9 05:00:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1770108929; cv=none; d=zohomail.com; s=zohoarc; b=ZZRG48Gggq3Rfpxx4kM+GtUpGpBgq/89qCQaO/bOCDhg5GaWfZxfU8V/YQ/RU3clo/1M9lPs15a9rSBC2Gq7l+mSFlIqt6Vu7g5WceRIaTgrdnC+8ISe0qXKr7WaKEyTc3t3/kNaBNfSlmMZ0s8KSHqsN2X0o1uyRk+AsY1YKpo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1770108929; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=O9CnBpOZwDMyxp20ptc09sRiFKgKJ/4jPDUzQa4oza8=; b=LWU6MlodbswGdWpl8R0jkqtR3kr42ePJy8+VzzWhrvQKHLuHYU6O4EqYCQjCBYEBRuiRmtvQSxaWOwgwJFBY1hB2Ok6rbExKMyMLncvY2wnD8+tZNr1/ZB0NDOJ0rXPFcmy7MpZ38RkKeajwjdPRqCdaOmsnc29shHL/Wq0q9Yg= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1770108929083805.83852859561; Tue, 3 Feb 2026 00:55:29 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vnC9f-0004nb-TT; Tue, 03 Feb 2026 03:53:03 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vnC9c-0004gh-U9; Tue, 03 Feb 2026 03:53:01 -0500 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vnC9b-0002qU-IX; Tue, 03 Feb 2026 03:53:00 -0500 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Tue, 3 Feb 2026 16:52:32 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Tue, 3 Feb 2026 16:52:32 +0800 To: , , Paolo Bonzini , Peter Maydell , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Steven Lee , Troy Lee , Andrew Jeffery , Joel Stanley , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , "open list:All patches CC here" , "open list:ARM TCG CPUs" CC: , , , Patrick Venture Subject: [PATCH v2 07/20] hw/i3c/aspeed_i3c: Add register RO field masks Date: Tue, 3 Feb 2026 16:52:07 +0800 Message-ID: <20260203085229.1543287-8-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260203085229.1543287-1-jamin_lin@aspeedtech.com> References: <20260203085229.1543287-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via qemu development Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1770108929346158500 Content-Type: text/plain; charset="utf-8" From: Joe Komlodi Adds read-only register masks for the Aspeed I3C controller registers. Signed-off-by: Joe Komlodi Signed-off-by: Jamin Lin Reviewed-by: Patrick Venture --- hw/i3c/aspeed_i3c.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/hw/i3c/aspeed_i3c.c b/hw/i3c/aspeed_i3c.c index f0352aaca0..bb41493c55 100644 --- a/hw/i3c/aspeed_i3c.c +++ b/hw/i3c/aspeed_i3c.c @@ -74,6 +74,21 @@ REG32(I3C6_REG1, 0x64) FIELD(I3C6_REG1, SA_EN, 15, 1) FIELD(I3C6_REG1, INST_ID, 16, 4) =20 +static const uint32_t ast2600_i3c_controller_ro[ASPEED_I3C_NR_REGS] =3D { + [R_I3C1_REG0] =3D 0xcc000000, + [R_I3C1_REG1] =3D 0xfff00000, + [R_I3C2_REG0] =3D 0xcc000000, + [R_I3C2_REG1] =3D 0xfff00000, + [R_I3C3_REG0] =3D 0xcc000000, + [R_I3C3_REG1] =3D 0xfff00000, + [R_I3C4_REG0] =3D 0xcc000000, + [R_I3C4_REG1] =3D 0xfff00000, + [R_I3C5_REG0] =3D 0xcc000000, + [R_I3C5_REG1] =3D 0xfff00000, + [R_I3C6_REG0] =3D 0xcc000000, + [R_I3C6_REG1] =3D 0xfff00000, +}; + static uint64_t aspeed_i3c_read(void *opaque, hwaddr addr, unsigned int si= ze) { AspeedI3CState *s =3D ASPEED_I3C(opaque); @@ -97,6 +112,7 @@ static void aspeed_i3c_write(void *opaque, =20 addr >>=3D 2; =20 + data &=3D ~ast2600_i3c_controller_ro[addr]; /* I3C controller register */ switch (addr) { case R_I3C1_REG1: --=20 2.43.0