From nobody Tue Feb 10 03:56:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1770070249331767.0009249166809; Mon, 2 Feb 2026 14:10:49 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vn27X-0007UL-43; Mon, 02 Feb 2026 17:10:11 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vn27A-0005qM-1h; Mon, 02 Feb 2026 17:09:48 -0500 Received: from isrv.corpit.ru ([212.248.84.144]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vn278-0002iG-8j; Mon, 02 Feb 2026 17:09:47 -0500 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 4AC2E1852C1; Tue, 03 Feb 2026 01:07:35 +0300 (MSK) Received: from think4mjt.tls.msk.ru (mjtthink.wg.tls.msk.ru [192.168.177.146]) by tsrv.corpit.ru (Postfix) with ESMTP id 28B7235B3D4; Tue, 03 Feb 2026 01:08:17 +0300 (MSK) From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Paolo Bonzini , Richard Henderson , Michael Tokarev Subject: [Stable-10.2.1 20/56] target/i386/tcg: mask addresses for VSIB Date: Tue, 3 Feb 2026 01:07:25 +0300 Message-ID: <20260202220805.945271-20-mjt@tls.msk.ru> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=212.248.84.144; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1770070250263158501 Content-Type: text/plain; charset="utf-8" From: Paolo Bonzini VSIB can have either 32-bit or 64-bit addresses, pass a constant mask to the helper and apply it before the load. Cc: qemu-stable@nongnu.org Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini (cherry picked from commit 5e3572ef2e94608568b1a73eab9d382b250936eb) Signed-off-by: Michael Tokarev diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h index a2e4d48039..853196b2bb 100644 --- a/target/i386/ops_sse.h +++ b/target/i386/ops_sse.h @@ -2362,42 +2362,42 @@ void glue(helper_vpmaskmovq, SUFFIX)(CPUX86State *e= nv, Reg *d, Reg *v, Reg *s) } =20 void glue(helper_vpgatherdd, SUFFIX)(CPUX86State *env, - Reg *d, Reg *v, Reg *s, target_ulong a0, unsigned scale) + Reg *d, Reg *v, Reg *s, target_ulong a0, unsigned scale, target_ul= ong amask) { int i; for (i =3D 0; i < (2 << SHIFT); i++) { if (v->L(i) >> 31) { target_ulong addr =3D a0 + ((target_ulong)(int32_t)s->L(i) << scale); - d->L(i) =3D cpu_ldl_data_ra(env, addr, GETPC()); + d->L(i) =3D cpu_ldl_data_ra(env, addr & amask, GETPC()); } v->L(i) =3D 0; } } =20 void glue(helper_vpgatherdq, SUFFIX)(CPUX86State *env, - Reg *d, Reg *v, Reg *s, target_ulong a0, unsigned scale) + Reg *d, Reg *v, Reg *s, target_ulong a0, unsigned scale, target_ul= ong amask) { int i; for (i =3D 0; i < (1 << SHIFT); i++) { if (v->Q(i) >> 63) { target_ulong addr =3D a0 + ((target_ulong)(int32_t)s->L(i) << scale); - d->Q(i) =3D cpu_ldq_data_ra(env, addr, GETPC()); + d->Q(i) =3D cpu_ldq_data_ra(env, addr & amask, GETPC()); } v->Q(i) =3D 0; } } =20 void glue(helper_vpgatherqd, SUFFIX)(CPUX86State *env, - Reg *d, Reg *v, Reg *s, target_ulong a0, unsigned scale) + Reg *d, Reg *v, Reg *s, target_ulong a0, unsigned scale, target_ul= ong amask) { int i; for (i =3D 0; i < (1 << SHIFT); i++) { if (v->L(i) >> 31) { target_ulong addr =3D a0 + ((target_ulong)(int64_t)s->Q(i) << scale); - d->L(i) =3D cpu_ldl_data_ra(env, addr, GETPC()); + d->L(i) =3D cpu_ldl_data_ra(env, addr & amask, GETPC()); } v->L(i) =3D 0; } @@ -2408,14 +2408,14 @@ void glue(helper_vpgatherqd, SUFFIX)(CPUX86State *e= nv, } =20 void glue(helper_vpgatherqq, SUFFIX)(CPUX86State *env, - Reg *d, Reg *v, Reg *s, target_ulong a0, unsigned scale) + Reg *d, Reg *v, Reg *s, target_ulong a0, unsigned scale, target_ul= ong amask) { int i; for (i =3D 0; i < (1 << SHIFT); i++) { if (v->Q(i) >> 63) { target_ulong addr =3D a0 + ((target_ulong)(int64_t)s->Q(i) << scale); - d->Q(i) =3D cpu_ldq_data_ra(env, addr, GETPC()); + d->Q(i) =3D cpu_ldq_data_ra(env, addr & amask, GETPC()); } v->Q(i) =3D 0; } diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc index 1a7fab9333..12e7f5f943 100644 --- a/target/i386/tcg/emit.c.inc +++ b/target/i386/tcg/emit.c.inc @@ -43,8 +43,8 @@ typedef void (*SSEFunc_0_pppi)(TCGv_ptr reg_a, TCGv_ptr r= eg_b, TCGv_ptr reg_c, TCGv_i32 val); typedef void (*SSEFunc_0_eppt)(TCGv_ptr env, TCGv_ptr reg_a, TCGv_ptr reg_= b, TCGv val); -typedef void (*SSEFunc_0_epppti)(TCGv_ptr env, TCGv_ptr reg_a, TCGv_ptr re= g_b, - TCGv_ptr reg_c, TCGv a0, TCGv_i32 scale); +typedef void (*SSEFunc_0_eppptit)(TCGv_ptr env, TCGv_ptr reg_a, TCGv_ptr r= eg_b, + TCGv_ptr reg_c, TCGv a0, TCGv_i32 scale, = TCGv amask); typedef void (*SSEFunc_0_eppppi)(TCGv_ptr env, TCGv_ptr reg_a, TCGv_ptr re= g_b, TCGv_ptr reg_c, TCGv_ptr reg_d, TCGv_i32= flags); typedef void (*SSEFunc_0_eppppii)(TCGv_ptr env, TCGv_ptr reg_a, TCGv_ptr r= eg_b, @@ -1098,18 +1098,19 @@ VEXW_AVX(VPMASKMOV, vpmaskmov) =20 /* Same as above, but with extra arguments to the helper. */ static inline void gen_vsib_avx(DisasContext *s, X86DecodedInsn *decode, - SSEFunc_0_epppti d_xmm, SSEFunc_0_epppti q= _xmm, - SSEFunc_0_epppti d_ymm, SSEFunc_0_epppti q= _ymm) + SSEFunc_0_eppptit d_xmm, SSEFunc_0_eppptit= q_xmm, + SSEFunc_0_eppptit d_ymm, SSEFunc_0_eppptit= q_ymm) { - SSEFunc_0_epppti d =3D s->vex_l ? d_ymm : d_xmm; - SSEFunc_0_epppti q =3D s->vex_l ? q_ymm : q_xmm; - SSEFunc_0_epppti fn =3D s->vex_w ? q : d; + SSEFunc_0_eppptit d =3D s->vex_l ? d_ymm : d_xmm; + SSEFunc_0_eppptit q =3D s->vex_l ? q_ymm : q_xmm; + SSEFunc_0_eppptit fn =3D s->vex_w ? q : d; TCGv_i32 scale =3D tcg_constant_i32(decode->mem.scale); TCGv_ptr index =3D tcg_temp_new_ptr(); + TCGv mask =3D tcg_constant_tl(MAKE_64BIT_MASK(0, 8 << s->aflag)); =20 /* Pass third input as (index, base, scale) */ tcg_gen_addi_ptr(index, tcg_env, ZMM_OFFSET(decode->mem.index)); - fn(tcg_env, OP_PTR0, OP_PTR1, index, s->A0, scale); + fn(tcg_env, OP_PTR0, OP_PTR1, index, s->A0, scale, mask); =20 /* * There are two output operands, so zero OP1's high 128 bits diff --git a/target/i386/tcg/ops_sse_header.h.inc b/target/i386/tcg/ops_sse= _header.h.inc index d92c6faf6d..bbeb7301c3 100644 --- a/target/i386/tcg/ops_sse_header.h.inc +++ b/target/i386/tcg/ops_sse_header.h.inc @@ -388,10 +388,10 @@ DEF_HELPER_4(glue(vpmaskmovd_st, SUFFIX), void, env, = Reg, Reg, tl) DEF_HELPER_4(glue(vpmaskmovq_st, SUFFIX), void, env, Reg, Reg, tl) DEF_HELPER_4(glue(vpmaskmovd, SUFFIX), void, env, Reg, Reg, Reg) DEF_HELPER_4(glue(vpmaskmovq, SUFFIX), void, env, Reg, Reg, Reg) -DEF_HELPER_6(glue(vpgatherdd, SUFFIX), void, env, Reg, Reg, Reg, tl, i32) -DEF_HELPER_6(glue(vpgatherdq, SUFFIX), void, env, Reg, Reg, Reg, tl, i32) -DEF_HELPER_6(glue(vpgatherqd, SUFFIX), void, env, Reg, Reg, Reg, tl, i32) -DEF_HELPER_6(glue(vpgatherqq, SUFFIX), void, env, Reg, Reg, Reg, tl, i32) +DEF_HELPER_7(glue(vpgatherdd, SUFFIX), void, env, Reg, Reg, Reg, tl, i32, = tl) +DEF_HELPER_7(glue(vpgatherdq, SUFFIX), void, env, Reg, Reg, Reg, tl, i32, = tl) +DEF_HELPER_7(glue(vpgatherqd, SUFFIX), void, env, Reg, Reg, Reg, tl, i32, = tl) +DEF_HELPER_7(glue(vpgatherqq, SUFFIX), void, env, Reg, Reg, Reg, tl, i32, = tl) #if SHIFT =3D=3D 2 DEF_HELPER_3(vpermd_ymm, void, Reg, Reg, Reg) DEF_HELPER_4(vpermdq_ymm, void, Reg, Reg, Reg, i32) --=20 2.47.3