From nobody Sun Feb 8 23:32:45 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=quarantine dis=none) header.from=kernel.org ARC-Seal: i=1; a=rsa-sha256; t=1770102255; cv=none; d=zohomail.com; s=zohoarc; b=Zx6aqbg5DJRr0NvzbfkRN+d4Hh77MlaL+soYE+0WGdm1eOKMyM64xrfVGvTnomCz7bLcSjE/G/CbL52bNv5BFRoepLn3BoQ4QbFMvQufPgRwdzn+IDgWKVdwkFwmMlZA3q0PIWIb2b02xd5WgUN/DHoBr8a596+uFdW5TuVUlNM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1770102255; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=+YBauUu69JkvWm6vlNJEaYp5/fylP5me1i/NBvlZCzo=; b=OUQXQ1TddSbddvleKuhZhzhRWh4GrA8eLQNB9twqKuta6YVuKzcPg8sZO4O34RTnZ35uQX5B4nVOLnkQRFNXost2y6fUJSjISO6H0Rn0jcVIs+jZ8lKhaHZmIhpTRF6Kwn0BH8PO6HVsQv1qvRNtfKGRreJ4Z6ZS9ji4ANxRZF0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1770102255906726.7048092499786; Mon, 2 Feb 2026 23:04:15 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vnAS5-000279-KX; Tue, 03 Feb 2026 02:03:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vnARw-00020e-I6; Tue, 03 Feb 2026 02:03:49 -0500 Received: from sea.source.kernel.org ([172.234.252.31]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vnARu-0003Dx-0h; Tue, 03 Feb 2026 02:03:48 -0500 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 2DA7A444C7; Tue, 3 Feb 2026 07:03:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B1138C2BC86; Tue, 3 Feb 2026 07:03:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770102217; bh=Nkr5nf9b7Y4A9IBCYQHm95/Po/azKwjoY+f4gLgHvqk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Mm/hMfPJLfZVNBLSnNrD2YZr4EPrVCKv2Oa1w1RYa4eR/F9c+i6Dv1vdiUVk0XmQy Ykymu20za64Iygmrq11g5F1P0y6TkcDQz9o9oQpT29DM7ASDC9VRf6JG0alhRWf0HJ wD0pUv3YFC+x/BAGjJlVMWHh6MDNnGqgrSrbibkOcHktFoE8gpXeEhUsH/QecGgO3O nGwHtGc4JLz90aavL7n/G/1KiAJ2AruVnAeQE9WFwrkTCabntvibUjRNQNDdfKyADp D3slJnnTJa122Sqps2JPdnmz9eE+eH5FCGBHDWTlPSO9awqGIKdYZ2Dcpsv5b/vQN7 GNVFxFzPP7FVA== From: Drew Fustini Date: Mon, 02 Feb 2026 23:01:19 -0800 Subject: [PATCH RFC 3/7] hw/riscv: virt-acpi-build: Generate PPTT table MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260202-riscv-rqsc-v1-3-dcf448a3ed73@kernel.org> References: <20260202-riscv-rqsc-v1-0-dcf448a3ed73@kernel.org> In-Reply-To: <20260202-riscv-rqsc-v1-0-dcf448a3ed73@kernel.org> To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Paolo Bonzini , Nicolas Pitre , =?utf-8?q?Kornel_Dul=C4=99ba?= , Atish Kumar Patra , Atish Patra , Vasudevan Srinivasan , =?utf-8?q?Radim_Kr=C4=8Dm=C3=A1=C5=99?= , yunhui cui , Chen Pei , guo.wenjia23@zte.com.cn, liu.qingtao2@zte.com.cn, Sunil V L , "Michael S. Tsirkin" , Igor Mammedov , Ani Sinha , Shannon Zhao , Peter Maydell , Sia Jee Heng , qemu-arm@nongnu.org, Drew Fustini X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=3575; i=fustini@kernel.org; h=from:subject:message-id; bh=f01KlbLacT8ikueuCj8ojGDFWa6aTj7XhptcDLqYro0=; b=owGbwMvMwCV2+43O4ZsaG3kYT6slMWQ2zj12Y3/j532z1onsyTvaKljStOuEpcvcf2tWp9+fW 7vN669dekcpC4MYF4OsmCLLpg95F5Z4hX5dMP/FNpg5rEwgQxi4OAVgIm9YGBmePDsg0/s+2aiV M8x5G4NfzM3Z1dYcijOCruU8cS/fdn46I8PxXQ11it5JGrNY/oj7bbLQLfg0NfOC9MqGFmnhXZX 7V/AAAA== X-Developer-Key: i=fustini@kernel.org; a=openpgp; fpr=1B6F948213EA489734F3997035D5CD577C1E6010 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=172.234.252.31; envelope-from=fustini@kernel.org; helo=sea.source.kernel.org X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @kernel.org) X-ZM-MESSAGEID: 1770102259611154100 From: Sia Jee Heng Generate the Processor Properties Topology Table (PPTT) with a cache type 1 structure for RISC-V virtual machine. A 3-layer cache topology is used. Link: https://lore.kernel.org/all/20240129104039.117671-1-jeeheng.sia@starf= ivetech.com/ Signed-off-by: Sia Jee Heng Signed-off-by: Drew Fustini --- hw/riscv/virt-acpi-build.c | 47 ++++++++++++++++++++++++++++++++++++++++++= ++++ hw/riscv/virt.c | 1 + 2 files changed, 48 insertions(+) diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c index 210b3f5fff98..5703b0827682 100644 --- a/hw/riscv/virt-acpi-build.c +++ b/hw/riscv/virt-acpi-build.c @@ -40,6 +40,7 @@ #include "qapi/error.h" #include "qemu/error-report.h" #include "system/reset.h" +#include "qemu/units.h" =20 #define ACPI_BUILD_TABLE_SIZE 0x20000 #define ACPI_BUILD_INTC_ID(socket, index) ((socket << 24) | (index)) @@ -973,6 +974,48 @@ build_srat(GArray *table_data, BIOSLinker *linker, RIS= CVVirtState *vms) acpi_table_end(linker, &table); } =20 +static void pptt_setup(GArray *table_data, BIOSLinker *linker, MachineStat= e *ms, + const char *oem_id, const char *oem_table_id) +{ + CPUCaches default_cache_info =3D { + .l1d_cache =3D &(CPUCacheInfo) { + .type =3D DATA_CACHE, + .size =3D 64 * KiB, + .line_size =3D 64, + .associativity =3D 4, + .sets =3D 256, + .attributes =3D 0x02, + }, + .l1i_cache =3D &(CPUCacheInfo) { + .type =3D INSTRUCTION_CACHE, + .size =3D 64 * KiB, + .line_size =3D 64, + .associativity =3D 4, + .sets =3D 256, + .attributes =3D 0x04, + }, + .l2_cache =3D &(CPUCacheInfo) { + .type =3D UNIFIED_CACHE, + .size =3D 2048 * KiB, + .line_size =3D 64, + .associativity =3D 8, + .sets =3D 4096, + .attributes =3D 0x0a, + }, + .l3_cache =3D &(CPUCacheInfo) { + .type =3D UNIFIED_CACHE, + .size =3D 4096 * KiB, + .line_size =3D 64, + .associativity =3D 8, + .sets =3D 8192, + .attributes =3D 0x0a, + }, + }; + + build_pptt(table_data, linker, ms, oem_id, oem_table_id, + &default_cache_info); +} + static void virt_acpi_build(RISCVVirtState *s, AcpiBuildTables *tables) { GArray *table_offsets; @@ -1015,6 +1058,10 @@ static void virt_acpi_build(RISCVVirtState *s, AcpiB= uildTables *tables) acpi_add_table(table_offsets, tables_blob); build_rqsc(tables_blob, tables->linker, s); =20 + acpi_add_table(table_offsets, tables_blob); + pptt_setup(tables_blob, tables->linker, ms, + s->oem_id, s->oem_table_id); + acpi_add_table(table_offsets, tables_blob); { AcpiMcfgInfo mcfg =3D { diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 99871119be44..491328f7e192 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1929,6 +1929,7 @@ static void virt_machine_class_init(ObjectClass *oc, = const void *data) mc->cpu_index_to_instance_props =3D riscv_numa_cpu_index_to_props; mc->get_default_cpu_node_id =3D riscv_numa_get_default_cpu_node_id; mc->numa_mem_supported =3D true; + mc->smp_props.clusters_supported =3D true; /* platform instead of architectural choice */ mc->cpu_cluster_has_numa_boundary =3D true; mc->default_ram_id =3D "riscv_virt_board.ram"; --=20 2.43.0