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[81.2.115.145]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-435e10edf62sm16762185f8f.13.2026.01.29.08.10.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Jan 2026 08:10:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1769703004; x=1770307804; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=iDghPW5CxBXO9mC8DhlYzxtsMzpsZXCT4re3Q+rFilk=; b=rjSc977exSI85yvG6YiLTsfVHaOB0Lcl08lYehocANIP/oi4ZS5vrXwIUG/DQzSepV rKflxrWbPEiYGreoBdncw4IjLFdOhO8SewnQ/D8Iwok8aGbX74NgaOg1OfwQm+1Hw7pK fiN8D3xJl8AIl1UlzY4eiaiiolqYlV6NcIoCTLDYsVT8ag7eI8lrwCfX3vjsY5LVDAlF S6y5oYezrwddCQvW5+i9x/Pfcf5lxw7R7TNH41eC9UZFJXhdIBXFfVcIO437+7YVmKxM dEcCgdYNPt4ESNMcvy419VAl1h633HrIqKWOz5SSvsUASlbdy2C5sbqcFZj2Jyzn/aOY MEoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1769703004; x=1770307804; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=iDghPW5CxBXO9mC8DhlYzxtsMzpsZXCT4re3Q+rFilk=; b=hpIEFWREkBMbdWj/N56VKGq6ZrkDOYpUdGXFibtIRp+qumNLsF3I7rURHNflPiMMeK I+eVZTVyS380NW+nOts9cctoMinD9TuxnL6TYTr5T+05PsOkbetNFuwmawZzKFXPPgU+ dK3qb10yRjrDlQ9NzxTbjCnE95YRNgV52+B+KHLZKx/wu81nx1O+dpBG/WKldsCqb77M FGPwZYiNVoKQiU2klifWj8EATMx5d0PG60I5lb4dkrc11cIVH3D2nCYfRpybslNKvkw2 0kTckleE8hgmj4RcnWxwwsJS5oxJav8C6AyF5/CNuPWAyvxQ/vXW+THKhFjKE3wLrnP4 6JbQ== X-Gm-Message-State: AOJu0Yxg9gb7jPAykAPj62SkoSQkhrX/p0I0GqphhAvjgEZ4t8kMbbZs zZVDKOPG0BEfLvT8MKTxUAGXApUHaIPkjXdjlX+R/+Fka8jNeccX+SZgrj7N5j8i0stNKZCI7+J wf9kfetM= X-Gm-Gg: AZuq6aLwCd+o31eRYzjW+ROhpTj1qvu9key91SbsNchzkV8LzkpUq15YSW5cUSOTjlV z1eqNASJTKrBZiwYnBFTFEGUn6eI6ME4H+yfbldE82Dk2xptWOogPWuOo5bBuoNUYsB0AH2LUi1 mdwAqxqmhl4Asa9LZKF6lIbpGDtxoA4GwlX8B68fiOV6NDxMQAXAnCFu94vTB+SbzPNcCmR4lzg D+iYeTe8IQEFta3pneI6RSLWUkCWsDsuWiwUypvP+JeKqJRH3kzTb/6WT/rulXD3QebZyrB/cjW V4JtaDFeXJgGDjyUN0wHUDQvI+CeoHu4OcL1Bivfv+GHmmzN1dVGFAHtbyplFJLxTggQmMC4QSp nYFjOU9MuDKSjvsP71XSLMWerDhyPnytxsh/Bc1JXcwUmnLZYhnrKkuEzfdot0aBj6GD+slgzFn ZsLLUyTkWa+CcnE9hxXG99pacWUxKopzuV9xBggO/d X-Received: by 2002:a05:6000:310c:b0:435:9770:9ec8 with SMTP id ffacd0b85a97d-435f3aa9ec7mr154863f8f.32.1769703004022; Thu, 29 Jan 2026 08:10:04 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 38/43] target/arm/hvf: Move hvf_sysreg_[read, write]_cp() functions around Date: Thu, 29 Jan 2026 16:09:12 +0000 Message-ID: <20260129160917.1415092-39-peter.maydell@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260129160917.1415092-1-peter.maydell@linaro.org> References: <20260129160917.1415092-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1769703109238158500 From: Philippe Mathieu-Daud=C3=A9 Next commit will use these functions prototype earlier. Rather than forward-declaring them, move them around. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Akihiko Odaki Message-id: 20260118215945.46693-2-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/hvf/hvf.c | 142 +++++++++++++++++++++---------------------- 1 file changed, 71 insertions(+), 71 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index e4c0d936f1..fcb7fa3b30 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -423,6 +423,77 @@ static const hv_sys_reg_t hvf_sreg_list[] =3D { =20 #undef DEF_SYSREG =20 +static uint32_t hvf_reg2cp_reg(uint32_t reg) +{ + return ENCODE_AA64_CP_REG((reg >> SYSREG_OP0_SHIFT) & SYSREG_OP0_MASK, + (reg >> SYSREG_OP1_SHIFT) & SYSREG_OP1_MASK, + (reg >> SYSREG_CRN_SHIFT) & SYSREG_CRN_MASK, + (reg >> SYSREG_CRM_SHIFT) & SYSREG_CRM_MASK, + (reg >> SYSREG_OP2_SHIFT) & SYSREG_OP2_MASK); +} + +static bool hvf_sysreg_read_cp(CPUState *cpu, const char *cpname, + uint32_t reg, uint64_t *val) +{ + ARMCPU *arm_cpu =3D ARM_CPU(cpu); + CPUARMState *env =3D &arm_cpu->env; + const ARMCPRegInfo *ri; + + ri =3D get_arm_cp_reginfo(arm_cpu->cp_regs, hvf_reg2cp_reg(reg)); + if (ri) { + if (!cp_access_ok(1, ri, true)) { + return false; + } + if (ri->accessfn) { + if (ri->accessfn(env, ri, true) !=3D CP_ACCESS_OK) { + return false; + } + } + if (ri->type & ARM_CP_CONST) { + *val =3D ri->resetvalue; + } else if (ri->readfn) { + *val =3D ri->readfn(env, ri); + } else { + *val =3D raw_read(env, ri); + } + trace_hvf_emu_reginfo_read(cpname, ri->name, *val); + return true; + } + + return false; +} + +static bool hvf_sysreg_write_cp(CPUState *cpu, const char *cpname, + uint32_t reg, uint64_t val) +{ + ARMCPU *arm_cpu =3D ARM_CPU(cpu); + CPUARMState *env =3D &arm_cpu->env; + const ARMCPRegInfo *ri; + + ri =3D get_arm_cp_reginfo(arm_cpu->cp_regs, hvf_reg2cp_reg(reg)); + + if (ri) { + if (!cp_access_ok(1, ri, false)) { + return false; + } + if (ri->accessfn) { + if (ri->accessfn(env, ri, false) !=3D CP_ACCESS_OK) { + return false; + } + } + if (ri->writefn) { + ri->writefn(env, ri, val); + } else { + raw_write(env, ri, val); + } + + trace_hvf_emu_reginfo_write(cpname, ri->name, val); + return true; + } + + return false; +} + int hvf_arch_get_registers(CPUState *cpu) { ARMCPU *arm_cpu =3D ARM_CPU(cpu); @@ -1161,46 +1232,6 @@ static bool is_id_sysreg(uint32_t reg) SYSREG_CRM(reg) < 8; } =20 -static uint32_t hvf_reg2cp_reg(uint32_t reg) -{ - return ENCODE_AA64_CP_REG((reg >> SYSREG_OP0_SHIFT) & SYSREG_OP0_MASK, - (reg >> SYSREG_OP1_SHIFT) & SYSREG_OP1_MASK, - (reg >> SYSREG_CRN_SHIFT) & SYSREG_CRN_MASK, - (reg >> SYSREG_CRM_SHIFT) & SYSREG_CRM_MASK, - (reg >> SYSREG_OP2_SHIFT) & SYSREG_OP2_MASK); -} - -static bool hvf_sysreg_read_cp(CPUState *cpu, const char *cpname, - uint32_t reg, uint64_t *val) -{ - ARMCPU *arm_cpu =3D ARM_CPU(cpu); - CPUARMState *env =3D &arm_cpu->env; - const ARMCPRegInfo *ri; - - ri =3D get_arm_cp_reginfo(arm_cpu->cp_regs, hvf_reg2cp_reg(reg)); - if (ri) { - if (!cp_access_ok(1, ri, true)) { - return false; - } - if (ri->accessfn) { - if (ri->accessfn(env, ri, true) !=3D CP_ACCESS_OK) { - return false; - } - } - if (ri->type & ARM_CP_CONST) { - *val =3D ri->resetvalue; - } else if (ri->readfn) { - *val =3D ri->readfn(env, ri); - } else { - *val =3D raw_read(env, ri); - } - trace_hvf_emu_reginfo_read(cpname, ri->name, *val); - return true; - } - - return false; -} - static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val) { ARMCPU *arm_cpu =3D ARM_CPU(cpu); @@ -1454,37 +1485,6 @@ static void pmswinc_write(CPUARMState *env, uint64_t= value) } } =20 -static bool hvf_sysreg_write_cp(CPUState *cpu, const char *cpname, - uint32_t reg, uint64_t val) -{ - ARMCPU *arm_cpu =3D ARM_CPU(cpu); - CPUARMState *env =3D &arm_cpu->env; - const ARMCPRegInfo *ri; - - ri =3D get_arm_cp_reginfo(arm_cpu->cp_regs, hvf_reg2cp_reg(reg)); - - if (ri) { - if (!cp_access_ok(1, ri, false)) { - return false; - } - if (ri->accessfn) { - if (ri->accessfn(env, ri, false) !=3D CP_ACCESS_OK) { - return false; - } - } - if (ri->writefn) { - ri->writefn(env, ri, val); - } else { - raw_write(env, ri, val); - } - - trace_hvf_emu_reginfo_write(cpname, ri->name, val); - return true; - } - - return false; -} - static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val) { ARMCPU *arm_cpu =3D ARM_CPU(cpu); --=20 2.43.0