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[81.2.115.145]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-435e10edf62sm16762185f8f.13.2026.01.29.08.09.19 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Jan 2026 08:09:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1769702960; x=1770307760; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=OFYLZeT7ofyrXtsXvZMxt3gggy8HcN1+3roFl5J8Wow=; b=tu7baT6Dl87A6ThM+/M5EKi+Yi7M7oHF6cwj6tOj6T74FSQgIKzBb+UePfIQAHhFKt cvKrwM7++NmwwyY0dZ1A7XMXGUpt7kMHtmvg32ntGu/pIyLNsNaglGhItFZ7T1esoWOR x0j8DsQ3DaU/68DCRtG5B3a3ueT2JPa3+BJv21aFTRQsVri5h0SNNQHabeBwSCJOvT+Y 04vwEvlzZZ2vuVWcUb4AbCM7GN3jstej40EJOolBTal2bAVyqP33CmHPtm5zsKABjKXw VQaobqTaNydIQDmkTxmxOAdMM54PPgB7bDYEweTZ2RXorKa+ll3+fkc2nOLN39eU/g/5 fMtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1769702960; x=1770307760; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=OFYLZeT7ofyrXtsXvZMxt3gggy8HcN1+3roFl5J8Wow=; b=tqtuiX6/2AMfmAUT59MIC8WwvP/vVK6F2BcVikcV0t7uWbCBCtEjZcnCfKzjFMYaF1 vbR2BfTDiEdsW9tRfXKE9diJVaxcpWaSKrRzJnJztGI/JoOZaf+AVESGtYIVEXIsVSzd Df+4jMQjPnQQcLy/klTSURszG5lHnylr1R8tFYlRP6bQ4fjMksk/uX1XC2jcED4LjgnJ 003vURjSErP14jDF5F5hPQ8ZNwVi76E2bGypg+m+IvOdpCnOliSRvEZwta4MzighrkPE OM7/BmeJV7s6e69dXfv28TDAceBBEJM/EcYbLgk6aUrgRUu96WuXr7L1Ax2lhMz7f8n0 Rdww== X-Gm-Message-State: AOJu0YwurirbrDK3eZBzl4JUDevYuGROM3hHbp5PX3FndkV4OCKYm0C2 zH7Q1H5ByD7POasyUoFM5Ae5QHWQmHsTtA+oYVl8BACNjfjbYYsGlJWFCSH+GO4Sw0V9Un2NVAt x0AOdIcQ= X-Gm-Gg: AZuq6aK5o1GJXEtKhN/Ur5BfXXWnLEoOz4j2YMbMXSAZBFFndhMnbtxTPu5JYXcqfZB yLVGZJOwzhyYTgwgSg75qN/+nWOmieesPe2xN+1rLHQLH7P2tzFblea9v3fzxdvQd1VIb+LwKBd v5j+Dv6Fv/ROW0gV8tvZeujSYJa4vN5m9p1zwpV1Ilors2yVDBWvRQ4Fx3H8u9ncSmIDNZbJLlW wctIWQK3nhQ62lZ8Bqgpk8ZDz39nPpeoueyU8Qkwk3Qd8zuSiwqlSsR/zVRpFMMkRWotL+SoN1l q7Es9l+AXQZ6Edbw1i7Ji+LGeQ/BPNlXPxDD6XI5SZHUAwixEvcUNKiAEGPNFA5jsVbJqwm/JXn NR8GrIm9HT//1RzNB+ohGizx+hNubC/j9v4ZnHakDhExLcSHkzxQc5yV+L/FnRuMMZYN1Eg+VaM +7D7RfUx1J1tXrFzBpCfb0SVv43MkxQw== X-Received: by 2002:a05:6000:1862:b0:435:96ec:679e with SMTP id ffacd0b85a97d-435f3a7b8d5mr192408f8f.23.1769702960256; Thu, 29 Jan 2026 08:09:20 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 01/43] backends/iommufd: Introduce iommufd_backend_alloc_viommu Date: Thu, 29 Jan 2026 16:08:35 +0000 Message-ID: <20260129160917.1415092-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260129160917.1415092-1-peter.maydell@linaro.org> References: <20260129160917.1415092-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1769703020659158500 Content-Type: text/plain; charset="utf-8" From: Nicolin Chen Add a helper to allocate a viommu object. Also introduce a struct IOMMUFDViommu that can be used later by vendor IOMMU implementations. Signed-off-by: Nicolin Chen Reviewed-by: Eric Auger Reviewed-by: Jonathan Cameron Signed-off-by: Shameer Kolothum Tested-by: Zhangfei Gao Tested-by: Eric Auger Signed-off-by: Shameer Kolothum Reviewed-by: Yi Liu Message-id: 20260126104342.253965-2-skolothumtho@nvidia.com Signed-off-by: Peter Maydell --- backends/iommufd.c | 26 ++++++++++++++++++++++++++ backends/trace-events | 1 + include/system/iommufd.h | 14 ++++++++++++++ 3 files changed, 41 insertions(+) diff --git a/backends/iommufd.c b/backends/iommufd.c index 086bd67aea..c65dc41d71 100644 --- a/backends/iommufd.c +++ b/backends/iommufd.c @@ -447,6 +447,32 @@ bool iommufd_backend_invalidate_cache(IOMMUFDBackend *= be, uint32_t id, return !ret; } =20 +bool iommufd_backend_alloc_viommu(IOMMUFDBackend *be, uint32_t dev_id, + uint32_t viommu_type, uint32_t hwpt_id, + uint32_t *out_viommu_id, Error **errp) +{ + int ret; + struct iommu_viommu_alloc alloc_viommu =3D { + .size =3D sizeof(alloc_viommu), + .type =3D viommu_type, + .dev_id =3D dev_id, + .hwpt_id =3D hwpt_id, + }; + + ret =3D ioctl(be->fd, IOMMU_VIOMMU_ALLOC, &alloc_viommu); + + trace_iommufd_backend_alloc_viommu(be->fd, dev_id, viommu_type, hwpt_i= d, + alloc_viommu.out_viommu_id, ret); + if (ret) { + error_setg_errno(errp, errno, "IOMMU_VIOMMU_ALLOC failed"); + return false; + } + + g_assert(out_viommu_id); + *out_viommu_id =3D alloc_viommu.out_viommu_id; + return true; +} + bool host_iommu_device_iommufd_attach_hwpt(HostIOMMUDeviceIOMMUFD *idev, uint32_t hwpt_id, Error **errp) { diff --git a/backends/trace-events b/backends/trace-events index e1992ba12f..1ae94c4290 100644 --- a/backends/trace-events +++ b/backends/trace-events @@ -21,3 +21,4 @@ iommufd_backend_free_id(int iommufd, uint32_t id, int ret= ) " iommufd=3D%d id=3D%d (% iommufd_backend_set_dirty(int iommufd, uint32_t hwpt_id, bool start, int r= et) " iommufd=3D%d hwpt=3D%u enable=3D%d (%d)" iommufd_backend_get_dirty_bitmap(int iommufd, uint32_t hwpt_id, uint64_t i= ova, uint64_t size, uint64_t flags, uint64_t page_size, int ret) " iommufd= =3D%d hwpt=3D%u iova=3D0x%"PRIx64" size=3D0x%"PRIx64" flags=3D0x%"PRIx64" p= age_size=3D0x%"PRIx64" (%d)" iommufd_backend_invalidate_cache(int iommufd, uint32_t id, uint32_t data_t= ype, uint32_t entry_len, uint32_t entry_num, uint32_t done_num, uint64_t da= ta_ptr, int ret) " iommufd=3D%d id=3D%u data_type=3D%u entry_len=3D%u entry= _num=3D%u done_num=3D%u data_ptr=3D0x%"PRIx64" (%d)" +iommufd_backend_alloc_viommu(int iommufd, uint32_t dev_id, uint32_t type, = uint32_t hwpt_id, uint32_t viommu_id, int ret) " iommufd=3D%d type=3D%u dev= _id=3D%u hwpt_id=3D%u viommu_id=3D%u (%d)" diff --git a/include/system/iommufd.h b/include/system/iommufd.h index 1392706b83..bc4acd1e8b 100644 --- a/include/system/iommufd.h +++ b/include/system/iommufd.h @@ -38,6 +38,16 @@ struct IOMMUFDBackend { /*< public >*/ }; =20 +/* + * Virtual IOMMU object that represents physical IOMMU's virtualization + * support + */ +typedef struct IOMMUFDViommu { + IOMMUFDBackend *iommufd; + uint32_t s2_hwpt_id; /* ID of stage 2 HWPT */ + uint32_t viommu_id; /* virtual IOMMU ID of allocated object */ +} IOMMUFDViommu; + bool iommufd_backend_connect(IOMMUFDBackend *be, Error **errp); void iommufd_backend_disconnect(IOMMUFDBackend *be); =20 @@ -59,6 +69,10 @@ bool iommufd_backend_alloc_hwpt(IOMMUFDBackend *be, uint= 32_t dev_id, uint32_t data_type, uint32_t data_len, void *data_ptr, uint32_t *out_hwpt, Error **errp); +bool iommufd_backend_alloc_viommu(IOMMUFDBackend *be, uint32_t dev_id, + uint32_t viommu_type, uint32_t hwpt_id, + uint32_t *out_hwpt, Error **errp); + bool iommufd_backend_set_dirty_tracking(IOMMUFDBackend *be, uint32_t hwpt_= id, bool start, Error **errp); bool iommufd_backend_get_dirty_bitmap(IOMMUFDBackend *be, uint32_t hwpt_id, --=20 2.43.0