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[81.2.115.145]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-435e10edf62sm16762185f8f.13.2026.01.29.08.09.40 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Jan 2026 08:09:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1769702981; x=1770307781; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=nY2Fqtl39Acb1I/wBKQSDHm7rQ3asaK1/sWbD/R/7bc=; b=sSBT605K9xObTml+iLU2QgtrTD4QTbKD7x/NwBluUSGUJJBKZDH4CVzkGV1qZ/h2Gc FSI/HHUUcKR0hiWtWLNujkjdylVVX+Njs0WqJA2TWm5ojegmLmKZ3l+eCTFzJGMdWKeX IhhZ6FIRhIK5uON6O8LRqq6x05lp7TJW1wre4B5Qk85l1oCXJLpWIl2bG/LixKAJrPRj Mbm2vYCAaIDOaRv3ns2DspNy0Bk3a8S/yaMHbWebqeCH4Xm7NZGJW8JObbYCAe9n45Jm BDmVxgpQec2SL4uy9gOrYuPPJhI9B2owSuP/INmMOpJprdLCa1D1n8ihKZdTyIItbiAv U/zg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1769702981; x=1770307781; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=nY2Fqtl39Acb1I/wBKQSDHm7rQ3asaK1/sWbD/R/7bc=; b=jVhDYizgvzGmjuYIOCmdwv+oQ20kIx+am/yUkVUHmSFZW5a+X2I6g2ss+TaISzqUQ8 pWo+I71mup7UtYeLs7/Gckc6uczgwDP3D9rEc6E1xgk+mO79nhI4PFi90NtSM2fPso0J FNI+otVKeKvoghCHKQc2W4qbbpX8WrAeiE2ZYXQ7oIcBQkXcKoooVW1XbuJjJ3iHvJd7 5BDOyFu4Bq0Neny2/A1NSg+7wp9KX6SIU4bMVUXzyXvCdng5L3Ue3i7RgBH/CBaruJFJ HwQMMTxNW7PhQsQsDRLYXvHkkXMMFSh9YZxIf4xh1AgdIZ4BUBrZ4GFFcrRmWqGCJ3j0 vpCg== X-Gm-Message-State: AOJu0YxU1BKhmXHK4+OJCfbJ8ESAD9XltVvG+QrDLUuSsrYKRTzmgeUw bFlupm4ernSOAX2mDN8oXW6e1DEH2hvyeSJRP49LRFOeK8WY+h6hzRGrWsxSuWTl/pcbFxJG7Vc 54wJPd5Y= X-Gm-Gg: AZuq6aJLrGF2JqtwcIT3dcDdMIH5ls6AyS5Qj454htF9uypttdCtakREkzGdnjDMqYf 0dm7KGscoQSoOLiSqmPxkFLDD+qQ7+wtWLHE7J+sk+oqqPusmKvYzEE8WPJY3pC13qdH5BpVj/H KEByci2G2IeL5pjraapEfrIAWbOj7B7aFifnIYDyc/7rWbTWTi0WBDIY/3b3zZNYrd9ZNtA8dJE j8Ho9lfgCfXo7j3ZEkdt3vKoEyjk3SGZT4vL0QZL6RcX3zzHFQRVRbcZlVeyx1K7xl6jSog40Xg KkEsghd7Fe4JNz649BHvRIc5g+/hTHlqWqCooCrRxFxS4lMDX4ikW0n1cSsMsnEAMjGGJjS4xCC m6tWz6yAlDF7+2g19/A6dOOMp446LD+Zipq9HV67TJvAsqKI5tZ7Tqy49voJCe7JDAKCFIj6+gc juwxFW8LaU0Ru8mhKqJxoWGpTVNwvhlQ== X-Received: by 2002:a05:6000:1786:b0:435:dd81:4f4d with SMTP id ffacd0b85a97d-435f3a7bf2fmr203159f8f.26.1769702981438; Thu, 29 Jan 2026 08:09:41 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 18/43] hw/arm/virt: Set msi-gpa property Date: Thu, 29 Jan 2026 16:08:52 +0000 Message-ID: <20260129160917.1415092-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260129160917.1415092-1-peter.maydell@linaro.org> References: <20260129160917.1415092-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1769703193624158500 Content-Type: text/plain; charset="utf-8" From: Shameer Kolothum Set the MSI doorbell GPA property for accelerated SMMUv3 devices for use by KVM MSI setup. Also, since any meaningful use of vfio-pci devices with an accelerated SMMUv3 requires both KVM and a kernel irqchip, ensure those are specified when accel=3Don is selected. Reviewed-by: Nicolin Chen Tested-by: Eric Auger Tested-by: Zhangfei Gao Reviewed-by: Jonathan Cameron Signed-off-by: Shameer Kolothum Message-id: 20260126104342.253965-19-skolothumtho@nvidia.com Signed-off-by: Peter Maydell --- hw/arm/virt.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 4badc1a734..91fec582ed 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -3061,6 +3061,26 @@ static void virt_machine_device_pre_plug_cb(HotplugH= andler *hotplug_dev, object_property_set_link(OBJECT(dev), "secure-memory", OBJECT(vms->secure_sysmem), NULL); } + if (object_property_find(OBJECT(dev), "accel") && + object_property_get_bool(OBJECT(dev), "accel", &error_abort)) { + hwaddr db_start =3D 0; + + if (!kvm_enabled() || !kvm_irqchip_in_kernel()) { + error_setg(errp, "SMMUv3 accel=3Don requires KVM with " + "kernel-irqchip=3Don support"); + return; + } + + if (vms->msi_controller =3D=3D VIRT_MSI_CTRL_ITS) { + /* GITS_TRANSLATER page + offset */ + db_start =3D base_memmap[VIRT_GIC_ITS].base + 0x10000 + 0x= 40; + } else if (vms->msi_controller =3D=3D VIRT_MSI_CTRL_GICV2M) { + /* MSI_SETSPI_NS page + offset */ + db_start =3D base_memmap[VIRT_GIC_V2M].base + 0x40; + } + object_property_set_uint(OBJECT(dev), "msi-gpa", db_start, + &error_abort); + } } } =20 --=20 2.43.0