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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-481a5cc4b99sm5046355e9.0.2026.01.29.05.33.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 29 Jan 2026 05:33:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1769693598; x=1770298398; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=D7onpzEg5oFF81Cr9JNPbzUwDH4GaGSfQFJXvSw5++8=; b=Y+G/iD/bmz2BkxzqEfcnZDCYBZzlKWez+FJaogfoPWjlKZMKTv++o1u/qUCAU2gLG1 JjP+YS+vTRrDGe6HKDdjS6ZWT7HcYF9mRrTHUs6u1ahgE2WGZPemiuN3rrODk9Bpo8OK 5GLm+4+B6rAIBjkVz9feEtGt1DJ8pFa+3rQ8ft8cWJoOML8KIPknwv5/q2LiSfibMapV 4PXNLVPrC/ev7D2zuvWHUzIMV03crAG32lnsG16ILc6ICx6AU9YpzFZxyAXN0WvgKbt0 K9CyugGZr5KYhQN6RzvyjvBj2LH5XesjRHsT8Ybxspxik9qqGNr50ZMyCabT2LWMMk7E MfsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1769693598; x=1770298398; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=D7onpzEg5oFF81Cr9JNPbzUwDH4GaGSfQFJXvSw5++8=; b=O49i1qnzN/pcVq4RG2bzqBnIrqJo+9sPmwmtjZXiO/awKwCw9m7iVnflk0FVf4u5ip DEbw/IFJrc2SIRO0g2qz1/Ox9PLpSJnzILDjDnMPz7sGgokoQs/cpoLv3zyRLJVW4lGF 2uNYZSbXI+2b09bQ06pFlMNMrrVq+AvGWAlYoVkUHK4mTyztP+3xUWSxs8OTasS3oX6I GmWbSmoERYTKJAy6+0bzyVK1TiHMO7spk3f0MxT9Zsi/PuPEpSS0a2jQfQSrO9Wim42u I04SVSiao8K9/AFqii3lnV5vUrzWkxBZTYuRtZv9I9KkhYYPdFili0vcn6gP6ETG33AX QUBQ== X-Gm-Message-State: AOJu0YxPsBJuZ8k2kgrrPVtGB7lnIuRYpy0TykUlfUG600r0qYJxV3DZ 3UqiXlOHVA7U5gHIawAq/Ro7d+tQRUKGm07OLK59g7oqcLMP5yHFuynNGioosP5XPREcRHmdLZY 6z3G8AR4= X-Gm-Gg: AZuq6aIynXXXdL6o3cOIhPxSSiueEm9OQCbOQJcENtqvbY+/OPX9Pz4tyw6KyDIFqry 8769+QIMtYXqYyCGRExCsJB1vQtftEv+8uhz7RE/dWuwUtdxPb5CxIzsM7sDs8crgEc6azdHeqC Q20pbU9OSxH+A+J80jftiSCcvbi5bMp+msPJQQYTj6LaG7DeANt9uBOW9T4DR37XdBtUrlczgmh CaB9l9fw5pXdaS/9uzqVi0qVOnHbjuYIQ66ACFOqcGKT6JAIP6S7zmybuMLzOAAsq1XjNPZ8MFi 1Plhx/0qQ7duiblCQGTtqQhfarPzINXDv9MrnI/wNLVrM8tbi6jrLEHOpgB73O981XYpqkLJv6j HAq1ISuKNNuUpRj4kVVoVGYYi166OlJ2Hyf2hV7wuFvz2iF1nBkShbfLQZhgYiScFArWiJrlPOX 0XTzopOJKBwg9CeH9Ky7hc+uHvB0rgNPBfaNVrgys9tvikg9A2viwu610BTSNF X-Received: by 2002:a05:600c:154c:b0:475:de12:d3b5 with SMTP id 5b1f17b1804b1-48069c6136fmr94888945e9.34.1769693598162; Thu, 29 Jan 2026 05:33:18 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , qemu-riscv@nongnu.org, Richard Henderson , qemu-ppc@nongnu.org, "Dr. David Alan Gilbert" Subject: [PATCH v4 5/9] monitor: Have MonitorDef::get_value() return an unsigned type Date: Thu, 29 Jan 2026 14:32:37 +0100 Message-ID: <20260129133241.35990-6-philmd@linaro.org> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260129133241.35990-1-philmd@linaro.org> References: <20260129133241.35990-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1769694208065158500 All implementations of the get_value() handler return an unsigned type: - target/i386/monitor.c monitor_get_pc() -> target_ulong eip; - target/ppc/ppc-qmp-cmds.c monitor_get_ccr() -> uint64_t ppc_get_cr(const CPUPPCState *env); monitor_get_xer() -> target_ulong cpu_read_xer(const CPUPPCState *env); monitor_get_decr() -> target_ulong cpu_ppc_load_decr(CPUPPCState *env); monitor_get_tbu() -> uint32_t cpu_ppc_load_tbu(CPUPPCState *env); monitor_get_tbl() -> uint64_t cpu_ppc_load_tbl(CPUPPCState *env); - target/sparc/monitor.c monitor_get_psr() -> target_ulong cpu_get_psr(CPUSPARCState *env1); monitor_get_reg() -> target_ulong *regwptr; Convert the MonitorDef::get_value() handler to return unsigned. Rename the MD_I32/MD_TLONG definitions mechanically doing: $ sed -i -e s/MD_I32/MD_U32/g $(git grep -lw MD_I32) $ sed -i -e s/MD_TLONG/MD_TULONG/g $(git grep -lw MD_TLONG) Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Dr. David Alan Gilbert --- include/monitor/hmp-target.h | 7 ++--- monitor/hmp-target.c | 12 ++++---- target/i386/monitor.c | 8 ++--- target/m68k/monitor.c | 60 ++++++++++++++++++------------------ target/ppc/ppc-qmp-cmds.c | 25 +++++++-------- target/sparc/monitor.c | 10 +++--- 6 files changed, 59 insertions(+), 63 deletions(-) diff --git a/include/monitor/hmp-target.h b/include/monitor/hmp-target.h index 5167d17d41d..6d6653aee6e 100644 --- a/include/monitor/hmp-target.h +++ b/include/monitor/hmp-target.h @@ -32,14 +32,13 @@ typedef struct MonitorDef MonitorDef; struct MonitorDef { const char *name; int offset; - target_long (*get_value)(Monitor *mon, const struct MonitorDef *md, - int val); + uint64_t (*get_value)(Monitor *mon, const struct MonitorDef *md, int v= al); int type; }; #endif =20 -#define MD_TLONG 0 -#define MD_I32 1 +#define MD_TULONG 0 +#define MD_U32 1 =20 const MonitorDef *target_monitor_defs(void); int target_get_monitor_def(CPUState *cs, const char *name, uint64_t *pval); diff --git a/monitor/hmp-target.c b/monitor/hmp-target.c index 420969bd6eb..1600666ee92 100644 --- a/monitor/hmp-target.c +++ b/monitor/hmp-target.c @@ -67,7 +67,6 @@ int get_monitor_def(Monitor *mon, int64_t *pval, const ch= ar *name) { const MonitorDef *md =3D target_monitor_defs(); CPUState *cs =3D mon_get_cpu(mon); - void *ptr; uint64_t tmp =3D 0; int ret; =20 @@ -81,13 +80,14 @@ int get_monitor_def(Monitor *mon, int64_t *pval, const = char *name) *pval =3D md->get_value(mon, md, md->offset); } else { CPUArchState *env =3D mon_get_cpu_env(mon); - ptr =3D (uint8_t *)env + md->offset; + void *ptr =3D (uint8_t *)env + md->offset; + switch(md->type) { - case MD_I32: - *pval =3D *(int32_t *)ptr; + case MD_U32: + *pval =3D *(uint32_t *)ptr; break; - case MD_TLONG: - *pval =3D *(target_long *)ptr; + case MD_TULONG: + *pval =3D *(target_ulong *)ptr; break; default: *pval =3D 0; diff --git a/target/i386/monitor.c b/target/i386/monitor.c index 99b32cb7b0f..427f1990399 100644 --- a/target/i386/monitor.c +++ b/target/i386/monitor.c @@ -593,8 +593,8 @@ void hmp_mce(Monitor *mon, const QDict *qdict) } } =20 -static target_long monitor_get_pc(Monitor *mon, const struct MonitorDef *m= d, - int val) +static uint64_t monitor_get_pc(Monitor *mon, const struct MonitorDef *md, + int val) { CPUArchState *env =3D mon_get_cpu_env(mon); return env->eip + env->segs[R_CS].base; @@ -602,9 +602,9 @@ static target_long monitor_get_pc(Monitor *mon, const s= truct MonitorDef *md, =20 const MonitorDef monitor_defs[] =3D { #define SEG(name, seg) \ - { name, offsetof(CPUX86State, segs[seg].selector), NULL, MD_I32 },\ + { name, offsetof(CPUX86State, segs[seg].selector), NULL, MD_U32 },\ { name ".base", offsetof(CPUX86State, segs[seg].base) },\ - { name ".limit", offsetof(CPUX86State, segs[seg].limit), NULL, MD_I32 = }, + { name ".limit", offsetof(CPUX86State, segs[seg].limit), NULL, MD_U32 = }, =20 { "eax", offsetof(CPUX86State, regs[0]) }, { "ecx", offsetof(CPUX86State, regs[1]) }, diff --git a/target/m68k/monitor.c b/target/m68k/monitor.c index 6d101c75df0..1bb5012da91 100644 --- a/target/m68k/monitor.c +++ b/target/m68k/monitor.c @@ -24,36 +24,36 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict) } =20 static const MonitorDef monitor_defs[] =3D { - { "d0", offsetof(CPUM68KState, dregs[0]), NULL, MD_I32 }, - { "d1", offsetof(CPUM68KState, dregs[1]), NULL, MD_I32 }, - { "d2", offsetof(CPUM68KState, dregs[2]), NULL, MD_I32 }, - { "d3", offsetof(CPUM68KState, dregs[3]), NULL, MD_I32 }, - { "d4", offsetof(CPUM68KState, dregs[4]), NULL, MD_I32 }, - { "d5", offsetof(CPUM68KState, dregs[5]), NULL, MD_I32 }, - { "d6", offsetof(CPUM68KState, dregs[6]), NULL, MD_I32 }, - { "d7", offsetof(CPUM68KState, dregs[7]), NULL, MD_I32 }, - { "a0", offsetof(CPUM68KState, aregs[0]), NULL, MD_I32 }, - { "a1", offsetof(CPUM68KState, aregs[1]), NULL, MD_I32 }, - { "a2", offsetof(CPUM68KState, aregs[2]), NULL, MD_I32 }, - { "a3", offsetof(CPUM68KState, aregs[3]), NULL, MD_I32 }, - { "a4", offsetof(CPUM68KState, aregs[4]), NULL, MD_I32 }, - { "a5", offsetof(CPUM68KState, aregs[5]), NULL, MD_I32 }, - { "a6", offsetof(CPUM68KState, aregs[6]), NULL, MD_I32 }, - { "a7", offsetof(CPUM68KState, aregs[7]), NULL, MD_I32 }, - { "pc", offsetof(CPUM68KState, pc), NULL, MD_I32 }, - { "sr", offsetof(CPUM68KState, sr), NULL, MD_I32 }, - { "ssp", offsetof(CPUM68KState, sp[0]), NULL, MD_I32 }, - { "usp", offsetof(CPUM68KState, sp[1]), NULL, MD_I32 }, - { "isp", offsetof(CPUM68KState, sp[2]), NULL, MD_I32 }, - { "sfc", offsetof(CPUM68KState, sfc), NULL, MD_I32 }, - { "dfc", offsetof(CPUM68KState, dfc), NULL, MD_I32 }, - { "urp", offsetof(CPUM68KState, mmu.urp), NULL, MD_I32 }, - { "srp", offsetof(CPUM68KState, mmu.srp), NULL, MD_I32 }, - { "dttr0", offsetof(CPUM68KState, mmu.ttr[M68K_DTTR0]), NULL, MD_I32 }, - { "dttr1", offsetof(CPUM68KState, mmu.ttr[M68K_DTTR1]), NULL, MD_I32 }, - { "ittr0", offsetof(CPUM68KState, mmu.ttr[M68K_ITTR0]), NULL, MD_I32 }, - { "ittr1", offsetof(CPUM68KState, mmu.ttr[M68K_ITTR1]), NULL, MD_I32 }, - { "mmusr", offsetof(CPUM68KState, mmu.mmusr), NULL, MD_I32 }, + { "d0", offsetof(CPUM68KState, dregs[0]), NULL, MD_U32 }, + { "d1", offsetof(CPUM68KState, dregs[1]), NULL, MD_U32 }, + { "d2", offsetof(CPUM68KState, dregs[2]), NULL, MD_U32 }, + { "d3", offsetof(CPUM68KState, dregs[3]), NULL, MD_U32 }, + { "d4", offsetof(CPUM68KState, dregs[4]), NULL, MD_U32 }, + { "d5", offsetof(CPUM68KState, dregs[5]), NULL, MD_U32 }, + { "d6", offsetof(CPUM68KState, dregs[6]), NULL, MD_U32 }, + { "d7", offsetof(CPUM68KState, dregs[7]), NULL, MD_U32 }, + { "a0", offsetof(CPUM68KState, aregs[0]), NULL, MD_U32 }, + { "a1", offsetof(CPUM68KState, aregs[1]), NULL, MD_U32 }, + { "a2", offsetof(CPUM68KState, aregs[2]), NULL, MD_U32 }, + { "a3", offsetof(CPUM68KState, aregs[3]), NULL, MD_U32 }, + { "a4", offsetof(CPUM68KState, aregs[4]), NULL, MD_U32 }, + { "a5", offsetof(CPUM68KState, aregs[5]), NULL, MD_U32 }, + { "a6", offsetof(CPUM68KState, aregs[6]), NULL, MD_U32 }, + { "a7", offsetof(CPUM68KState, aregs[7]), NULL, MD_U32 }, + { "pc", offsetof(CPUM68KState, pc), NULL, MD_U32 }, + { "sr", offsetof(CPUM68KState, sr), NULL, MD_U32 }, + { "ssp", offsetof(CPUM68KState, sp[0]), NULL, MD_U32 }, + { "usp", offsetof(CPUM68KState, sp[1]), NULL, MD_U32 }, + { "isp", offsetof(CPUM68KState, sp[2]), NULL, MD_U32 }, + { "sfc", offsetof(CPUM68KState, sfc), NULL, MD_U32 }, + { "dfc", offsetof(CPUM68KState, dfc), NULL, MD_U32 }, + { "urp", offsetof(CPUM68KState, mmu.urp), NULL, MD_U32 }, + { "srp", offsetof(CPUM68KState, mmu.srp), NULL, MD_U32 }, + { "dttr0", offsetof(CPUM68KState, mmu.ttr[M68K_DTTR0]), NULL, MD_U32 }, + { "dttr1", offsetof(CPUM68KState, mmu.ttr[M68K_DTTR1]), NULL, MD_U32 }, + { "ittr0", offsetof(CPUM68KState, mmu.ttr[M68K_ITTR0]), NULL, MD_U32 }, + { "ittr1", offsetof(CPUM68KState, mmu.ttr[M68K_ITTR1]), NULL, MD_U32 }, + { "mmusr", offsetof(CPUM68KState, mmu.mmusr), NULL, MD_U32 }, { NULL }, }; =20 diff --git a/target/ppc/ppc-qmp-cmds.c b/target/ppc/ppc-qmp-cmds.c index 7022564604f..07938abb15f 100644 --- a/target/ppc/ppc-qmp-cmds.c +++ b/target/ppc/ppc-qmp-cmds.c @@ -33,26 +33,23 @@ #include "cpu-models.h" #include "cpu-qom.h" =20 -static target_long monitor_get_ccr(Monitor *mon, const struct MonitorDef *= md, - int val) +static uint64_t monitor_get_ccr(Monitor *mon, const struct MonitorDef *md, + int val) { CPUArchState *env =3D mon_get_cpu_env(mon); - unsigned int u; =20 - u =3D ppc_get_cr(env); - - return u; + return ppc_get_cr(env); } =20 -static target_long monitor_get_xer(Monitor *mon, const struct MonitorDef *= md, - int val) +static uint64_t monitor_get_xer(Monitor *mon, const struct MonitorDef *md, + int val) { CPUArchState *env =3D mon_get_cpu_env(mon); return cpu_read_xer(env); } =20 -static target_long monitor_get_decr(Monitor *mon, const struct MonitorDef = *md, - int val) +static uint64_t monitor_get_decr(Monitor *mon, const struct MonitorDef *md, + int val) { CPUArchState *env =3D mon_get_cpu_env(mon); if (!env->tb_env) { @@ -61,8 +58,8 @@ static target_long monitor_get_decr(Monitor *mon, const s= truct MonitorDef *md, return cpu_ppc_load_decr(env); } =20 -static target_long monitor_get_tbu(Monitor *mon, const struct MonitorDef *= md, - int val) +static uint64_t monitor_get_tbu(Monitor *mon, const struct MonitorDef *md, + int val) { CPUArchState *env =3D mon_get_cpu_env(mon); if (!env->tb_env) { @@ -71,8 +68,8 @@ static target_long monitor_get_tbu(Monitor *mon, const st= ruct MonitorDef *md, return cpu_ppc_load_tbu(env); } =20 -static target_long monitor_get_tbl(Monitor *mon, const struct MonitorDef *= md, - int val) +static uint64_t monitor_get_tbl(Monitor *mon, const struct MonitorDef *md, + int val) { CPUArchState *env =3D mon_get_cpu_env(mon); if (!env->tb_env) { diff --git a/target/sparc/monitor.c b/target/sparc/monitor.c index 73f15aa272d..378967f8164 100644 --- a/target/sparc/monitor.c +++ b/target/sparc/monitor.c @@ -40,8 +40,8 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict) } =20 #ifndef TARGET_SPARC64 -static target_long monitor_get_psr(Monitor *mon, const struct MonitorDef *= md, - int val) +static uint64_t monitor_get_psr(Monitor *mon, const struct MonitorDef *md, + int val) { CPUArchState *env =3D mon_get_cpu_env(mon); =20 @@ -49,8 +49,8 @@ static target_long monitor_get_psr(Monitor *mon, const st= ruct MonitorDef *md, } #endif =20 -static target_long monitor_get_reg(Monitor *mon, const struct MonitorDef *= md, - int val) +static uint64_t monitor_get_reg(Monitor *mon, const struct MonitorDef *md, + int val) { CPUArchState *env =3D mon_get_cpu_env(mon); return env->regwptr[val]; @@ -154,7 +154,7 @@ const MonitorDef monitor_defs[] =3D { { "otherwin", offsetof(CPUSPARCState, otherwin) }, { "wstate", offsetof(CPUSPARCState, wstate) }, { "cleanwin", offsetof(CPUSPARCState, cleanwin) }, - { "fprs", offsetof(CPUSPARCState, fprs), NULL, MD_I32 }, + { "fprs", offsetof(CPUSPARCState, fprs), NULL, MD_U32 }, #endif { NULL }, }; --=20 2.52.0