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charset="utf-8" Misc changes needed for HVF vGIC enablement. Note: x86_64 macOS exposes interrupt controller virtualisation since macOS = 12. Keeping an #ifdef here in case we end up supporting that... However, given that x86_64 macOS is on its way out, it'll probably (?) not = be supported in Qemu. Signed-off-by: Mohamed Mediouni --- accel/hvf/hvf-all.c | 50 ++++++++++++++++++++++++++++++++++++++ accel/stubs/hvf-stub.c | 1 + hw/arm/virt.c | 24 +++++++++++++++--- hw/intc/arm_gicv3_common.c | 3 +++ include/system/hvf.h | 3 +++ system/vl.c | 2 ++ 6 files changed, 79 insertions(+), 4 deletions(-) diff --git a/accel/hvf/hvf-all.c b/accel/hvf/hvf-all.c index 033c677b6f..929f53fd37 100644 --- a/accel/hvf/hvf-all.c +++ b/accel/hvf/hvf-all.c @@ -10,6 +10,8 @@ =20 #include "qemu/osdep.h" #include "qemu/error-report.h" +#include "qapi/error.h" +#include "qapi/qapi-visit-common.h" #include "accel/accel-ops.h" #include "exec/cpu-common.h" #include "system/address-spaces.h" @@ -22,6 +24,7 @@ #include "trace.h" =20 bool hvf_allowed; +bool hvf_kernel_irqchip; =20 const char *hvf_return_string(hv_return_t ret) { @@ -217,6 +220,43 @@ static int hvf_gdbstub_sstep_flags(AccelState *as) return SSTEP_ENABLE | SSTEP_NOIRQ; } =20 +static void hvf_set_kernel_irqchip(Object *obj, Visitor *v, + const char *name, void *opaque, + Error **errp) +{ + OnOffSplit mode; + if (!visit_type_OnOffSplit(v, name, &mode, errp)) { + return; + } + + switch (mode) { + case ON_OFF_SPLIT_ON: +#ifdef HOST_X86_64 + /* macOS 12 onwards exposes an HVF virtual APIC. */ + error_setg(errp, "HVF: kernel irqchip is not currently implemented= for x86."); + break; +#else + hvf_kernel_irqchip =3D true; + break; +#endif + + case ON_OFF_SPLIT_OFF: + hvf_kernel_irqchip =3D false; + break; + + case ON_OFF_SPLIT_SPLIT: + error_setg(errp, "HVF: split irqchip is not supported on HVF."); + break; + + default: + /* + * The value was checked in visit_type_OnOffSplit() above. If + * we get here, then something is wrong in QEMU. + */ + abort(); + } +} + static void hvf_accel_class_init(ObjectClass *oc, const void *data) { AccelClass *ac =3D ACCEL_CLASS(oc); @@ -224,6 +264,16 @@ static void hvf_accel_class_init(ObjectClass *oc, cons= t void *data) ac->init_machine =3D hvf_accel_init; ac->allowed =3D &hvf_allowed; ac->gdbstub_supported_sstep_flags =3D hvf_gdbstub_sstep_flags; +#ifdef HOST_X86_64 + hvf_kernel_irqchip =3D false; +#else + hvf_kernel_irqchip =3D true; +#endif + object_class_property_add(oc, "kernel-irqchip", "on|off|split", + NULL, hvf_set_kernel_irqchip, + NULL, NULL); + object_class_property_set_description(oc, "kernel-irqchip", + "Configure HVF irqchip"); } =20 static const TypeInfo hvf_accel_type =3D { diff --git a/accel/stubs/hvf-stub.c b/accel/stubs/hvf-stub.c index 42eadc5ca9..6bd08759ba 100644 --- a/accel/stubs/hvf-stub.c +++ b/accel/stubs/hvf-stub.c @@ -10,3 +10,4 @@ #include "system/hvf.h" =20 bool hvf_allowed; +bool hvf_kernel_irqchip; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index fd9a3ed480..d82fe10934 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -838,7 +838,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) * interrupts; there are always 32 of the former (mandated by GIC spec= ). */ qdev_prop_set_uint32(vms->gic, "num-irq", NUM_IRQS + 32); - if (!kvm_irqchip_in_kernel()) { + if (!kvm_irqchip_in_kernel() && !hvf_irqchip_in_kernel()) { qdev_prop_set_bit(vms->gic, "has-security-extensions", vms->secure= ); } =20 @@ -861,7 +861,8 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) qdev_prop_set_array(vms->gic, "redist-region-count", redist_region_count); =20 - if (!kvm_irqchip_in_kernel()) { + if (!kvm_irqchip_in_kernel() && + !(hvf_enabled() && hvf_irqchip_in_kernel())) { if (vms->tcg_its) { object_property_set_link(OBJECT(vms->gic), "sysmem", OBJECT(mem), &error_fatal); @@ -872,7 +873,7 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) ARCH_GIC_MAINT_IRQ); } } else { - if (!kvm_irqchip_in_kernel()) { + if (!kvm_irqchip_in_kernel() && !hvf_irqchip_in_kernel()) { qdev_prop_set_bit(vms->gic, "has-virtualization-extensions", vms->virt); } @@ -2114,7 +2115,15 @@ static void finalize_gic_version(VirtMachineState *v= ms) accel_name =3D "KVM with kernel-irqchip=3Doff"; } else if (whpx_enabled()) { gics_supported |=3D VIRT_GIC_VERSION_3_MASK; - } else if (tcg_enabled() || hvf_enabled() || qtest_enabled()) { + } else if (hvf_enabled()) { + if (!hvf_irqchip_in_kernel()) { + gics_supported |=3D VIRT_GIC_VERSION_2_MASK; + } + /* Hypervisor.framework doesn't expose EL2<->1 transition notifier= s */ + if (!(!hvf_irqchip_in_kernel() && vms->virt)) { + gics_supported |=3D VIRT_GIC_VERSION_3_MASK; + } + } else if (tcg_enabled() || qtest_enabled()) { gics_supported |=3D VIRT_GIC_VERSION_2_MASK; if (module_object_class_by_name("arm-gicv3")) { gics_supported |=3D VIRT_GIC_VERSION_3_MASK; @@ -2150,6 +2159,9 @@ static void finalize_msi_controller(VirtMachineState = *vms) if (whpx_enabled() && whpx_irqchip_in_kernel()) { vms->msi_controller =3D VIRT_MSI_CTRL_GICV2M; } + if (hvf_enabled() && hvf_irqchip_in_kernel()) { + vms->msi_controller =3D VIRT_MSI_CTRL_GICV2M; + } if (vms->gic_version =3D=3D VIRT_GIC_VERSION_2) { vms->msi_controller =3D VIRT_MSI_CTRL_GICV2M; } @@ -2168,6 +2180,10 @@ static void finalize_msi_controller(VirtMachineState= *vms) error_report("ITS not supported on WHPX."); exit(1); } + if (hvf_enabled() && hvf_irqchip_in_kernel()) { + error_report("ITS not supported on HVF when using the hardware= vGIC."); + exit(1); + } } =20 assert(vms->msi_controller !=3D VIRT_MSI_CTRL_AUTO); diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 9054143ea7..d98f95be00 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -33,6 +33,7 @@ #include "hw/arm/linux-boot-if.h" #include "system/kvm.h" #include "system/whpx.h" +#include "system/hvf.h" =20 =20 static void gicv3_gicd_no_migration_shift_bug_post_load(GICv3State *cs) @@ -666,6 +667,8 @@ const char *gicv3_class_name(void) return "kvm-arm-gicv3"; } else if (whpx_enabled()) { return TYPE_WHPX_GICV3; + } else if (hvf_enabled() && hvf_irqchip_in_kernel()) { + return TYPE_HVF_GICV3; } else { if (kvm_enabled()) { error_report("Userspace GICv3 is not supported with KVM"); diff --git a/include/system/hvf.h b/include/system/hvf.h index d3dcf088b3..dc8da85979 100644 --- a/include/system/hvf.h +++ b/include/system/hvf.h @@ -26,8 +26,11 @@ #ifdef CONFIG_HVF_IS_POSSIBLE extern bool hvf_allowed; #define hvf_enabled() (hvf_allowed) +extern bool hvf_kernel_irqchip; +#define hvf_irqchip_in_kernel() (hvf_kernel_irqchip) #else /* !CONFIG_HVF_IS_POSSIBLE */ #define hvf_enabled() 0 +#define hvf_irqchip_in_kernel() 0 #endif /* !CONFIG_HVF_IS_POSSIBLE */ =20 #define TYPE_HVF_ACCEL ACCEL_CLASS_NAME("hvf") diff --git a/system/vl.c b/system/vl.c index aa9a155041..d3f311eff8 100644 --- a/system/vl.c +++ b/system/vl.c @@ -1778,6 +1778,8 @@ static void qemu_apply_legacy_machine_options(QDict *= qdict) false); object_register_sugar_prop(ACCEL_CLASS_NAME("whpx"), "kernel-irqch= ip", value, false); + object_register_sugar_prop(ACCEL_CLASS_NAME("hvf"), "kernel-irqchi= p", value, + false); qdict_del(qdict, "kernel-irqchip"); } =20 --=20 2.50.1 (Apple Git-155)