From nobody Mon Feb 9 01:34:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1769538597; cv=none; d=zohomail.com; s=zohoarc; b=UQ8DFRv4NcS2gIgyL9K3zhx1hZoIVVgf8ZnEwcvAmPglNtcRfZLvtiPqTXaqqCxPwxjCWfrHAqlLEjJu+Dzn0aPIbc4vrGpQILvj54bOmOjnZ2b+x1qnGoiN0BlZcUnD2D0V4Jhvo/RWE44UQmQGj0D4i9DHXHnyaqR236dx/6s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769538597; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=SWoKAzpGYO4A5Cj1tO6xJq2URNGyAg2S13AomBdIRUg=; b=i5/UZWphj7jH+or9PFTmKE0b+IPMIrOjca8p2GL7P0+cF21aZMbSDuD4+UbqxSzDe45A9ZV4B51KBx5E5oonPDeu6ssJd12+b1zCBS1ANFoFfK9Us0fgORll9qPmlrqeMmEGZ52/P5mFya/5MMMjODudgi97XZ3VPO+JyHO6gDw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769538596999753.2242682603572; Tue, 27 Jan 2026 10:29:56 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vknov-0002OF-OD; Tue, 27 Jan 2026 13:29:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknnc-0001P3-7u for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:28:26 -0500 Received: from p-west2-cluster2-host8-snip4-6.eps.apple.com ([57.103.68.137] helo=outbound.mr.icloud.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknna-0003O3-1H for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:28:23 -0500 Received: from outbound.mr.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPS id EB38F180010B; Tue, 27 Jan 2026 18:28:17 +0000 (UTC) Received: from localhost.localdomain (unknown [17.57.152.38]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPSA id 264A11800126; Tue, 27 Jan 2026 18:28:12 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; t=1769538499; x=1772130499; bh=SWoKAzpGYO4A5Cj1tO6xJq2URNGyAg2S13AomBdIRUg=; h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme; b=aGjpD2QTSTUp8UFwIGqwm2xBGpxCskWc2fkdeYG+NW96LsHOKx9edzEF072Nd+Q4rGk6Nqpk763d+MCpWASDECXlaIXpER1P7hnUuNchDtBhjtOb3hl9zO7fOXwvzAi5EdbqAevvFSOzfjQYOTdM3VDW0mojl0+l7zgWCtBbQe/6yPxnOSUscP4UtYRL68eITcTNxk+0iZJ5BrBSuOLXzEtA6gsDgetmffyzf1w7J9x4hd/cozguJDcXGzB1ILrXw+7PM2nLrqQ2gp1CfxFoU2lGBDxOd5z8idQGkafKZYDC4i7tItsxF0WQN7iat7IWK2y0pNiHhXigxEf/cxDPLA== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org, mohamed@unpredictable.fr Cc: Zhao Liu , "Michael S. Tsirkin" , Roman Bolshakov , qemu-arm@nongnu.org, Ani Sinha , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Akihiko Odaki , Marcel Apfelbaum , Pedro Barbuda , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Shannon Zhao , Igor Mammedov , Cameron Esfahani , Alexander Graf , Peter Maydell , Eduardo Habkost , Phil Dennis-Jordan , Sebastian Ott , Pierrick Bouvier Subject: [PATCH v18 01/22] target/arm/kvm: add constants for new PSCI versions Date: Tue, 27 Jan 2026 19:27:41 +0100 Message-ID: <20260127182805.73212-2-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260127182805.73212-1-mohamed@unpredictable.fr> References: <20260127182805.73212-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDE1MCBTYWx0ZWRfX1Xd/wtBk79mG A5V9No8VON2RC6XnVLnMI0hoo6hPckfB2OAdgW4KguJJCTurA46zzYVzneljjr1PM16nTpvscmg zVjhhIOZCY4XzSXGP2HsExDep0Lga8S7oolIOQ6bKSRJHNn2GhnhPUZgaK+xP/Y9n/JcXda2Z7u XvDNaKsbvMFDIeS3TSdh24uPX9dG+FeMbD7XUfVVI3bUSteIO8gFbdtcbiYKHtr1pV+XgiOBW+k z+uz217wbVa4oaS2o5FTzCASoHAAWVGHYyka7GosFLX7SBq0q31kvNwEO6+YdO2qReh2c+A3aH9 CjsNEIiylIymmF8Zl3FZ+2DMa5vJA+7jmLJ3v0uu6TJcmmKMv9RPMsudrajMnc= X-Authority-Info-Out: v=2.4 cv=G6sR0tk5 c=1 sm=1 tr=0 ts=697903c3 cx=c_apl:c_apl_out:c_pps a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=20KFwNOVAAAA:8 a=KKAkSRfTAAAA:8 a=xyHcjBD2kxMnvwf2DskA:9 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: viGJ8bdwXqAytzZWnAkUcJmu0e10HfS2 X-Proofpoint-GUID: viGJ8bdwXqAytzZWnAkUcJmu0e10HfS2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_04,2026-01-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 phishscore=0 mlxlogscore=999 malwarescore=0 clxscore=1030 suspectscore=0 spamscore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 mlxscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601270150 X-JNJ: AAAAAAABrufv8wHFjZfanQbrRsq+F7g/VhHflfTNL4KDp9o1nwvmxAi1ofnIgt99X60lfXT5pPHOD9tQGVo683tBM2NAru3EAmDTPexpAAawHzAhZIhnGDu2iZePkt0uJI/9pTgHns5xt9UvAVrFMTFbG5IXoR24VaEPPb3h8znkq6+qAFz2qoaoUcwvOjSiAbr4TIWZMTAbQAs5TLb6jffEl9VEIthDEvAKAgTh21vTdMQmWfJ+2e5QQ2wF/M2q9H1g/tC3OXkwR4rZe/y5/YTWJfv3PgB20gpvLZTiQYNqUUmCEtcxY/dHZk020WrjmFhRLdJegw/HYEEcjTefgAxdnqW5stL6aHF1BhtaDb2E5LyUOz+uxR+4+6FlvdyR+s2vMhwyb2i7gEDXbCBp05y9YdFEVU9FO26trt35rughySVogoPb7cI5czqOvX4tGMpCYP739CmYOFfQ2bXbQIpM4gzt3sxjbJu8VmSHfhBMIx8LqYWsHPo9Cv6AZv9sp4uQyzL4KcpAG6XWuBvX5o9sqRYHiNj+MwQNmZG/jXLZ9Oe3stsNVC1NRvnsTrKrLNOC3i7g2uNbVXuW8vAGSbuMWvMamBCk069wChkYxWZwjxPDWiO2ZVs3sm02T0C4hxnboZp8knv2HaG9m2O3n2Q71SPmod3jYFM00oNVo6a0B88FSZiNz5b+wG5TIZzhWrrkJvXN6mjWf6WQHORVbNN34hR8/VYxa39Qf15pOr+c2vyXgmkpQyo21Hihm+6dlOt3refXaHa4Ali+4Q4ssO37+aI+ke3AimTIPEmEVwBb+1KP/AstpAaSlD0zUIvTbWS9XoAKnOveJwQQf9RYjFqDv2aE4BYUTS/6P0R6fiYfBYcEK3/7CVa1pEzwfwpPJGlNEd4OPx3qnlYR/spKw3wnFpiIT34I/5uYs5gts4Pd0REwYNsxbmrLrpZ2 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.68.137; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769538601709158500 Content-Type: text/plain; charset="utf-8" From: Sebastian Ott Add constants for PSCI version 1_2 and 1_3. Signed-off-by: Sebastian Ott Reviewed-by: Pierrick Bouvier Reviewed-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/kvm-consts.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/arm/kvm-consts.h b/target/arm/kvm-consts.h index 54ae5da7ce..9fba3e886d 100644 --- a/target/arm/kvm-consts.h +++ b/target/arm/kvm-consts.h @@ -97,6 +97,8 @@ MISMATCH_CHECK(QEMU_PSCI_1_0_FN_PSCI_FEATURES, PSCI_1_0_F= N_PSCI_FEATURES); #define QEMU_PSCI_VERSION_0_2 0x00002 #define QEMU_PSCI_VERSION_1_0 0x10000 #define QEMU_PSCI_VERSION_1_1 0x10001 +#define QEMU_PSCI_VERSION_1_2 0x10002 +#define QEMU_PSCI_VERSION_1_3 0x10003 =20 MISMATCH_CHECK(QEMU_PSCI_0_2_RET_TOS_MIGRATION_NOT_REQUIRED, PSCI_0_2_TOS_= MP); /* We don't bother to check every possible version value */ --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1769538622; cv=none; d=zohomail.com; s=zohoarc; b=Z4CWUif7a1+h+EFlVf+aWa5uZSFEX0RnrlnEKMtLK7zGY7SFe9aoNiA1aZC6N3NYqlezLWfFKtq4ZU/NWsWn7SPlHf9M27jeYHNcpDxSpBeVJqBeWI2hjOlBT/xXtphRrdj4XmmaO/+6xkLW/n949BQYxpmu9EjjQIBsdXhB0Ds= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769538622; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=rqevPYI5PNmYfO37aWp6zQDTk/Z3PG7nW7DuJwvRyUM=; b=l3lDE+rSghdG9/3CKpcBh4bsna1WcMRk+47TrvOxOVcHAa/Q/ZA+EQ8PYLBPhHv7tilXswbo5FiXJew2QIxVQap3qmGbDwYQIfMoD/13Aox1ESEcdjOzB3FIfFmU1j1K65uowzgCvcG7EZHZqJQg6uCic9w9pU80q62IZQiyBZ0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769538621621382.0119696526948; Tue, 27 Jan 2026 10:30:21 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vknp1-00031r-El; Tue, 27 Jan 2026 13:29:51 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknnf-0001Q7-TQ for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:28:29 -0500 Received: from p-west2-cluster5-host12-snip4-4.eps.apple.com ([57.103.71.17] helo=outbound.mr.icloud.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknnd-0003PD-Dk for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:28:27 -0500 Received: from outbound.mr.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPS id 7C82118000A0; Tue, 27 Jan 2026 18:28:22 +0000 (UTC) Received: from localhost.localdomain (unknown [17.57.152.38]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPSA id E2E561800104; Tue, 27 Jan 2026 18:28:17 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; t=1769538504; x=1772130504; bh=rqevPYI5PNmYfO37aWp6zQDTk/Z3PG7nW7DuJwvRyUM=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type:x-icloud-hme; b=HqKrL98rMh83K0fkJGFhcSoXQgOdGl4GiCOv65gQHwO3u4SytyE6hvS8EphVkPfb/9zeHp7WiI1YSQv+MY08FQPTapbJVJv40MToCZG/MyP3wXGU4WG8RWF5i+1KI5sq65nW6Nlb3xAW/ZiKphwhyshllN1G/Ys4SGSlIjbNqkBU/e1aHcnr0SPaERavYx77qSiY6iCvTi9GViabiYpfO8xLtnKChgG3++8sfYa0Z9nqvBSleqHqvop3FE7vxUrHYw00zjx4slNGMRh3jbAJYjZNZjaMfr38jNGzPFKsQ/zNY3KQpwXN6IOFehIgvWM0FN8UOwiwJx/W01xIVcbBvg== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org, mohamed@unpredictable.fr Cc: Zhao Liu , "Michael S. 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Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier Reviewed-by: Akihiko Odaki --- include/system/hw_accel.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/include/system/hw_accel.h b/include/system/hw_accel.h index 55497edc29..628a50e066 100644 --- a/include/system/hw_accel.h +++ b/include/system/hw_accel.h @@ -40,4 +40,17 @@ void cpu_synchronize_pre_loadvm(CPUState *cpu); void cpu_synchronize_post_reset(CPUState *cpu); void cpu_synchronize_post_init(CPUState *cpu); =20 +/** + * hwaccel_enabled: + * + * Returns: %true if a hardware accelerator is enabled, %false otherwise. + */ +static inline bool hwaccel_enabled(void) +{ + return hvf_enabled() + || kvm_enabled() + || nvmm_enabled() + || whpx_enabled(); +} + #endif /* QEMU_HW_ACCEL_H */ --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1769538849; cv=none; d=zohomail.com; s=zohoarc; b=ezHWH3JhwBmSoo/95h2EE/L5LzoC0H8IHozAJltbyfchhjta+LjwKjWcIcdRWscM2ZbNtPgKcVEO3hG78XvkxpM78pzNKWle0yKmMkPPEntNCNUoGrwcVxeV/f9kLnIyeaUNWzoVWMpb1ozV9V5zQ82tNKSH1xEUvNi01xOGBHM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769538849; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ChIhwcPMGVA7/ZQSbYVEEiNk2wqKK9/9DHnWEjCY41s=; b=XZaJxc8sYBmjTlOPQcuiP+GhZr/cKKCJdy+YXt/ZHBhZhBH1DUjdRguzdTwFURQ/Eh34ITari6erJQ5uFQVbSxrSHoVVLcMzj0Q6PaVqzBVWFr8I25OlvxBqXDJcypMlYYnRnuUjfy4xr8ZMk1oGjmqNs5Oam+RyPGgs0CvrIEw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769538849172788.7852388264834; Tue, 27 Jan 2026 10:34:09 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vknph-0005uJ-Ku; Tue, 27 Jan 2026 13:30:35 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknnn-0001ed-K5 for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:28:39 -0500 Received: from p-west2-cluster5-host4-snip4-2.eps.apple.com ([57.103.71.95] helo=outbound.mr.icloud.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknni-0003QI-6p for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:28:34 -0500 Received: from outbound.mr.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPS id 3AED1180024A; Tue, 27 Jan 2026 18:28:27 +0000 (UTC) Received: from localhost.localdomain (unknown [17.57.152.38]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPSA id 8052218000A8; Tue, 27 Jan 2026 18:28:22 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; t=1769538509; x=1772130509; bh=ChIhwcPMGVA7/ZQSbYVEEiNk2wqKK9/9DHnWEjCY41s=; h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme; b=DSNjKsMnBHvRt4TlcfkZW58ZnZjFPOHoVQYEh5BhBTEeVP8XBj0e8ye81o9alynAVNmLwWD1hmBh/vcnK/A1tHpGljF3kCGY96Gjw1FGoDTVlmPSmtKdIBUAPTfFssiwVGBdlEmypAzzIjsGWwyzbBJVrqHxxmOLYh6Hyzj2DQAkel+239b63NHjP/ckZxYH17aYywidEEjx3lYsXUXDqgbHGcm9lsOKHXaplCgP3pwkVbVTTFYDzcRaDnO56CBYKPKk60sxO7ZhXdiZadoyfsAPK4t7LOVh6MtjD4hP9goDtkyj8kMS3MTgFLlP3830WwwCaJ0OCi/I5McUEFvKHQ== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org, mohamed@unpredictable.fr Cc: Zhao Liu , "Michael S. Tsirkin" , Roman Bolshakov , qemu-arm@nongnu.org, Ani Sinha , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Akihiko Odaki , Marcel Apfelbaum , Pedro Barbuda , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Shannon Zhao , Igor Mammedov , Cameron Esfahani , Alexander Graf , Peter Maydell , Eduardo Habkost , Phil Dennis-Jordan Subject: [PATCH v18 03/22] qtest: hw/arm: virt: skip ACPI test for IORT with GICv2 Date: Tue, 27 Jan 2026 19:27:43 +0100 Message-ID: <20260127182805.73212-4-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260127182805.73212-1-mohamed@unpredictable.fr> References: <20260127182805.73212-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDE1MCBTYWx0ZWRfX/nKayxB+y3zt M46RntRu2wo9mG/G+VOqMJmBYNXRtlzMjSjBm5fGLL9d9PIAVDgetR/kMzGbTzWRGUYrkepQPWR 3WnskrbEvfcJxHCwjJjQmASVpDL1CfI6Xleuy0dj9+wGnhONvrWWIiAlKHCo7SEEGWi9W3/82oP sHYxYWMMJHGUhSajHCK77UyQVS69T3RyIiN82YbQ1s6z7VlVpT8lV+P0kDEs5U3EzFHOxpg6XMH dmAkduonngn+fyS61RqZz2z54MjU/lrhLU/h+WCLRu+22mlQ+YzyX4OjRjfzi8IxjyQcHfS24Sx jlj9nEzpvAntkcEzwFxVYgMSgzmg7tOTiIPWTQjT//My3YgYrku7WqoMguZpWA= X-Proofpoint-ORIG-GUID: 6vtEGzJoN7ZtNxf1ug6e4bJMNCN5nxmK X-Authority-Info-Out: v=2.4 cv=a+I9NESF c=1 sm=1 tr=0 ts=697903cc cx=c_apl:c_apl_out:c_pps a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=3bhNkNL8zgIfWImNCT0A:9 X-Proofpoint-GUID: 6vtEGzJoN7ZtNxf1ug6e4bJMNCN5nxmK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_04,2026-01-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 lowpriorityscore=0 mlxscore=0 mlxlogscore=999 clxscore=1030 bulkscore=0 spamscore=0 adultscore=0 malwarescore=0 phishscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601270150 X-JNJ: AAAAAAABewu9/wLAAh8kuZTOGG7ecHFvbOH/1oStMCERbL3Qu9RfstlUXDemWwgPs0otiV93J3wBTqb9cJvz5yX8ObQq0kLX/ZQw7cLJaVfuT45ubw4lATmutkW6BAAu1PPnTdA9wls9W632u9zKXHw+DDVBulS76FxTIWhpDqXZL7EY+0r2Y01ShWKGOvE15AwCWRJ70B1Ar2FH8pxNJ2lYnHCP+mtEKR4gN5HKZQ0lXaY45traAmMN9Za01aDXDuV/p9kCSN26g2RaGbITSTtUeiFZ/iuP8LsUSN87tUDAAXcJBqFk4adG4R3qgNmPuJOuIYTAIGsZn0+pvc4uEvZaO/+hUQhnAw42G4vMA2SpyuOJkKWC6th+TFS4ozeezDAGEUBZipEFyeBe9zkvbBY2KfumIXNJZ5NsDLSZCn1iFUoOh592JrVmOvj51JLamQ0QvgXV5pULgENJRRt2FNw/99tPeROYU5JMx2HOfunHRhG7TPgzt5OZSz0wlV7+Dy6BgNC60RBfTEY/DlAqxZ9THUbL3n7R5ZB6F4A2ZI6gn237VRC1WA8S79kln5hOb8F6Jge/RP1qhbSXuxm6RRbwz/Of+9wAK4IFUiTe0yZnfjBk1mV0Dgdykq8hs/C9f8HNJp6nWDu4FYcIEDYMxlyb66WP4GM/CLETL/sf+rPxnP297PvP4VsZyryLNDjVUoEGFNyfibA5iufkjR0o1nVBJYcgMdwPpc3j51yesckkUGvtGH+VR+0RHOZCeQLVDnuYjrhjwZsNcgKjQz4jeGdNtYMmLGPUkuf+Y2aybBTJw78MKhDV1fJob7Va2ds1amhy080NZZMeUf1Hiic/c7wLccH0ZZf7dTYs+yhKtubjEyGj8akU8Lieac0dtLO8cDt2iR37yDEKRQoMx9yoEAQxxoPp7wHPSXu0Ra5XZH3mjTKGUKGoJOJ2KlyPiOhcUoS3YUUC Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.71.95; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769538852556158500 Content-Type: text/plain; charset="utf-8" Signed-off-by: Mohamed Mediouni --- tests/qtest/bios-tables-test-allowed-diff.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios= -tables-test-allowed-diff.h index dfb8523c8b..7acaf464dd 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,4 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/aarch64/virt/IORT", +"tests/data/acpi/aarch64/virt/IORT.smmuv3-dev", +"tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy", --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Tsirkin" , Roman Bolshakov , qemu-arm@nongnu.org, Ani Sinha , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Akihiko Odaki , Marcel Apfelbaum , Pedro Barbuda , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Shannon Zhao , Igor Mammedov , Cameron Esfahani , Alexander Graf , Peter Maydell , Eduardo Habkost , Phil Dennis-Jordan Subject: [PATCH v18 04/22] hw: arm: virt: rework MSI-X configuration Date: Tue, 27 Jan 2026 19:27:44 +0100 Message-ID: <20260127182805.73212-5-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260127182805.73212-1-mohamed@unpredictable.fr> References: <20260127182805.73212-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: u5NV0GV9FvmOVeFF2LQIw4QK53u0QnUa X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDE1MCBTYWx0ZWRfXzB3YcezwbAld fRbMlJLDZXQ/BZ/f7fER/fT87glQVupDklF7uw5tDvkvLXDXbon/+6yqYAfVeTRwH6Ovg4osNms HnpvFUvwsilvlSM+pkImt8XlNwn2DtBIP+akvm7pe9jd8BRJrFRQ649NdWTlJuSqfD1X+sdQS6A IM7bhLNf6nt9RDlxx6GZuztNY3ZMKHhGnScvcWfrALffei20Ul67DX1dj9ek9tYYqDRAY6LY6kf pQ/EV7bcNb3+e3c84pprXUWQ/lxNGGiWP8baQVvBg8IDYo3JOuAHoe/rzB/LAqjyOYvxEbIf+4T dOSh3cdLXn0dxahjoUDTDwkjfCe48/D/xhaAsxNOeyoionf3upH2nQ+P3Z4MKE= X-Authority-Info-Out: v=2.4 cv=ZeUQ98VA c=1 sm=1 tr=0 ts=697903d0 cx=c_apl:c_apl_out:c_pps a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VD-kO_21I_MDUkMFtFkA:9 X-Proofpoint-GUID: u5NV0GV9FvmOVeFF2LQIw4QK53u0QnUa X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_04,2026-01-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 phishscore=0 spamscore=0 mlxlogscore=999 clxscore=1030 mlxscore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 malwarescore=0 suspectscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601270150 X-JNJ: AAAAAAAB4P70EILiCkv1yARKv4O7u8pA0DlY+j6rbVjdaoby5UpDwajoJeSsONRRnfath9Pu9UcoDe1P4SJorIA8/KKgxkhAWXKDJ+d74zyWRtYOvjSl6Uu92Kk6ih0B4KQJJjN6MHLXSj6sZSFsypc4Q0v+zv8awhGnk9DPQxAQcxyM5Fbc6ow3cvhYsrs901uuaOR10o8IOjj8CG1mguSanSbc9BSy02lgZp9WHkbnSTMx+GBak3//9TS94XinUY/z/lpNcuyxr4HRDvGbnEyGuHqqiZyHQrmgCOj1D32/gQaSrl9UGPeFXhn0ZrNDMBsc4XOyukd9khDvZzj45nKTv985sbiSVC854EQ3S+7I/DgUNHEYgUBza4ScgbnuDebZ4AMwZCc+YLz64upwdg7vR0LYmRC5iwcwf4QcLGc9WT0USGLUZ6+uiVB4nCIIudpB6jSJdD/A8GYOlMD6xVEb3fWcbS5elROyatLPb7oQzyBcB8BOhIBqE2wSF4lB/vLyz1w1Qd8CHAHn5crFizUOhc5laspJsIRV+zboXH7IJOR1aIXQK5+4pW7l5TPVw7piYUVn1y1X9z6bfxXaK4PjhrlifyfVgzrYfmx9fOWbN3JWkAgaBhKtP0sajH7yaW9hdLJUTO/eDKyJeY+m7gvtHa8ugUpws9fTLGzzrBFPuiOiUuv/kC1h+SwhXeCx4lzzsOhJAmXGoPX9EDUTUrHIdTgeifK6BxKFC2pgrr11QLfSk4pPb/VSEFiaJ9T5rXHO7sgOE4jNkfpjNq6pN/8V2yKmx5o2h0iPVIFI3XWuae3Ws8VIg2qxMWTjkcgA2u+wa803zzDEVjG4IMyFxEaQmlvWqACmfPQodcs12cmCnnOEPpR8TDbJvYz5tobNWEbf+Uqd8gmQp6PpbLNrsjd5RIzLiaw= Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.71.92; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769538964392158500 Content-Type: text/plain; charset="utf-8" Introduce a -M msi=3D argument to be able to control MSI-X support independ= ently from ITS, as part of supporting GICv3 + GICv2m platforms. Remove vms->its as it's no longer needed after that change. Signed-off-by: Mohamed Mediouni --- hw/arm/virt-acpi-build.c | 20 ++++--- hw/arm/virt.c | 112 ++++++++++++++++++++++++++++++++++++--- include/hw/arm/virt.h | 5 +- 3 files changed, 121 insertions(+), 16 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 03b4342574..f87bf1bf2f 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -473,7 +473,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) nb_nodes =3D num_smmus + 1; /* RC and SMMUv3 */ rc_mapping_count =3D rc_smmu_idmaps_len; =20 - if (vms->its) { + if (vms->msi_controller =3D=3D VIRT_MSI_CTRL_ITS) { /* * Knowing the ID ranges from the RC to the SMMU, it's possibl= e to * determine the ID ranges from RC that go directly to ITS. @@ -484,7 +484,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) rc_mapping_count +=3D rc_its_idmaps->len; } } else { - if (vms->its) { + if (vms->msi_controller =3D=3D VIRT_MSI_CTRL_ITS) { nb_nodes =3D 2; /* RC and ITS */ rc_mapping_count =3D 1; /* Direct map to ITS */ } else { @@ -499,7 +499,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) build_append_int_noprefix(table_data, IORT_NODE_OFFSET, 4); build_append_int_noprefix(table_data, 0, 4); /* Reserved */ =20 - if (vms->its) { + if (vms->msi_controller =3D=3D VIRT_MSI_CTRL_ITS) { /* Table 12 ITS Group Format */ build_append_int_noprefix(table_data, 0 /* ITS Group */, 1); /* Ty= pe */ node_size =3D 20 /* fixed header size */ + 4 /* 1 GIC ITS Identif= ier */; @@ -518,7 +518,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) int smmu_mapping_count, offset_to_id_array; int irq =3D sdev->irq; =20 - if (vms->its) { + if (vms->msi_controller =3D=3D VIRT_MSI_CTRL_ITS) { smmu_mapping_count =3D 1; /* ITS Group node */ offset_to_id_array =3D SMMU_V3_ENTRY_SIZE; /* Just after the h= eader */ } else { @@ -611,7 +611,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) } } =20 - if (vms->its) { + if (vms->msi_controller =3D=3D VIRT_MSI_CTRL_ITS) { /* * Map bypassed (don't go through the SMMU) RIDs (input) to * ITS Group node directly: RC -> ITS. @@ -629,7 +629,9 @@ build_iort(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) * SMMU: RC -> ITS. * Output IORT node is the ITS Group node (the first node). */ - build_iort_id_mapping(table_data, 0, 0x10000, IORT_NODE_OFFSET); + if (vms->msi_controller =3D=3D VIRT_MSI_CTRL_ITS) { + build_iort_id_mapping(table_data, 0, 0x10000, IORT_NODE_OFFSET= ); + } } =20 acpi_table_end(linker, &table); @@ -946,7 +948,7 @@ build_madt(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) memmap[VIRT_HIGH_GIC_REDIST2].si= ze); } =20 - if (vms->its) { + if (vms->msi_controller =3D=3D VIRT_MSI_CTRL_ITS) { /* * ACPI spec, Revision 6.0 Errata A * (original 6.0 definition has invalid Length) @@ -960,7 +962,9 @@ build_madt(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) build_append_int_noprefix(table_data, memmap[VIRT_GIC_ITS].bas= e, 8); build_append_int_noprefix(table_data, 0, 4); /* Reserved */ } - } else { + } + + if (vms->msi_controller =3D=3D VIRT_MSI_CTRL_GICV2M) { const uint16_t spi_base =3D vms->irqmap[VIRT_GIC_V2M] + ARM_SPI_BA= SE; =20 /* 5.2.12.16 GIC MSI Frame Structure */ diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 4badc1a734..3d7f02ce0e 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -737,7 +737,7 @@ static void create_its(VirtMachineState *vms) { DeviceState *dev; =20 - assert(vms->its); + assert(vms->msi_controller =3D=3D VIRT_MSI_CTRL_ITS); if (!kvm_irqchip_in_kernel() && !vms->tcg_its) { /* * Do nothing if ITS is neither supported by the host nor emulated= by @@ -957,9 +957,9 @@ static void create_gic(VirtMachineState *vms, MemoryReg= ion *mem) =20 fdt_add_gic_node(vms); =20 - if (vms->gic_version !=3D VIRT_GIC_VERSION_2 && vms->its) { + if (vms->msi_controller =3D=3D VIRT_MSI_CTRL_ITS) { create_its(vms); - } else if (vms->gic_version =3D=3D VIRT_GIC_VERSION_2) { + } else if (vms->msi_controller =3D=3D VIRT_MSI_CTRL_GICV2M) { create_v2m(vms); } } @@ -2132,6 +2132,36 @@ static void finalize_gic_version(VirtMachineState *v= ms) gics_supported, max_cpus); } =20 +static void finalize_msi_controller(VirtMachineState *vms) +{ + if (vms->msi_controller =3D=3D VIRT_MSI_LEGACY_OPT_ITS_OFF) { + if (vms->gic_version =3D=3D 2) { + vms->msi_controller =3D VIRT_MSI_CTRL_GICV2M; + } + else { + vms->msi_controller =3D VIRT_MSI_CTRL_NONE; + } + } + if (vms->msi_controller =3D=3D VIRT_MSI_CTRL_AUTO) { + if (vms->gic_version =3D=3D VIRT_GIC_VERSION_2) { + vms->msi_controller =3D VIRT_MSI_CTRL_GICV2M; + } + else { + vms->msi_controller =3D VIRT_MSI_CTRL_ITS; + } + } + + if (vms->msi_controller =3D=3D VIRT_MSI_CTRL_ITS) { + if (vms->gic_version =3D=3D VIRT_GIC_VERSION_2) { + /* Older Qemu releases accepted this, but better to error. */ + error_report("GICv2 + ITS is an invalid configuration."); + exit(1); + } + } + + assert(vms->msi_controller !=3D VIRT_MSI_CTRL_AUTO); +} + /* * virt_post_cpus_gic_realized() must be called after the CPUs and * the GIC have both been realized. @@ -2251,6 +2281,7 @@ static void machvirt_init(MachineState *machine) * KVM is not available yet */ finalize_gic_version(vms); + finalize_msi_controller(vms); =20 if (vms->secure) { /* @@ -2700,18 +2731,76 @@ static void virt_set_highmem_mmio_size(Object *obj,= Visitor *v, extended_memmap[VIRT_HIGH_PCIE_MMIO].size =3D size; } =20 +static char *virt_get_msi(Object *obj, Error **errp) +{ + VirtMachineState *vms =3D VIRT_MACHINE(obj); + const char *val; + + switch (vms->msi_controller) { + case VIRT_MSI_CTRL_NONE: + case VIRT_MSI_LEGACY_OPT_ITS_OFF: + val =3D "off"; + break; + case VIRT_MSI_CTRL_ITS: + val =3D "its"; + break; + case VIRT_MSI_CTRL_GICV2M: + val =3D "gicv2m"; + break; + case VIRT_MSI_CTRL_AUTO: + val =3D "auto"; + break; + default: + g_assert_not_reached(); + } + return g_strdup(val); +} + +static void virt_set_msi(Object *obj, const char *value, Error **errp) +{ + ERRP_GUARD(); + VirtMachineState *vms =3D VIRT_MACHINE(obj); + + if (!strcmp(value, "auto")) { + vms->msi_controller =3D VIRT_MSI_CTRL_AUTO; /* Will be overriden l= ater */ + } else if (!strcmp(value, "its")) { + vms->msi_controller =3D VIRT_MSI_CTRL_ITS; + } else if (!strcmp(value, "gicv2m")) { + vms->msi_controller =3D VIRT_MSI_CTRL_GICV2M; + } else if (!strcmp(value, "none")) { + vms->msi_controller =3D VIRT_MSI_CTRL_NONE; + } else { + error_setg(errp, "Invalid msi value"); + error_append_hint(errp, "Valid values are auto, gicv2m, its, off\n= "); + } +} + static bool virt_get_its(Object *obj, Error **errp) { VirtMachineState *vms =3D VIRT_MACHINE(obj); =20 - return vms->its; + switch (vms->msi_controller) { + case VIRT_MSI_CTRL_AUTO: + case VIRT_MSI_CTRL_ITS: + return true; + case VIRT_MSI_CTRL_NONE: + case VIRT_MSI_CTRL_GICV2M: + case VIRT_MSI_LEGACY_OPT_ITS_OFF: + return false; + default: + g_assert_not_reached(); + } } =20 static void virt_set_its(Object *obj, bool value, Error **errp) { VirtMachineState *vms =3D VIRT_MACHINE(obj); =20 - vms->its =3D value; + if (value) { + vms->msi_controller =3D VIRT_MSI_CTRL_ITS; + } else { + vms->msi_controller =3D VIRT_MSI_LEGACY_OPT_ITS_OFF; + } } =20 static bool virt_get_dtb_randomness(Object *obj, Error **errp) @@ -3038,6 +3127,9 @@ static void virt_machine_device_pre_plug_cb(HotplugHa= ndler *hotplug_dev, db_start =3D base_memmap[VIRT_GIC_V2M].base; db_end =3D db_start + base_memmap[VIRT_GIC_V2M].size - 1; break; + case VIRT_MSI_CTRL_AUTO: + case VIRT_MSI_LEGACY_OPT_ITS_OFF: + g_assert_not_reached(); } resv_prop_str =3D g_strdup_printf("0x%"PRIx64":0x%"PRIx64":%u", db_start, db_end, @@ -3438,6 +3530,12 @@ static void virt_machine_class_init(ObjectClass *oc,= const void *data) "Set on/off to enable/disable " "ITS instantiation"); =20 + object_class_property_add_str(oc, "msi", virt_get_msi, + virt_set_msi); + object_class_property_set_description(oc, "msi", + "Set MSI settings. " + "Valid values are auto/gicv2m/it= s/off"); + object_class_property_add_bool(oc, "dtb-randomness", virt_get_dtb_randomness, virt_set_dtb_randomness); @@ -3493,8 +3591,8 @@ static void virt_instance_init(Object *obj) vms->highmem_mmio =3D true; vms->highmem_redists =3D true; =20 - /* Default allows ITS instantiation */ - vms->its =3D true; + /* Default allows ITS instantiation if available */ + vms->msi_controller =3D VIRT_MSI_CTRL_AUTO; /* Allow ITS emulation if the machine version supports it */ vms->tcg_its =3D !vmc->no_tcg_its; =20 diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 5907d41dbb..d384355c4a 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -101,6 +101,10 @@ typedef enum VirtIOMMUType { =20 typedef enum VirtMSIControllerType { VIRT_MSI_CTRL_NONE, + /* This value is overriden at runtime.*/ + VIRT_MSI_CTRL_AUTO, + /* Legacy option: its=3Doff provides a GICv2m when using GICv2 */ + VIRT_MSI_LEGACY_OPT_ITS_OFF, VIRT_MSI_CTRL_GICV2M, VIRT_MSI_CTRL_ITS, } VirtMSIControllerType; @@ -146,7 +150,6 @@ struct VirtMachineState { bool highmem_ecam; bool highmem_mmio; bool highmem_redists; - bool its; bool tcg_its; bool virt; bool ras; --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1769538661; cv=none; d=zohomail.com; s=zohoarc; b=Ex4muT2WnAUNVkHrUUUZKKRT529TCGmevatvCYZqdgk7FlTk32dqo2TMn8YOnS/+zYoamImwrr6kawI+zZeuAzFPkPl0M1OPyhl369/MGqlVfKCAZBSpV4vrBe/7VzlRtxdabYY656MUNC75+bB0/lwvmVDuV6iTxar0KX+7DdU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769538661; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Um4hCs3ghGfgmqIKr9rVHUYLxND8garmvYDvo+fs6tg=; b=ITfWZqK0mjvjBbP8g/9ZD6Zr0xSiM/TcExJyvbmczI4n5vLLluoT6MZDgdUMByzSTxvH+zNO8zIuJhyJ12do3dx6KRS2BqdImtD92S5C7cmFt7CBmwjVtev95dxS/13FqfUK53gJRvwGj4l32cfiMy0gJkRbI4CPm2IHmeGZdOw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769538660758885.238110240131; Tue, 27 Jan 2026 10:31:00 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vknpE-00051b-O8; Tue, 27 Jan 2026 13:30:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknnt-0001nc-28 for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:28:57 -0500 Received: from p-west2-cluster5-host8-snip4-4.eps.apple.com ([57.103.71.77] helo=outbound.mr.icloud.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknnr-0003S9-8C for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:28:40 -0500 Received: from outbound.mr.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPS id 7AB42180024E; Tue, 27 Jan 2026 18:28:36 +0000 (UTC) Received: from localhost.localdomain (unknown [17.57.152.38]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPSA id A194B18001E0; Tue, 27 Jan 2026 18:28:31 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; t=1769538518; x=1772130518; bh=Um4hCs3ghGfgmqIKr9rVHUYLxND8garmvYDvo+fs6tg=; h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme; b=ZUZu1h3xCc/TAbviae8vY1lRAMt7qIXXRkvIHHM0vknYxE8b4vQxXwBwFUUlnLyCkZz6+0qJo73M7FrI9MSGkMcVMVMRrex8DsTQjvug1g3SggYewb6PAXvuEeyNE1+P3WELIt7trC+rUY0rw4EzTdL5WRgNtw3lnSqMt3u0cokx2pAOOXJaqGTNj8VIdCm5c1OuASGuD4rOWFNw8AJPx08wWnjbbyvLY4zFIuIbX9r1RdnOJKrDrZNGf7+6Mry6SysdQEdmhOaXGam6IM0Z1GWufuNyPqSbldF4745N+E7ofiExvjurpA8bFtamnDc5Xtsdv9Ib+e3riApLLFqDBg== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org, mohamed@unpredictable.fr Cc: Zhao Liu , "Michael S. Tsirkin" , Roman Bolshakov , qemu-arm@nongnu.org, Ani Sinha , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Akihiko Odaki , Marcel Apfelbaum , Pedro Barbuda , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Shannon Zhao , Igor Mammedov , Cameron Esfahani , Alexander Graf , Peter Maydell , Eduardo Habkost , Phil Dennis-Jordan Subject: [PATCH v18 05/22] tests: data: update AArch64 ACPI tables Date: Tue, 27 Jan 2026 19:27:45 +0100 Message-ID: <20260127182805.73212-6-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260127182805.73212-1-mohamed@unpredictable.fr> References: <20260127182805.73212-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: HDtcQxoH7na9HS0J5NYecDqr5ytgHFos X-Proofpoint-GUID: HDtcQxoH7na9HS0J5NYecDqr5ytgHFos X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDE1MCBTYWx0ZWRfX3xkISnel94lz FwIdaKS/71jtRsrdR46IbMZVd5wS+uyGjP37ZDt5Je/gZamEPXgZ8bI27i5N/LZ0sH9zZJQnBz4 kR8lsrL7/IWnKxcGHnuXIeerTkec7bjLmW2Xgcn/CoOkcoQX+eEOiy/hV1S1F7wAwSYjehpiMfM mAwFumaQ/mmj/kTMjZaqN9xnmh5aJWJlibE3DmcHLjOOaO5Xc2ptr6BPZfvjjyJB/XFoheZ3xYK MsWScbKqh7CexXLHFZkN3tQiZ6LvCN+tjXo12UizaPFHCjFQ/iS76N8Smn0jg/i3A3rBmwPSOI/ RgjBCts8TeOBSE35RonGleUdyu60fR2FuTnjSxy0C6O9L++8vS11gCkR3zAw8E= X-Authority-Info-Out: v=2.4 cv=ZYoQ98VA c=1 sm=1 tr=0 ts=697903d5 cx=c_apl:c_apl_out:c_pps a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=R9vu0HyPPjzH36DpHqwA:9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_04,2026-01-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 malwarescore=0 lowpriorityscore=0 mlxscore=0 suspectscore=0 clxscore=1030 bulkscore=0 mlxlogscore=999 adultscore=0 phishscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601270150 X-JNJ: AAAAAAABHN1FOdBTX5dqk6GX5FcPVyS8HKHYQrvIR1fK4N5hijlZpY4KoymX6aqvKTINfYYubIY+IVvaPItbSI1DsXcgDPmYaObIysKASJ93TCH5lu/PfeJKwYXWGIMCac1XxPopfxvL1YubVm61gO40LaXIIHrvoul6Y7jaTCbMiA44tv5cW3XlVyLLyUbM5oOEcnrFNxh3re9ZTcarVmwxMlw2ZATe/ApypGFp6u3ea/n0Bn6HaedAG+Ct538KARheHe2fRFODkIU0hxF9W3pqhtIe/V+NZL9Q6YGNE11dCtpUvIrwjAkUD4fXgXV5kmf7dF/s/xvxPZNUZflxCXBVvGqTh5Ib+cIYmcBXiUDyC8cZNS/w/Hp0+hQC8B+pB+eBpb1QqcGvttRIW2VIY4FREkJaAHsBFfzT/kd6fwWrOYiG8jC9F0G3meGwRUU1xzTBtHNDLwnGSG9WH9DiDoTELdS6tNk7MENZZRmuAc6erzaQmQDELLznP09lCBufItfr7W8nCR36Br/4jYaObGQrv9oabU/Oh6pYWMdizeTtrR/eOagStJq8CfBkvwUfLk+qydEAowZuaxQ8E5u7OqRSC5lR4rnIz8ofeYaeyAnZVvuP2lUIXL1qf2ZtDBGPa/3XH3XXjB4fIqvBn5H7PpRR8oBLK3+p94z7bvA0ZdZkC+bjlYsP91HBOXyOAUqAzp/JK7X+rsilhQjuhZntKok6h/A+jffQqwan6269Odnnd0TYx0lguejjveUKVR7neS66Ak1Tj4lVUHO9EYXFKc8+bQgmAeF5D32yPBBsbIeYWHT3y5qOxJ7mbWpuCfJai9JpilNizRHVB8Ow1WhDepRYh4dc5NlyjKaWkJYXdGNf7UHehXM+/Kxwh4abb794ykEJBA/hEBKHdhz0e2CX7c8cp18eOP8V1KEr8kGKYGEeDAO3TA== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.71.77; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769538664087154100 Content-Type: text/plain; charset="utf-8" After the previous commit introducing GICv3 + GICv2m configurations, update the AArch64 ACPI tables for the GICv2 case. Signed-off-by: Mohamed Mediouni --- tests/data/acpi/aarch64/virt/IORT | Bin 128 -> 84 bytes tests/data/acpi/aarch64/virt/IORT.smmuv3-dev | Bin 364 -> 260 bytes tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy | Bin 276 -> 192 bytes tests/qtest/bios-tables-test-allowed-diff.h | 3 --- 4 files changed, 3 deletions(-) diff --git a/tests/data/acpi/aarch64/virt/IORT b/tests/data/acpi/aarch64/vi= rt/IORT index 7efd0ce8a6b3928efa7e1373f688ab4c5f50543b..9cce77cacdda976f64eabcc7213= 646af25cb93eb 100644 GIT binary patch delta 42 ocmZo*4B_(h4+;rkU|?Xjo5&?4$_Qi`05J$KsW32u850Ag0fA@))Bpeg literal 128 zcmebD4+?2uU|?Y0?Bwt45v<@85#X!<1dKp25F11@0kHuPgMkDCNC*yK93~3}W)K^M VRiHGGVg_O`aDdYP|3ers^8jQz3IPBB diff --git a/tests/data/acpi/aarch64/virt/IORT.smmuv3-dev b/tests/data/acpi= /aarch64/virt/IORT.smmuv3-dev index 67be268f62afbf2d9459540984da5e9340afdaaa..604121e2b25532351b5bd454b83= 2a9f3f923ddb9 100644 GIT binary patch delta 107 zcmaFE)WXE&=3D^qrr!pOkD>^+f7N|Kp@fx!TXL4d`Dfd#?>k`qJCc|ig|l@Ks-tvM%? f4+Aq3kjpfgkx^X+rjJ2@f#E+$5s)r{C}scvit`FW literal 364 zcmebD4+_a)WME)E<>c?|5v<@85#X!<1VAAM5F13Z0I>lOgMkDCNC*yK9F_^a7X|(1HJXfgB(Wb2oz^ MQ0yI03`oPo01?F*0RR91 diff --git a/tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy b/tests/data/a= cpi/aarch64/virt/IORT.smmuv3-legacy index 41981a449fc306b80cccd87ddec3c593a8d72c07..a0df7fcc4e084a97a6ce7ffd305= bd38b4fee984b 100644 GIT binary patch delta 74 zcmbQjbbyh|(?2NW00RR9v)n{3DM=3D$0E<}(h5!Hn literal 276 zcmX|*K@NgI3`M`puy8?wi3^u3IDkhWzycE!jI!Vis5{Ti6^7s1@{>QmeVugXHa@5G z0SNbY?1op>&X2C5h#<9Ops%#*0ztdHi8G?q;$EluQNrhn>{ys@`b&R|d8G8O{Jrdl mkP$_?rfr{mN!3^;8w}Q?1auX1XIzvDUSRruoXA!(rn3!nx)K2Z diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios= -tables-test-allowed-diff.h index 7acaf464dd..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,4 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/aarch64/virt/IORT", -"tests/data/acpi/aarch64/virt/IORT.smmuv3-dev", -"tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy", --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:23 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Signed-off-by: Mohamed Mediouni --- tests/data/acpi/aarch64/virt/APIC.msi_gicv2m | Bin 0 -> 188 bytes tests/data/acpi/aarch64/virt/IORT.msi_gicv2m | Bin 0 -> 172 bytes tests/qtest/bios-tables-test.c | 21 +++++++++++++++++++ 3 files changed, 21 insertions(+) create mode 100644 tests/data/acpi/aarch64/virt/APIC.msi_gicv2m create mode 100644 tests/data/acpi/aarch64/virt/IORT.msi_gicv2m diff --git a/tests/data/acpi/aarch64/virt/APIC.msi_gicv2m b/tests/data/acpi= /aarch64/virt/APIC.msi_gicv2m new file mode 100644 index 0000000000000000000000000000000000000000..16a01a17c0af605daf64f3cd2de= 3572be9e60cab GIT binary patch literal 188 zcmZ<^@O0k8z`(#_;N}2A literal 0 HcmV?d00001 diff --git a/tests/data/acpi/aarch64/virt/IORT.msi_gicv2m b/tests/data/acpi= /aarch64/virt/IORT.msi_gicv2m new file mode 100644 index 0000000000000000000000000000000000000000..c10da4e61dd00e7eb062558a273= 5d49ca0b20620 GIT binary patch literal 172 zcmebD4+>esz`(#f-O1nCBUr&HBEVSz2pEB4AU23*0%8Lo1_2fq1{MelMzV5(SRi%i nAPXpv4aB)XoP#9EWWm4;QV+r^P#Q=3Dv12GslK (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769538902342761.2871154902984; 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Remove the mention of pre-2.7 machine models as those aren't provided anymore. Signed-off-by: Mohamed Mediouni --- docs/system/arm/virt.rst | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst index e5570773ba..3799d2237e 100644 --- a/docs/system/arm/virt.rst +++ b/docs/system/arm/virt.rst @@ -41,9 +41,10 @@ The virt board supports: - User-creatable SMMUv3 devices (see below for example) - hotpluggable DIMMs - hotpluggable NVDIMMs -- An MSI controller (GICv2M or ITS). GICv2M is selected by default along - with GICv2. ITS is selected by default with GICv3 (>=3D virt-2.7). Note - that ITS is not modeled in TCG mode. +- An MSI controller (GICv2m or ITS). + - When using GICv3, ITS is selected by default when available on the pla= tform. + - If using GICv2, a GICv2m is provided by default instead. + - When ITS is not available on a GICv3 platform, a GICv2m is provided by= default. - 32 virtio-mmio transport devices - running guests using the KVM accelerator on aarch64 hardware - large amounts of RAM (at least 255GB, and more if using highmem) @@ -167,9 +168,11 @@ gic-version with TCG this is currently ``3`` if ``virtualization`` is ``off`` and ``4`` if ``virtualization`` is ``on``, but this may change in future) =20 +msi + Set ``auto``/``gicv2m``/``its``/``none`` to control MSI controller confi= guration. The default is ``auto``. + its - Set ``on``/``off`` to enable/disable ITS instantiation. The default is `= `on`` - for machine types later than ``virt-2.7``. + Set ``on``/``off`` to control ITS instantiation. This is a deprecated op= tion, use ``msi`` instead. =20 iommu Set the IOMMU type to create for the guest. Valid values are: --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1769538852; cv=none; d=zohomail.com; s=zohoarc; b=hQmo69wZ51RWmHp16ZmdM3h9w+SAt6MvSkOV397jbTL0bNUgF1kRHKzovOc31Z3L0wouL5oY/L/Bl6NwQF4tsmMkVLbo0R3ge8PT6+GbeZik4vJvXx71Ce1KbzOaYjJ1F0eNxiGVCb5Tyqd08uSJkVH6OhjZpd7Ouk9Z5UhUNvw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769538852; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=bHD6bcGbBg1Zjyih1r9AXWBDXEOfhYM6tzw/D4SnxqQ=; b=CzN1ntdN1SsD2jUFoQTLngn0c6mYyLreVCmJ0zojXcwLc4e16HNpFLAOjGmOmxrpY4/nztg8hkbqyAmXd+S/FDAIFcZ2VH5a4+95b8GuNvDwemPhWZ4JvaayvwBKr1sDGr2yLKWJtpOQDda338HlxxqOTDMmSAFB2AK/STnPgYo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769538852170161.4553268099695; Tue, 27 Jan 2026 10:34:12 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vknp9-0004AR-Bg; Tue, 27 Jan 2026 13:29:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vkno7-0001vy-UH for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:29:01 -0500 Received: from p-west2-cluster1-host3-snip4-2.eps.apple.com ([57.103.68.65] helo=outbound.mr.icloud.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vkno4-0003VP-HV for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:28:55 -0500 Received: from outbound.mr.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPS id 147D418001C1; Tue, 27 Jan 2026 18:28:50 +0000 (UTC) Received: from localhost.localdomain (unknown [17.57.152.38]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPSA id 7AE351800104; Tue, 27 Jan 2026 18:28:45 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; t=1769538531; x=1772130531; bh=bHD6bcGbBg1Zjyih1r9AXWBDXEOfhYM6tzw/D4SnxqQ=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type:x-icloud-hme; b=GN1qeGX6U7cymsdWKx7BpYpsnZRFNkQCTzeWXpPsdJ+S69MADvDlXuvV425Bk2zjK1InHH9xz99egUDOnlMQeTIGLx52e5cNmyKPh2VqYaMICX26UlbIMngcdwe0P4qknloZPw8HjYuVgZzwPppdRTRrRb4l1RBaGgwc8a3E6hObwbnmxFuwfrjTLsjGAdbYXxPRdHbgcLDNOAJZVJN0O3+sJ2lJmYzoxhZgVbEjnCA3DCQGrutDkMgHFSomrFARYIyWSaLawutSN2Zp4Jmc5vaY3Z8o+rhfgJKsvscWsJaPz97Y/JpIWLmYULiyatMRZMQVaUkaenb/cb7RmpvjsQ== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org, mohamed@unpredictable.fr Cc: Zhao Liu , "Michael S. Tsirkin" , Roman Bolshakov , qemu-arm@nongnu.org, Ani Sinha , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Akihiko Odaki , Marcel Apfelbaum , Pedro Barbuda , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Shannon Zhao , Igor Mammedov , Cameron Esfahani , Alexander Graf , Peter Maydell , Eduardo Habkost , Phil Dennis-Jordan , Pierrick Bouvier Subject: [PATCH v18 08/22] whpx: Move around files before introducing AArch64 support Date: Tue, 27 Jan 2026 19:27:48 +0100 Message-ID: <20260127182805.73212-9-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260127182805.73212-1-mohamed@unpredictable.fr> References: <20260127182805.73212-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDE1MCBTYWx0ZWRfXzZ/+YqKToUSj ceJ7kEc16MHzzlujgcmDAcwOfYDFvBJxuyUU1Dk2BpM/S/PFbBVZ8vkIvmQlEU7DIx0ptJl6G/e N0W/tpJdlXIe9A5inFi+eETP+sNbyWFvk8bG+bKb3wvkaE0QKxyV2jKaqSdi0S/gNb0220VTGRS HqLNpIJQ4N4woBlHheiAS5e5fuUZuAeO/4vzWvLVKIPir/bf0HfkzMvjNvPpDkfg5wDpkZ0uyeB R3/6kpijxNoXo8Vz8kv4DEOfjMxHwfWJ9/TkAIL9h2jE8ArPEC4ZVl0KUEMMtuaQ7OyaaGwhmfm 08HqgFzhTPxU8Lc3/JuWuQTjEqJ6hVQKkA5J2uqvkMcA5oBAwIYq2Am/+wJNQM= X-Proofpoint-ORIG-GUID: K9NKOXLSGNaCKuqCdXsKXBGjJlT1lW3b X-Proofpoint-GUID: K9NKOXLSGNaCKuqCdXsKXBGjJlT1lW3b X-Authority-Info-Out: v=2.4 cv=FPAWBuos c=1 sm=1 tr=0 ts=697903e2 cx=c_apl:c_apl_out:c_pps a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=yMhMjlubAAAA:8 a=5-iGLm-LtT_B5TT3xKgA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_04,2026-01-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 phishscore=0 mlxscore=0 adultscore=0 malwarescore=0 mlxlogscore=999 spamscore=0 lowpriorityscore=0 clxscore=1030 bulkscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601270150 X-JNJ: AAAAAAABd2011Rn0kKi6rc2P7iz13TDQRvYaTYZ6g/pQBbiC+LRc0fqWVqhbgfNkhBIMIoFlRb11UPEjnjyTSk0/4JvQ+K4K7wUwR3CT/B+ucqEiBDFH9pkBft2rKgkmtE3fGPF0bHeCRl0GXjtMFh/wcxMvsfYrZuzFfNIkLn7hmNc/eTrpsSrEfQhBFcaXwH7h1Yelg0WGHVXirrNvDAT4pCAIKeOxK8nsDLJdcEwyC0B/xurO72Y5Fc8tkQ4A/nqqv2yXCqSBBNfbBSF7ocf5PAGtfO1kEikbZYCMQIAGEmZrGOPvXHX7tsOvI3TQZlEOgtt4M4bZOL4feIVtfSY7AFtfUbXSYNly4BqrwqU4BuKtGCONlVikWlOe5COMxL2aC0FOvGrnRPRGJW4/o/zPLGkXBrLAsvSsD+ilb+lIUnkR9KHjGU56IQnCo4HVRzmAw6XOQ9K0chKnPzA8GXb4LT0vGPWUV1afXjIc4yPAPAGpeBmq8InrjT2N5OeAc7k/hY/wz09foogTW0RXmCYl3j+9u2NBsB+4MoCa+aln+hluuFG2XTFDSpn5+5JvvdCmJvABx5sC681FXXldfMcbvHmJgpcnSZtdt0axrzdh3qZx1cdJXzzqWGcpf4ngjUXjsYzdbgnzQNXdZi2PmPrcvbOG+KeYPN5KIQART2UKABFUtB5tr8qYK+su8X5/Wh+PAle20nRTgPcABZj601C2yDTs+YHbNZjItlUXdprdi+uf4D1jiF15UBlXSVAnc4/vjL+rGneXfou9W6emB2NnXUr79p04ze0mO+Be5XEYldN5ms4sgA2v/BvUAQi7n+NByCFicOHRDqZXFk/07L0NBvrqjUZPNxvPqkU6dD6QHuZshBFGD2EGBgJfU3VZ/iLPypYkr0YmIbkwnkCZASfioIQPVYh4xGOl8wuJU64zxdVyLTKt/CGU20X9ZJ4KWnv8MAk= Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.68.65; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769538854718154100 Switch to a design where we can share whpx code between x86 and AArch64 whe= n it makes sense to do so. Signed-off-by: Mohamed Mediouni Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier Reviewed-by: Akihiko Odaki --- MAINTAINERS | 2 ++ accel/meson.build | 1 + accel/whpx/meson.build | 6 ++++++ {target/i386 =3D> accel}/whpx/whpx-accel-ops.c | 4 ++-- {target/i386/whpx =3D> include/system}/whpx-accel-ops.h | 4 ++-- {target/i386/whpx =3D> include/system}/whpx-internal.h | 6 ++++-- target/i386/whpx/meson.build | 1 - target/i386/whpx/whpx-all.c | 4 ++-- target/i386/whpx/whpx-apic.c | 2 +- 9 files changed, 20 insertions(+), 10 deletions(-) create mode 100644 accel/whpx/meson.build rename {target/i386 =3D> accel}/whpx/whpx-accel-ops.c (97%) rename {target/i386/whpx =3D> include/system}/whpx-accel-ops.h (92%) rename {target/i386/whpx =3D> include/system}/whpx-internal.h (97%) diff --git a/MAINTAINERS b/MAINTAINERS index e23354235d..ba565ca5fb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -565,9 +565,11 @@ WHPX CPUs M: Pedro Barbuda M: Mohamed Mediouni S: Supported +F: accel/whpx/ F: target/i386/whpx/ F: accel/stubs/whpx-stub.c F: include/system/whpx.h +F: include/system/whpx-accel-ops.h =20 MSHV M: Magnus Kulke diff --git a/accel/meson.build b/accel/meson.build index 983dfd0bd5..289b7420ff 100644 --- a/accel/meson.build +++ b/accel/meson.build @@ -6,6 +6,7 @@ user_ss.add(files('accel-user.c')) subdir('tcg') if have_system subdir('hvf') + subdir('whpx') subdir('qtest') subdir('kvm') subdir('xen') diff --git a/accel/whpx/meson.build b/accel/whpx/meson.build new file mode 100644 index 0000000000..7b3d6f1c1c --- /dev/null +++ b/accel/whpx/meson.build @@ -0,0 +1,6 @@ +whpx_ss =3D ss.source_set() +whpx_ss.add(files( + 'whpx-accel-ops.c', +)) + +specific_ss.add_all(when: 'CONFIG_WHPX', if_true: whpx_ss) diff --git a/target/i386/whpx/whpx-accel-ops.c b/accel/whpx/whpx-accel-ops.c similarity index 97% rename from target/i386/whpx/whpx-accel-ops.c rename to accel/whpx/whpx-accel-ops.c index f75886128d..c84a25c273 100644 --- a/target/i386/whpx/whpx-accel-ops.c +++ b/accel/whpx/whpx-accel-ops.c @@ -16,8 +16,8 @@ #include "qemu/guest-random.h" =20 #include "system/whpx.h" -#include "whpx-internal.h" -#include "whpx-accel-ops.h" +#include "system/whpx-internal.h" +#include "system/whpx-accel-ops.h" =20 static void *whpx_cpu_thread_fn(void *arg) { diff --git a/target/i386/whpx/whpx-accel-ops.h b/include/system/whpx-accel-= ops.h similarity index 92% rename from target/i386/whpx/whpx-accel-ops.h rename to include/system/whpx-accel-ops.h index 54cfc25a14..ed9d4c49f4 100644 --- a/target/i386/whpx/whpx-accel-ops.h +++ b/include/system/whpx-accel-ops.h @@ -7,8 +7,8 @@ * See the COPYING file in the top-level directory. */ =20 -#ifndef TARGET_I386_WHPX_ACCEL_OPS_H -#define TARGET_I386_WHPX_ACCEL_OPS_H +#ifndef SYSTEM_WHPX_ACCEL_OPS_H +#define SYSTEM_WHPX_ACCEL_OPS_H =20 #include "system/cpus.h" =20 diff --git a/target/i386/whpx/whpx-internal.h b/include/system/whpx-interna= l.h similarity index 97% rename from target/i386/whpx/whpx-internal.h rename to include/system/whpx-internal.h index 2dcad1f565..041fa958b4 100644 --- a/target/i386/whpx/whpx-internal.h +++ b/include/system/whpx-internal.h @@ -1,11 +1,13 @@ -#ifndef TARGET_I386_WHPX_INTERNAL_H -#define TARGET_I386_WHPX_INTERNAL_H +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#ifndef SYSTEM_WHPX_INTERNAL_H +#define SYSTEM_WHPX_INTERNAL_H =20 #include #include #include =20 #include "hw/i386/apic.h" +#include "exec/vaddr.h" =20 typedef enum WhpxBreakpointState { WHPX_BP_CLEARED =3D 0, diff --git a/target/i386/whpx/meson.build b/target/i386/whpx/meson.build index 9c54aaad39..c3aaaff9fd 100644 --- a/target/i386/whpx/meson.build +++ b/target/i386/whpx/meson.build @@ -1,5 +1,4 @@ i386_system_ss.add(when: 'CONFIG_WHPX', if_true: files( 'whpx-all.c', 'whpx-apic.c', - 'whpx-accel-ops.c', )) diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index db184e1b0d..cef31fc1a8 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -31,8 +31,8 @@ #include "accel/accel-cpu-target.h" #include =20 -#include "whpx-internal.h" -#include "whpx-accel-ops.h" +#include "system/whpx-internal.h" +#include "system/whpx-accel-ops.h" =20 #include #include diff --git a/target/i386/whpx/whpx-apic.c b/target/i386/whpx/whpx-apic.c index afcb25843b..b934fdcbe1 100644 --- a/target/i386/whpx/whpx-apic.c +++ b/target/i386/whpx/whpx-apic.c @@ -18,7 +18,7 @@ #include "hw/pci/msi.h" #include "system/hw_accel.h" #include "system/whpx.h" -#include "whpx-internal.h" +#include "system/whpx-internal.h" =20 struct whpx_lapic_state { struct { --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Tsirkin" , Roman Bolshakov , qemu-arm@nongnu.org, Ani Sinha , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Akihiko Odaki , Marcel Apfelbaum , Pedro Barbuda , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Shannon Zhao , Igor Mammedov , Cameron Esfahani , Alexander Graf , Peter Maydell , Eduardo Habkost , Phil Dennis-Jordan , Pierrick Bouvier Subject: [PATCH v18 09/22] whpx: reshuffle common code Date: Tue, 27 Jan 2026 19:27:49 +0100 Message-ID: <20260127182805.73212-10-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260127182805.73212-1-mohamed@unpredictable.fr> References: <20260127182805.73212-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: 30LBy68e9mnix20TqR7UrZIPdpmbBImA X-Proofpoint-ORIG-GUID: 30LBy68e9mnix20TqR7UrZIPdpmbBImA X-Authority-Info-Out: v=2.4 cv=YNmSCBGx c=1 sm=1 tr=0 ts=697903ea cx=c_apl:c_apl_out:c_pps a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=yMhMjlubAAAA:8 a=XtnWhMvHLvoGx0dyWtYA:9 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDE1MCBTYWx0ZWRfX+mJOrvkc09rt MlN3icmT7Xz//bx/9bgK78CAGGYs/IRGNoHS83qZLaPFl2Wbuezc8oH+M1KC8jr1NR9bvAvngn3 nGKm36YSHFaEU+R8cYLC5bVDQs3ZZ9Zck/KJcMux1MluYQQBkLv7T9DKrs4i8914VbcTuvBLkIS WgrFdTLKerJSoLmy4995QXBfYNHt8Mtuh9eKGyQPRK0gB+FXaFJuMUkZn1uP+L76wAfRhjEk3ZA Y73A3QjtbMjH04cGWFk69ln9RSyOLfBFmJcBLAeiJPy+7C7scJvltBTtrnlLCKK79Cl8i9PDcQG C2qA3CSV7fw2p5g8gjW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_04,2026-01-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 adultscore=0 bulkscore=0 clxscore=1030 spamscore=0 phishscore=0 mlxscore=0 suspectscore=0 mlxlogscore=999 malwarescore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2601270150 X-JNJ: AAAAAAABB5IPqxdcNQ/jipB8xcNB5xewxoivbDwWK74kYO2bKRARTyR2NAdLDYFvMicvOIzHA70fKdEjy9VlwyJEw6kPqrKH65Lls/QETHwjJPDGbkDqWEnOK4bkZcaSIgIelHcs90fyqVSd+XrBnniNFacqN2Ftx2UvlSZwQpBcstfxBAqj1yyC1+BRd/XnVqqYy1typL89hx3KfxIW3wp4+O9T8ZkM65gW7f0+k7dykQ8+WoNvwm+BZiUbJS+sgglSZJrpIaSysDydd2z+2uuwcOQGOf+zERfpYE2pvkrPUXGoxKbU1QaOnZXG/He6meEc+6BMyByZEwHlWuxYkOAohZJe+3i7Fzz4QkYj22ocXbENnjae7B5wR8yhXvhxjI2EnGzRtWJPDk4rcYn/ovq4XgFYdHYFbQZagdl5cAy5KQh6ciK5RGCOLNoFUJ4jA7uHtCjQm84pc9pq9lfrwmtFScQKmbXwc294O2hOf36fgJyctjd9I8hd4wKjtbp+eboq7lhKkLYlWzU7GBPG/GNWpsUtPCcPaw86FCS3NhL2i0TfmyVvNWqnancUf/r6et5WI6rf5aJlTdNRfMZYHZ84YcD80sKkWLkjQGgB2OpkZjaNgDWLqay4l0GjyDRneBJqNzfP00CV9e8ysaaCrXX+en76Rm7i+z3IBId3I38nb/yj3eg9DceXfmVoOdUvd/lIztjwWn5KDLdoSBwediN2RJfon9A1e8gv9apiWx+/jWbXo5BROcRLhYwImMAMmjiITsA58aKGaVqjIxLkJl4/Iz/Z+3iEcqX5YiPhZDdp0k9IgzwDVaBIF1N/bsE/y6cHKt8cWgm5BhzKclCmBfcBxYAEGc95MYbQ1Zb/bXYBDo5wM9cxvUDGqc9RZR9std9i9dXh7AWDIa6LKlnf4vQ= Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.68.14; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769539073068154100 Content-Type: text/plain; charset="utf-8" Some code can be shared between x86_64 and arm64 WHPX. Do so as much as rea= sonable. Signed-off-by: Mohamed Mediouni Reviewed-by: Pierrick Bouvier Reviewed-by: Akihiko Odaki --- MAINTAINERS | 2 + accel/whpx/meson.build | 1 + accel/whpx/whpx-common.c | 558 +++++++++++++++++++++++++++++++++++ include/system/whpx-all.h | 20 ++ include/system/whpx-common.h | 21 ++ target/i386/whpx/whpx-all.c | 551 +--------------------------------- 6 files changed, 612 insertions(+), 541 deletions(-) create mode 100644 accel/whpx/whpx-common.c create mode 100644 include/system/whpx-all.h create mode 100644 include/system/whpx-common.h diff --git a/MAINTAINERS b/MAINTAINERS index ba565ca5fb..5a7b955111 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -570,6 +570,8 @@ F: target/i386/whpx/ F: accel/stubs/whpx-stub.c F: include/system/whpx.h F: include/system/whpx-accel-ops.h +F: include/system/whpx-common.h +F: include/system/whpx-internal.h =20 MSHV M: Magnus Kulke diff --git a/accel/whpx/meson.build b/accel/whpx/meson.build index 7b3d6f1c1c..fad28dddcb 100644 --- a/accel/whpx/meson.build +++ b/accel/whpx/meson.build @@ -1,6 +1,7 @@ whpx_ss =3D ss.source_set() whpx_ss.add(files( 'whpx-accel-ops.c', + 'whpx-common.c' )) =20 specific_ss.add_all(when: 'CONFIG_WHPX', if_true: whpx_ss) diff --git a/accel/whpx/whpx-common.c b/accel/whpx/whpx-common.c new file mode 100644 index 0000000000..0a6068fdde --- /dev/null +++ b/accel/whpx/whpx-common.c @@ -0,0 +1,558 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * QEMU Windows Hypervisor Platform accelerator (WHPX) + * + * Copyright Microsoft Corp. 2017 + */ + +#include "qemu/osdep.h" +#include "cpu.h" +#include "system/address-spaces.h" +#include "system/ioport.h" +#include "gdbstub/helpers.h" +#include "qemu/accel.h" +#include "accel/accel-ops.h" +#include "system/whpx.h" +#include "system/cpus.h" +#include "system/runstate.h" +#include "qemu/main-loop.h" +#include "hw/core/boards.h" +#include "hw/intc/ioapic.h" +#include "qemu/error-report.h" +#include "qapi/error.h" +#include "qapi/qapi-types-common.h" +#include "qapi/qapi-visit-common.h" +#include "migration/blocker.h" +#include "accel/accel-cpu-target.h" +#include + +#include "system/whpx-internal.h" +#include "system/whpx-accel-ops.h" +#include "system/whpx-common.h" +#include "system/whpx-all.h" + +#include +#include + +bool whpx_allowed; +static bool whp_dispatch_initialized; +static HMODULE hWinHvPlatform; +static HMODULE hWinHvEmulation; + +struct whpx_state whpx_global; +struct WHPDispatch whp_dispatch; + +/* Tries to find a breakpoint at the specified address. */ +struct whpx_breakpoint *whpx_lookup_breakpoint_by_addr(uint64_t address) +{ + struct whpx_state *whpx =3D &whpx_global; + int i; + + if (whpx->breakpoints.breakpoints) { + for (i =3D 0; i < whpx->breakpoints.breakpoints->used; i++) { + if (address =3D=3D whpx->breakpoints.breakpoints->data[i].addr= ess) { + return &whpx->breakpoints.breakpoints->data[i]; + } + } + } + + return NULL; +} + +/* + * This function is called when the a VCPU is about to start and no other + * VCPUs have been started so far. Since the VCPU start order could be + * arbitrary, it doesn't have to be VCPU#0. + * + * It is used to commit the breakpoints into memory, and configure WHPX + * to intercept debug exceptions. + * + * Note that whpx_set_exception_exit_bitmap() cannot be called if one or + * more VCPUs are already running, so this is the best place to do it. + */ +int whpx_first_vcpu_starting(CPUState *cpu) +{ + struct whpx_state *whpx =3D &whpx_global; + + g_assert(bql_locked()); + + if (!QTAILQ_EMPTY(&cpu->breakpoints) || + (whpx->breakpoints.breakpoints && + whpx->breakpoints.breakpoints->used)) { + CPUBreakpoint *bp; + int i =3D 0; + bool update_pending =3D false; + + QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) { + if (i >=3D whpx->breakpoints.original_address_count || + bp->pc !=3D whpx->breakpoints.original_addresses[i]) { + update_pending =3D true; + } + + i++; + } + + if (i !=3D whpx->breakpoints.original_address_count) { + update_pending =3D true; + } + + if (update_pending) { + /* + * The CPU breakpoints have changed since the last call to + * whpx_translate_cpu_breakpoints(). WHPX breakpoints must + * now be recomputed. + */ + whpx_translate_cpu_breakpoints(&whpx->breakpoints, cpu, i); + } + /* Actually insert the breakpoints into the memory. */ + whpx_apply_breakpoints(whpx->breakpoints.breakpoints, cpu, true); + } + HRESULT hr; + uint64_t exception_mask; + if (whpx->step_pending || + (whpx->breakpoints.breakpoints && + whpx->breakpoints.breakpoints->used)) { + /* + * We are either attempting to single-step one or more CPUs, or + * have one or more breakpoints enabled. Both require intercepting + * the WHvX64ExceptionTypeBreakpointTrap exception. + */ + exception_mask =3D 1UL << WHvX64ExceptionTypeDebugTrapOrFault; + } else { + /* Let the guest handle all exceptions. */ + exception_mask =3D 0; + } + hr =3D whpx_set_exception_exit_bitmap(exception_mask); + if (!SUCCEEDED(hr)) { + error_report("WHPX: Failed to update exception exit mask," + "hr=3D%08lx.", hr); + return 1; + } + return 0; +} + +/* + * This function is called when the last VCPU has finished running. + * It is used to remove any previously set breakpoints from memory. + */ +int whpx_last_vcpu_stopping(CPUState *cpu) +{ + whpx_apply_breakpoints(whpx_global.breakpoints.breakpoints, cpu, false= ); + return 0; +} + +static void do_whpx_cpu_synchronize_state(CPUState *cpu, run_on_cpu_data a= rg) +{ + if (!cpu->vcpu_dirty) { + whpx_get_registers(cpu); + cpu->vcpu_dirty =3D true; + } +} + +static void do_whpx_cpu_synchronize_post_reset(CPUState *cpu, + run_on_cpu_data arg) +{ + whpx_set_registers(cpu, WHPX_SET_RESET_STATE); + cpu->vcpu_dirty =3D false; +} + +static void do_whpx_cpu_synchronize_post_init(CPUState *cpu, + run_on_cpu_data arg) +{ + whpx_set_registers(cpu, WHPX_SET_FULL_STATE); + cpu->vcpu_dirty =3D false; +} + +static void do_whpx_cpu_synchronize_pre_loadvm(CPUState *cpu, + run_on_cpu_data arg) +{ + cpu->vcpu_dirty =3D true; +} + +/* + * CPU support. + */ + +void whpx_cpu_synchronize_state(CPUState *cpu) +{ + if (!cpu->vcpu_dirty) { + run_on_cpu(cpu, do_whpx_cpu_synchronize_state, RUN_ON_CPU_NULL); + } +} + +void whpx_cpu_synchronize_post_reset(CPUState *cpu) +{ + run_on_cpu(cpu, do_whpx_cpu_synchronize_post_reset, RUN_ON_CPU_NULL); +} + +void whpx_cpu_synchronize_post_init(CPUState *cpu) +{ + run_on_cpu(cpu, do_whpx_cpu_synchronize_post_init, RUN_ON_CPU_NULL); +} + +void whpx_cpu_synchronize_pre_loadvm(CPUState *cpu) +{ + run_on_cpu(cpu, do_whpx_cpu_synchronize_pre_loadvm, RUN_ON_CPU_NULL); +} + +static void whpx_pre_resume_vm(AccelState *as, bool step_pending) +{ + whpx_global.step_pending =3D step_pending; +} + +/* + * Vcpu support. + */ + +int whpx_vcpu_exec(CPUState *cpu) +{ + int ret; + int fatal; + + for (;;) { + if (cpu->exception_index >=3D EXCP_INTERRUPT) { + ret =3D cpu->exception_index; + cpu->exception_index =3D -1; + break; + } + + fatal =3D whpx_vcpu_run(cpu); + + if (fatal) { + error_report("WHPX: Failed to exec a virtual processor"); + abort(); + } + } + + return ret; +} + +void whpx_destroy_vcpu(CPUState *cpu) +{ + struct whpx_state *whpx =3D &whpx_global; + + whp_dispatch.WHvDeleteVirtualProcessor(whpx->partition, cpu->cpu_index= ); + AccelCPUState *vcpu =3D cpu->accel; + whp_dispatch.WHvEmulatorDestroyEmulator(vcpu->emulator); + g_free(cpu->accel); +} + + +void whpx_vcpu_kick(CPUState *cpu) +{ + struct whpx_state *whpx =3D &whpx_global; + whp_dispatch.WHvCancelRunVirtualProcessor( + whpx->partition, cpu->cpu_index, 0); +} + +/* + * Memory support. + */ + +static void whpx_update_mapping(hwaddr start_pa, ram_addr_t size, + void *host_va, int add, int rom, + const char *name) +{ + struct whpx_state *whpx =3D &whpx_global; + HRESULT hr; + + /* + if (add) { + printf("WHPX: ADD PA:%p Size:%p, Host:%p, %s, '%s'\n", + (void*)start_pa, (void*)size, host_va, + (rom ? "ROM" : "RAM"), name); + } else { + printf("WHPX: DEL PA:%p Size:%p, Host:%p, '%s'\n", + (void*)start_pa, (void*)size, host_va, name); + } + */ + + if (add) { + hr =3D whp_dispatch.WHvMapGpaRange(whpx->partition, + host_va, + start_pa, + size, + (WHvMapGpaRangeFlagRead | + WHvMapGpaRangeFlagExecute | + (rom ? 0 : WHvMapGpaRangeFlagWri= te))); + } else { + hr =3D whp_dispatch.WHvUnmapGpaRange(whpx->partition, + start_pa, + size); + } + + if (FAILED(hr)) { + error_report("WHPX: Failed to %s GPA range '%s' PA:%p, Size:%p byt= es," + " Host:%p, hr=3D%08lx", + (add ? "MAP" : "UNMAP"), name, + (void *)(uintptr_t)start_pa, (void *)size, host_va, h= r); + } +} + +static void whpx_process_section(MemoryRegionSection *section, int add) +{ + MemoryRegion *mr =3D section->mr; + hwaddr start_pa =3D section->offset_within_address_space; + ram_addr_t size =3D int128_get64(section->size); + unsigned int delta; + uint64_t host_va; + + if (!memory_region_is_ram(mr)) { + return; + } + + delta =3D qemu_real_host_page_size() - (start_pa & ~qemu_real_host_pag= e_mask()); + delta &=3D ~qemu_real_host_page_mask(); + if (delta > size) { + return; + } + start_pa +=3D delta; + size -=3D delta; + size &=3D qemu_real_host_page_mask(); + if (!size || (start_pa & ~qemu_real_host_page_mask())) { + return; + } + + host_va =3D (uintptr_t)memory_region_get_ram_ptr(mr) + + section->offset_within_region + delta; + + whpx_update_mapping(start_pa, size, (void *)(uintptr_t)host_va, add, + memory_region_is_rom(mr), mr->name); +} + +static void whpx_region_add(MemoryListener *listener, + MemoryRegionSection *section) +{ + memory_region_ref(section->mr); + whpx_process_section(section, 1); +} + +static void whpx_region_del(MemoryListener *listener, + MemoryRegionSection *section) +{ + whpx_process_section(section, 0); + memory_region_unref(section->mr); +} + +static void whpx_transaction_begin(MemoryListener *listener) +{ +} + +static void whpx_transaction_commit(MemoryListener *listener) +{ +} + +static void whpx_log_sync(MemoryListener *listener, + MemoryRegionSection *section) +{ + MemoryRegion *mr =3D section->mr; + + if (!memory_region_is_ram(mr)) { + return; + } + + memory_region_set_dirty(mr, 0, int128_get64(section->size)); +} + +static MemoryListener whpx_memory_listener =3D { + .name =3D "whpx", + .begin =3D whpx_transaction_begin, + .commit =3D whpx_transaction_commit, + .region_add =3D whpx_region_add, + .region_del =3D whpx_region_del, + .log_sync =3D whpx_log_sync, + .priority =3D MEMORY_LISTENER_PRIORITY_ACCEL, +}; + +void whpx_memory_init(void) +{ + memory_listener_register(&whpx_memory_listener, &address_space_memory); +} + +/* + * Load the functions from the given library, using the given handle. If a + * handle is provided, it is used, otherwise the library is opened. The + * handle will be updated on return with the opened one. + */ +static bool load_whp_dispatch_fns(HMODULE *handle, + WHPFunctionList function_list) +{ + HMODULE hLib =3D *handle; + + #define WINHV_PLATFORM_DLL "WinHvPlatform.dll" + #define WINHV_EMULATION_DLL "WinHvEmulation.dll" + #define WHP_LOAD_FIELD_OPTIONAL(return_type, function_name, signature)= \ + whp_dispatch.function_name =3D \ + (function_name ## _t)GetProcAddress(hLib, #function_name); \ + + #define WHP_LOAD_FIELD(return_type, function_name, signature) \ + whp_dispatch.function_name =3D \ + (function_name ## _t)GetProcAddress(hLib, #function_name); \ + if (!whp_dispatch.function_name) { \ + error_report("Could not load function %s", #function_name); \ + goto error; \ + } \ + + #define WHP_LOAD_LIB(lib_name, handle_lib) \ + if (!handle_lib) { \ + handle_lib =3D LoadLibrary(lib_name); \ + if (!handle_lib) { \ + error_report("Could not load library %s.", lib_name); \ + goto error; \ + } \ + } \ + + switch (function_list) { + case WINHV_PLATFORM_FNS_DEFAULT: + WHP_LOAD_LIB(WINHV_PLATFORM_DLL, hLib) + LIST_WINHVPLATFORM_FUNCTIONS(WHP_LOAD_FIELD) + break; + case WINHV_EMULATION_FNS_DEFAULT: + WHP_LOAD_LIB(WINHV_EMULATION_DLL, hLib) + LIST_WINHVEMULATION_FUNCTIONS(WHP_LOAD_FIELD) + break; + case WINHV_PLATFORM_FNS_SUPPLEMENTAL: + WHP_LOAD_LIB(WINHV_PLATFORM_DLL, hLib) + LIST_WINHVPLATFORM_FUNCTIONS_SUPPLEMENTAL(WHP_LOAD_FIELD_OPTIONAL) + break; + } + + *handle =3D hLib; + return true; + +error: + if (hLib) { + FreeLibrary(hLib); + } + + return false; +} + +static void whpx_set_kernel_irqchip(Object *obj, Visitor *v, + const char *name, void *opaque, + Error **errp) +{ + struct whpx_state *whpx =3D &whpx_global; + OnOffSplit mode; + + if (!visit_type_OnOffSplit(v, name, &mode, errp)) { + return; + } + + switch (mode) { + case ON_OFF_SPLIT_ON: + whpx->kernel_irqchip_allowed =3D true; + whpx->kernel_irqchip_required =3D true; + break; + + case ON_OFF_SPLIT_OFF: + whpx->kernel_irqchip_allowed =3D false; + whpx->kernel_irqchip_required =3D false; + break; + + case ON_OFF_SPLIT_SPLIT: + error_setg(errp, "WHPX: split irqchip currently not supported"); + error_append_hint(errp, + "Try without kernel-irqchip or with kernel-irqchip=3Don|off"); + break; + + default: + /* + * The value was checked in visit_type_OnOffSplit() above. If + * we get here, then something is wrong in QEMU. + */ + abort(); + } +} + +static void whpx_cpu_accel_class_init(ObjectClass *oc, const void *data) +{ + AccelCPUClass *acc =3D ACCEL_CPU_CLASS(oc); + + acc->cpu_instance_init =3D whpx_cpu_instance_init; +} + +static const TypeInfo whpx_cpu_accel_type =3D { + .name =3D ACCEL_CPU_NAME("whpx"), + + .parent =3D TYPE_ACCEL_CPU, + .class_init =3D whpx_cpu_accel_class_init, + .abstract =3D true, +}; + +/* + * Partition support + */ + +bool whpx_apic_in_platform(void) +{ + return whpx_global.apic_in_platform; +} + +static void whpx_accel_class_init(ObjectClass *oc, const void *data) +{ + AccelClass *ac =3D ACCEL_CLASS(oc); + ac->name =3D "WHPX"; + ac->init_machine =3D whpx_accel_init; + ac->pre_resume_vm =3D whpx_pre_resume_vm; + ac->allowed =3D &whpx_allowed; + + object_class_property_add(oc, "kernel-irqchip", "on|off|split", + NULL, whpx_set_kernel_irqchip, + NULL, NULL); + object_class_property_set_description(oc, "kernel-irqchip", + "Configure WHPX in-kernel irqchip"); +} + +static void whpx_accel_instance_init(Object *obj) +{ + struct whpx_state *whpx =3D &whpx_global; + + memset(whpx, 0, sizeof(struct whpx_state)); + /* Turn on kernel-irqchip, by default */ + whpx->kernel_irqchip_allowed =3D true; +} + +static const TypeInfo whpx_accel_type =3D { + .name =3D ACCEL_CLASS_NAME("whpx"), + .parent =3D TYPE_ACCEL, + .instance_init =3D whpx_accel_instance_init, + .class_init =3D whpx_accel_class_init, +}; + +static void whpx_type_init(void) +{ + type_register_static(&whpx_accel_type); + type_register_static(&whpx_cpu_accel_type); +} + +bool init_whp_dispatch(void) +{ + if (whp_dispatch_initialized) { + return true; + } + + if (!load_whp_dispatch_fns(&hWinHvPlatform, WINHV_PLATFORM_FNS_DEFAULT= )) { + goto error; + } + + if (!load_whp_dispatch_fns(&hWinHvEmulation, WINHV_EMULATION_FNS_DEFAU= LT)) { + goto error; + } + + assert(load_whp_dispatch_fns(&hWinHvPlatform, + WINHV_PLATFORM_FNS_SUPPLEMENTAL)); + whp_dispatch_initialized =3D true; + + return true; +error: + if (hWinHvPlatform) { + FreeLibrary(hWinHvPlatform); + } + if (hWinHvEmulation) { + FreeLibrary(hWinHvEmulation); + } + return false; +} + +type_init(whpx_type_init); diff --git a/include/system/whpx-all.h b/include/system/whpx-all.h new file mode 100644 index 0000000000..f13cdf7f66 --- /dev/null +++ b/include/system/whpx-all.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#ifndef SYSTEM_WHPX_ALL_H +#define SYSTEM_WHPX_ALL_H + +/* Called by whpx-common */ +int whpx_vcpu_run(CPUState *cpu); +void whpx_get_registers(CPUState *cpu); +void whpx_set_registers(CPUState *cpu, int level); +int whpx_accel_init(AccelState *as, MachineState *ms); +void whpx_cpu_instance_init(CPUState *cs); +HRESULT whpx_set_exception_exit_bitmap(UINT64 exceptions); +void whpx_apply_breakpoints( +struct whpx_breakpoint_collection *breakpoints, + CPUState *cpu, + bool resuming); +void whpx_translate_cpu_breakpoints( + struct whpx_breakpoints *breakpoints, + CPUState *cpu, + int cpu_breakpoint_count); +#endif diff --git a/include/system/whpx-common.h b/include/system/whpx-common.h new file mode 100644 index 0000000000..e549c7539c --- /dev/null +++ b/include/system/whpx-common.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#ifndef SYSTEM_WHPX_COMMON_H +#define SYSTEM_WHPX_COMMON_H + +struct AccelCPUState { + WHV_EMULATOR_HANDLE emulator; + bool window_registered; + bool interruptable; + bool ready_for_pic_interrupt; + uint64_t tpr; + uint64_t apic_base; + bool interruption_pending; + /* Must be the last field as it may have a tail */ + WHV_RUN_VP_EXIT_CONTEXT exit_ctx; +}; + +int whpx_first_vcpu_starting(CPUState *cpu); +int whpx_last_vcpu_stopping(CPUState *cpu); +void whpx_memory_init(void); +struct whpx_breakpoint *whpx_lookup_breakpoint_by_addr(uint64_t address); +#endif diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index cef31fc1a8..052cda42bf 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -33,6 +33,8 @@ =20 #include "system/whpx-internal.h" #include "system/whpx-accel-ops.h" +#include "system/whpx-all.h" +#include "system/whpx-common.h" =20 #include #include @@ -232,28 +234,9 @@ typedef enum WhpxStepMode { WHPX_STEP_EXCLUSIVE, } WhpxStepMode; =20 -struct AccelCPUState { - WHV_EMULATOR_HANDLE emulator; - bool window_registered; - bool interruptable; - bool ready_for_pic_interrupt; - uint64_t tpr; - uint64_t apic_base; - bool interruption_pending; - - /* Must be the last field as it may have a tail */ - WHV_RUN_VP_EXIT_CONTEXT exit_ctx; -}; - -bool whpx_allowed; -static bool whp_dispatch_initialized; -static HMODULE hWinHvPlatform, hWinHvEmulation; static uint32_t max_vcpu_index; static WHV_PROCESSOR_XSAVE_FEATURES whpx_xsave_cap; =20 -struct whpx_state whpx_global; -struct WHPDispatch whp_dispatch; - static bool whpx_has_xsave(void) { return whpx_xsave_cap.XsaveSupport; @@ -379,7 +362,7 @@ static uint64_t whpx_cr8_to_apic_tpr(uint64_t cr8) return cr8 << 4; } =20 -static void whpx_set_registers(CPUState *cpu, int level) +void whpx_set_registers(CPUState *cpu, int level) { struct whpx_state *whpx =3D &whpx_global; AccelCPUState *vcpu =3D cpu->accel; @@ -594,7 +577,7 @@ static void whpx_get_xcrs(CPUState *cpu) cpu_env(cpu)->xcr0 =3D xcr0.Reg64; } =20 -static void whpx_get_registers(CPUState *cpu) +void whpx_get_registers(CPUState *cpu) { struct whpx_state *whpx =3D &whpx_global; AccelCPUState *vcpu =3D cpu->accel; @@ -934,7 +917,7 @@ static int whpx_handle_portio(CPUState *cpu, * The 'exceptions' argument accepts a bitmask, e.g: * (1 << WHvX64ExceptionTypeDebugTrapOrFault) | (...) */ -static HRESULT whpx_set_exception_exit_bitmap(UINT64 exceptions) +HRESULT whpx_set_exception_exit_bitmap(UINT64 exceptions) { struct whpx_state *whpx =3D &whpx_global; WHV_PARTITION_PROPERTY prop =3D { 0, }; @@ -1084,23 +1067,6 @@ static HRESULT whpx_vcpu_configure_single_stepping(C= PUState *cpu, return S_OK; } =20 -/* Tries to find a breakpoint at the specified address. */ -static struct whpx_breakpoint *whpx_lookup_breakpoint_by_addr(uint64_t add= ress) -{ - struct whpx_state *whpx =3D &whpx_global; - int i; - - if (whpx->breakpoints.breakpoints) { - for (i =3D 0; i < whpx->breakpoints.breakpoints->used; i++) { - if (address =3D=3D whpx->breakpoints.breakpoints->data[i].addr= ess) { - return &whpx->breakpoints.breakpoints->data[i]; - } - } - } - - return NULL; -} - /* * Linux uses int3 (0xCC) during startup (see int3_selftest()) and for * debugging user-mode applications. Since the WHPX API does not offer @@ -1136,7 +1102,7 @@ static const uint8_t whpx_breakpoint_instruction =3D = 0xF1; * memory, but doesn't actually do it. The memory accessing is done in * whpx_apply_breakpoints(). */ -static void whpx_translate_cpu_breakpoints( +void whpx_translate_cpu_breakpoints( struct whpx_breakpoints *breakpoints, CPUState *cpu, int cpu_breakpoint_count) @@ -1230,7 +1196,7 @@ static void whpx_translate_cpu_breakpoints( * Passing resuming=3Dtrue will try to set all previously unset breakpoin= ts. * Passing resuming=3Dfalse will remove all inserted ones. */ -static void whpx_apply_breakpoints( +void whpx_apply_breakpoints( struct whpx_breakpoint_collection *breakpoints, CPUState *cpu, bool resuming) @@ -1306,93 +1272,6 @@ static void whpx_apply_breakpoints( } } =20 -/* - * This function is called when the a VCPU is about to start and no other - * VCPUs have been started so far. Since the VCPU start order could be - * arbitrary, it doesn't have to be VCPU#0. - * - * It is used to commit the breakpoints into memory, and configure WHPX - * to intercept debug exceptions. - * - * Note that whpx_set_exception_exit_bitmap() cannot be called if one or - * more VCPUs are already running, so this is the best place to do it. - */ -static int whpx_first_vcpu_starting(CPUState *cpu) -{ - struct whpx_state *whpx =3D &whpx_global; - HRESULT hr; - - g_assert(bql_locked()); - - if (!QTAILQ_EMPTY(&cpu->breakpoints) || - (whpx->breakpoints.breakpoints && - whpx->breakpoints.breakpoints->used)) { - CPUBreakpoint *bp; - int i =3D 0; - bool update_pending =3D false; - - QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) { - if (i >=3D whpx->breakpoints.original_address_count || - bp->pc !=3D whpx->breakpoints.original_addresses[i]) { - update_pending =3D true; - } - - i++; - } - - if (i !=3D whpx->breakpoints.original_address_count) { - update_pending =3D true; - } - - if (update_pending) { - /* - * The CPU breakpoints have changed since the last call to - * whpx_translate_cpu_breakpoints(). WHPX breakpoints must - * now be recomputed. - */ - whpx_translate_cpu_breakpoints(&whpx->breakpoints, cpu, i); - } - - /* Actually insert the breakpoints into the memory. */ - whpx_apply_breakpoints(whpx->breakpoints.breakpoints, cpu, true); - } - - uint64_t exception_mask; - if (whpx->step_pending || - (whpx->breakpoints.breakpoints && - whpx->breakpoints.breakpoints->used)) { - /* - * We are either attempting to single-step one or more CPUs, or - * have one or more breakpoints enabled. Both require intercepting - * the WHvX64ExceptionTypeBreakpointTrap exception. - */ - - exception_mask =3D 1UL << WHvX64ExceptionTypeDebugTrapOrFault; - } else { - /* Let the guest handle all exceptions. */ - exception_mask =3D 0; - } - - hr =3D whpx_set_exception_exit_bitmap(exception_mask); - if (!SUCCEEDED(hr)) { - error_report("WHPX: Failed to update exception exit mask," - "hr=3D%08lx.", hr); - return 1; - } - - return 0; -} - -/* - * This function is called when the last VCPU has finished running. - * It is used to remove any previously set breakpoints from memory. - */ -static int whpx_last_vcpu_stopping(CPUState *cpu) -{ - whpx_apply_breakpoints(whpx_global.breakpoints.breakpoints, cpu, false= ); - return 0; -} - /* Returns the address of the next instruction that is about to be execute= d. */ static vaddr whpx_vcpu_get_pc(CPUState *cpu, bool exit_context_valid) { @@ -1634,7 +1513,7 @@ static void whpx_vcpu_process_async_events(CPUState *= cpu) } } =20 -static int whpx_vcpu_run(CPUState *cpu) +int whpx_vcpu_run(CPUState *cpu) { HRESULT hr; struct whpx_state *whpx =3D &whpx_global; @@ -2057,65 +1936,6 @@ static int whpx_vcpu_run(CPUState *cpu) return ret < 0; } =20 -static void do_whpx_cpu_synchronize_state(CPUState *cpu, run_on_cpu_data a= rg) -{ - if (!cpu->vcpu_dirty) { - whpx_get_registers(cpu); - cpu->vcpu_dirty =3D true; - } -} - -static void do_whpx_cpu_synchronize_post_reset(CPUState *cpu, - run_on_cpu_data arg) -{ - whpx_set_registers(cpu, WHPX_SET_RESET_STATE); - cpu->vcpu_dirty =3D false; -} - -static void do_whpx_cpu_synchronize_post_init(CPUState *cpu, - run_on_cpu_data arg) -{ - whpx_set_registers(cpu, WHPX_SET_FULL_STATE); - cpu->vcpu_dirty =3D false; -} - -static void do_whpx_cpu_synchronize_pre_loadvm(CPUState *cpu, - run_on_cpu_data arg) -{ - cpu->vcpu_dirty =3D true; -} - -/* - * CPU support. - */ - -void whpx_cpu_synchronize_state(CPUState *cpu) -{ - if (!cpu->vcpu_dirty) { - run_on_cpu(cpu, do_whpx_cpu_synchronize_state, RUN_ON_CPU_NULL); - } -} - -void whpx_cpu_synchronize_post_reset(CPUState *cpu) -{ - run_on_cpu(cpu, do_whpx_cpu_synchronize_post_reset, RUN_ON_CPU_NULL); -} - -void whpx_cpu_synchronize_post_init(CPUState *cpu) -{ - run_on_cpu(cpu, do_whpx_cpu_synchronize_post_init, RUN_ON_CPU_NULL); -} - -void whpx_cpu_synchronize_pre_loadvm(CPUState *cpu) -{ - run_on_cpu(cpu, do_whpx_cpu_synchronize_pre_loadvm, RUN_ON_CPU_NULL); -} - -static void whpx_pre_resume_vm(AccelState *as, bool step_pending) -{ - whpx_global.step_pending =3D step_pending; -} - /* * Vcpu support. */ @@ -2244,295 +2064,18 @@ error: return ret; } =20 -int whpx_vcpu_exec(CPUState *cpu) -{ - int ret; - int fatal; - - for (;;) { - if (cpu->exception_index >=3D EXCP_INTERRUPT) { - ret =3D cpu->exception_index; - cpu->exception_index =3D -1; - break; - } - - fatal =3D whpx_vcpu_run(cpu); - - if (fatal) { - error_report("WHPX: Failed to exec a virtual processor"); - abort(); - } - } - - return ret; -} - -void whpx_destroy_vcpu(CPUState *cpu) -{ - struct whpx_state *whpx =3D &whpx_global; - AccelCPUState *vcpu =3D cpu->accel; - - whp_dispatch.WHvDeleteVirtualProcessor(whpx->partition, cpu->cpu_index= ); - whp_dispatch.WHvEmulatorDestroyEmulator(vcpu->emulator); - g_free(cpu->accel); -} - -void whpx_vcpu_kick(CPUState *cpu) -{ - struct whpx_state *whpx =3D &whpx_global; - whp_dispatch.WHvCancelRunVirtualProcessor( - whpx->partition, cpu->cpu_index, 0); -} - -/* - * Memory support. - */ - -static void whpx_update_mapping(hwaddr start_pa, ram_addr_t size, - void *host_va, int add, int rom, - const char *name) -{ - struct whpx_state *whpx =3D &whpx_global; - HRESULT hr; - - /* - if (add) { - printf("WHPX: ADD PA:%p Size:%p, Host:%p, %s, '%s'\n", - (void*)start_pa, (void*)size, host_va, - (rom ? "ROM" : "RAM"), name); - } else { - printf("WHPX: DEL PA:%p Size:%p, Host:%p, '%s'\n", - (void*)start_pa, (void*)size, host_va, name); - } - */ - - if (add) { - hr =3D whp_dispatch.WHvMapGpaRange(whpx->partition, - host_va, - start_pa, - size, - (WHvMapGpaRangeFlagRead | - WHvMapGpaRangeFlagExecute | - (rom ? 0 : WHvMapGpaRangeFlagWri= te))); - } else { - hr =3D whp_dispatch.WHvUnmapGpaRange(whpx->partition, - start_pa, - size); - } - - if (FAILED(hr)) { - error_report("WHPX: Failed to %s GPA range '%s' PA:%p, Size:%p byt= es," - " Host:%p, hr=3D%08lx", - (add ? "MAP" : "UNMAP"), name, - (void *)(uintptr_t)start_pa, (void *)size, host_va, h= r); - } -} - -static void whpx_process_section(MemoryRegionSection *section, int add) -{ - MemoryRegion *mr =3D section->mr; - hwaddr start_pa =3D section->offset_within_address_space; - ram_addr_t size =3D int128_get64(section->size); - unsigned int delta; - uint64_t host_va; - - if (!memory_region_is_ram(mr)) { - return; - } - - delta =3D qemu_real_host_page_size() - (start_pa & ~qemu_real_host_pag= e_mask()); - delta &=3D ~qemu_real_host_page_mask(); - if (delta > size) { - return; - } - start_pa +=3D delta; - size -=3D delta; - size &=3D qemu_real_host_page_mask(); - if (!size || (start_pa & ~qemu_real_host_page_mask())) { - return; - } - - host_va =3D (uintptr_t)memory_region_get_ram_ptr(mr) - + section->offset_within_region + delta; - - whpx_update_mapping(start_pa, size, (void *)(uintptr_t)host_va, add, - memory_region_is_rom(mr), mr->name); -} - -static void whpx_region_add(MemoryListener *listener, - MemoryRegionSection *section) -{ - memory_region_ref(section->mr); - whpx_process_section(section, 1); -} - -static void whpx_region_del(MemoryListener *listener, - MemoryRegionSection *section) -{ - whpx_process_section(section, 0); - memory_region_unref(section->mr); -} - -static void whpx_transaction_begin(MemoryListener *listener) -{ -} - -static void whpx_transaction_commit(MemoryListener *listener) -{ -} - -static void whpx_log_sync(MemoryListener *listener, - MemoryRegionSection *section) -{ - MemoryRegion *mr =3D section->mr; - - if (!memory_region_is_ram(mr)) { - return; - } - - memory_region_set_dirty(mr, 0, int128_get64(section->size)); -} - -static MemoryListener whpx_memory_listener =3D { - .name =3D "whpx", - .begin =3D whpx_transaction_begin, - .commit =3D whpx_transaction_commit, - .region_add =3D whpx_region_add, - .region_del =3D whpx_region_del, - .log_sync =3D whpx_log_sync, - .priority =3D MEMORY_LISTENER_PRIORITY_ACCEL, -}; - -static void whpx_memory_init(void) -{ - memory_listener_register(&whpx_memory_listener, &address_space_memory); -} - -/* - * Load the functions from the given library, using the given handle. If a - * handle is provided, it is used, otherwise the library is opened. The - * handle will be updated on return with the opened one. - */ -static bool load_whp_dispatch_fns(HMODULE *handle, - WHPFunctionList function_list) -{ - HMODULE hLib =3D *handle; - - #define WINHV_PLATFORM_DLL "WinHvPlatform.dll" - #define WINHV_EMULATION_DLL "WinHvEmulation.dll" - #define WHP_LOAD_FIELD_OPTIONAL(return_type, function_name, signature)= \ - whp_dispatch.function_name =3D \ - (function_name ## _t)GetProcAddress(hLib, #function_name); \ - - #define WHP_LOAD_FIELD(return_type, function_name, signature) \ - whp_dispatch.function_name =3D \ - (function_name ## _t)GetProcAddress(hLib, #function_name); \ - if (!whp_dispatch.function_name) { \ - error_report("Could not load function %s", #function_name); \ - goto error; \ - } \ - - #define WHP_LOAD_LIB(lib_name, handle_lib) \ - if (!handle_lib) { \ - handle_lib =3D LoadLibrary(lib_name); \ - if (!handle_lib) { \ - error_report("Could not load library %s.", lib_name); \ - goto error; \ - } \ - } \ - - switch (function_list) { - case WINHV_PLATFORM_FNS_DEFAULT: - WHP_LOAD_LIB(WINHV_PLATFORM_DLL, hLib) - LIST_WINHVPLATFORM_FUNCTIONS(WHP_LOAD_FIELD) - break; - - case WINHV_EMULATION_FNS_DEFAULT: - WHP_LOAD_LIB(WINHV_EMULATION_DLL, hLib) - LIST_WINHVEMULATION_FUNCTIONS(WHP_LOAD_FIELD) - break; - - case WINHV_PLATFORM_FNS_SUPPLEMENTAL: - WHP_LOAD_LIB(WINHV_PLATFORM_DLL, hLib) - LIST_WINHVPLATFORM_FUNCTIONS_SUPPLEMENTAL(WHP_LOAD_FIELD_OPTIONAL) - break; - } - - *handle =3D hLib; - return true; - -error: - if (hLib) { - FreeLibrary(hLib); - } - - return false; -} - -static void whpx_set_kernel_irqchip(Object *obj, Visitor *v, - const char *name, void *opaque, - Error **errp) -{ - struct whpx_state *whpx =3D &whpx_global; - OnOffSplit mode; - - if (!visit_type_OnOffSplit(v, name, &mode, errp)) { - return; - } - - switch (mode) { - case ON_OFF_SPLIT_ON: - whpx->kernel_irqchip_allowed =3D true; - whpx->kernel_irqchip_required =3D true; - break; - - case ON_OFF_SPLIT_OFF: - whpx->kernel_irqchip_allowed =3D false; - whpx->kernel_irqchip_required =3D false; - break; - - case ON_OFF_SPLIT_SPLIT: - error_setg(errp, "WHPX: split irqchip currently not supported"); - error_append_hint(errp, - "Try without kernel-irqchip or with kernel-irqchip=3Don|off"); - break; - - default: - /* - * The value was checked in visit_type_OnOffSplit() above. If - * we get here, then something is wrong in QEMU. - */ - abort(); - } -} - -static void whpx_cpu_instance_init(CPUState *cs) +void whpx_cpu_instance_init(CPUState *cs) { X86CPU *cpu =3D X86_CPU(cs); =20 host_cpu_instance_init(cpu); } =20 -static void whpx_cpu_accel_class_init(ObjectClass *oc, const void *data) -{ - AccelCPUClass *acc =3D ACCEL_CPU_CLASS(oc); - - acc->cpu_instance_init =3D whpx_cpu_instance_init; -} - -static const TypeInfo whpx_cpu_accel_type =3D { - .name =3D ACCEL_CPU_NAME("whpx"), - - .parent =3D TYPE_ACCEL_CPU, - .class_init =3D whpx_cpu_accel_class_init, - .abstract =3D true, -}; - /* * Partition support */ =20 -static int whpx_accel_init(AccelState *as, MachineState *ms) +int whpx_accel_init(AccelState *as, MachineState *ms) { struct whpx_state *whpx; int ret; @@ -2715,77 +2258,3 @@ error: =20 return ret; } - -bool whpx_apic_in_platform(void) { - return whpx_global.apic_in_platform; -} - -static void whpx_accel_class_init(ObjectClass *oc, const void *data) -{ - AccelClass *ac =3D ACCEL_CLASS(oc); - ac->name =3D "WHPX"; - ac->init_machine =3D whpx_accel_init; - ac->pre_resume_vm =3D whpx_pre_resume_vm; - ac->allowed =3D &whpx_allowed; - - object_class_property_add(oc, "kernel-irqchip", "on|off|split", - NULL, whpx_set_kernel_irqchip, - NULL, NULL); - object_class_property_set_description(oc, "kernel-irqchip", - "Configure WHPX in-kernel irqchip"); -} - -static void whpx_accel_instance_init(Object *obj) -{ - struct whpx_state *whpx =3D &whpx_global; - - memset(whpx, 0, sizeof(struct whpx_state)); - /* Turn on kernel-irqchip, by default */ - whpx->kernel_irqchip_allowed =3D true; -} - -static const TypeInfo whpx_accel_type =3D { - .name =3D ACCEL_CLASS_NAME("whpx"), - .parent =3D TYPE_ACCEL, - .instance_init =3D whpx_accel_instance_init, - .class_init =3D whpx_accel_class_init, -}; - -static void whpx_type_init(void) -{ - type_register_static(&whpx_accel_type); - type_register_static(&whpx_cpu_accel_type); -} - -bool init_whp_dispatch(void) -{ - if (whp_dispatch_initialized) { - return true; - } - - if (!load_whp_dispatch_fns(&hWinHvPlatform, WINHV_PLATFORM_FNS_DEFAULT= )) { - goto error; - } - - if (!load_whp_dispatch_fns(&hWinHvEmulation, WINHV_EMULATION_FNS_DEFAU= LT)) { - goto error; - } - - assert(load_whp_dispatch_fns(&hWinHvPlatform, - WINHV_PLATFORM_FNS_SUPPLEMENTAL)); - whp_dispatch_initialized =3D true; - - return true; -error: - if (hWinHvPlatform) { - FreeLibrary(hWinHvPlatform); - } - - if (hWinHvEmulation) { - FreeLibrary(hWinHvEmulation); - } - - return false; -} - -type_init(whpx_type_init); --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1769539034; cv=none; d=zohomail.com; s=zohoarc; b=HuhYZzUEl5xHcRGjuOa6gLWMf+rWYI1zuBrRIbq0Ac01lLYtMb2eG6tCdivYacvtEfE1JKq0nuJdq6MWC157imj3wt9Vs5Cd/H2IoeR3O0mNAMZHWInh+ZhpUVB9vD8c5ComPMth7MrQs490dHzz1oC5Vi+oYqj9Iec65gAp3tM= ARC-Message-Signature: i=1; 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Tsirkin" , Roman Bolshakov , qemu-arm@nongnu.org, Ani Sinha , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Akihiko Odaki , Marcel Apfelbaum , Pedro Barbuda , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Shannon Zhao , Igor Mammedov , Cameron Esfahani , Alexander Graf , Peter Maydell , Eduardo Habkost , Phil Dennis-Jordan , Pierrick Bouvier Subject: [PATCH v18 10/22] whpx: ifdef out winhvemulation on non-x86_64 Date: Tue, 27 Jan 2026 19:27:50 +0100 Message-ID: <20260127182805.73212-11-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260127182805.73212-1-mohamed@unpredictable.fr> References: <20260127182805.73212-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Authority-Info-Out: v=2.4 cv=Uu5u9uwB c=1 sm=1 tr=0 ts=697903ee cx=c_apl:c_apl_out:c_pps a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=VExx-Oqz_yhFp4n2Ql0A:9 a=0bXxn9q0MV6snEgNplNhOjQmxlI=:19 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: c_IOwPH681dqh3heLjUWcmMQsAl76s4B X-Proofpoint-ORIG-GUID: c_IOwPH681dqh3heLjUWcmMQsAl76s4B X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDE1MCBTYWx0ZWRfXyrJ0SJiMHvFm KGbKzze4zjVzsxYSlhEuyrCOR0goETzzeZ74757lCcZX3vRsOcQI55kcgJmLmq95z0yaKdsiS+q SrAX7V2bWjRuIM5xHKQ0Sv+iXDQrcW4I1O9PFI82EaKBkObfZ6dAsv2UDwQDC8xsg8yiEXcSaFS wXn0MPu45c167JH8AGRT0darl4SnmdohTQ0tQEsW0B2o42IDHsie7JgnINPxvZU08L7pbHjIfP4 zTlMTeewNHKYtGvV+/rQTx2/kfGkfXS4vz5XvwfkK7WWHWD49D9OAGYogAPLWkg7/jRaqxHP7+k ztDrwaqvOjpD+WVZjYwmbo+iHclrViekTbM4PUf6TskYDY9447qHmh9Vx/tkCo= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_04,2026-01-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 clxscore=1030 bulkscore=0 phishscore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 malwarescore=0 suspectscore=0 mlxlogscore=983 adultscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601270150 X-JNJ: AAAAAAABtvzkqx6fXaizTSF+70wv5zSExgcgsPxSVD6ANBkOpY9K3HvfEYzZalb/sV9UWhdEimeiPFwLPUc0sTd0gtgcBezW6H6cwZ2HQsdnLOYMUOlJt1NviUWQFH84/8agMmoznDhdxgTuDcPFTBq3oC5Oc+mELylFtY8Ha1CZwSNlJ+apm05dA7tshRGKi7dh96x9CTKLs9E11/8nM/Y3OrRUStKk5908TaOZN5NnRnbROdn8oB+rnhzshi9rKDYEABQImXUWOOxi1HKscyv/SxTdhksSUE6NDU/nCKRmw60RLl6AvB2hn4Dh1dE3X+nn3QxVyDCVlyIP2EbdCvp/uHBEJwdPIF1/UYodZMrHwMHjIlRC2XRkBGHmiGWV5AZYBvnRVcLJ4us+EKXjGOi83hmowecvZhUUumdqEHgEYNOM+o4UWs39bhG39rqvS1oUUcXD8/U0pqWHxvTmXaLDjNn9CQPajxm5V7giuADADvfVGFa8TCX+JKQiFSUvAKoAsRE3tEAo3kOnI4fMoTWN+X7FoUgp0FTUK15tmn9x3OKpgpGPGD6dpLWBFzkV/7fYzomaDQFoIhbrGsrZN6rzTB/ZPg1L0/5YpJnnYGLUBSGfypmiRvkC0TVQ/NJQ+zXCxZHcJZOKf0k66qEMjDo3VA/t/c/lkGWf2PzhjsJdK9xxtntYZ3XPyU+tRZv9+/p0Cr2c7c7vFedBH8OAb9WeFxkSDBY4xXv6Xo1q1lTzWe763lUXyaoLclbBSRunPwv+AJ+Dd2sTA8MwWpfZDlH+NqyI1QXsKhsjiszDOpVR/4VOuHS6OccFvPqFiftQhThC5zk+JVeIl8dW9UHx16e50oZTMJMfZA+SNCl2iAA3PwZEr2tbJvsexVjYHCgB5WgmIM2M5mLU+eOJ7//Pm7ZTbpljOqL2+N6kJylFtiXEB+gJsYAdcUU= Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.68.64; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769539036685154100 winhvemulation is x86_64 only. In the future, we might want to get rid of winhvemulation usage entirely. Signed-off-by: Mohamed Mediouni Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- accel/whpx/whpx-common.c | 14 ++++++++++++-- include/system/whpx-common.h | 2 ++ include/system/whpx-internal.h | 7 ++++++- 3 files changed, 20 insertions(+), 3 deletions(-) diff --git a/accel/whpx/whpx-common.c b/accel/whpx/whpx-common.c index 0a6068fdde..c58344cb61 100644 --- a/accel/whpx/whpx-common.c +++ b/accel/whpx/whpx-common.c @@ -37,7 +37,9 @@ bool whpx_allowed; static bool whp_dispatch_initialized; static HMODULE hWinHvPlatform; +#ifdef HOST_X86_64 static HMODULE hWinHvEmulation; +#endif =20 struct whpx_state whpx_global; struct WHPDispatch whp_dispatch; @@ -232,8 +234,10 @@ void whpx_destroy_vcpu(CPUState *cpu) struct whpx_state *whpx =3D &whpx_global; =20 whp_dispatch.WHvDeleteVirtualProcessor(whpx->partition, cpu->cpu_index= ); +#ifdef HOST_X86_64 AccelCPUState *vcpu =3D cpu->accel; whp_dispatch.WHvEmulatorDestroyEmulator(vcpu->emulator); +#endif g_free(cpu->accel); } =20 @@ -408,8 +412,12 @@ static bool load_whp_dispatch_fns(HMODULE *handle, LIST_WINHVPLATFORM_FUNCTIONS(WHP_LOAD_FIELD) break; case WINHV_EMULATION_FNS_DEFAULT: +#ifdef HOST_X86_64 WHP_LOAD_LIB(WINHV_EMULATION_DLL, hLib) LIST_WINHVEMULATION_FUNCTIONS(WHP_LOAD_FIELD) +#else + g_assert_not_reached(); +#endif break; case WINHV_PLATFORM_FNS_SUPPLEMENTAL: WHP_LOAD_LIB(WINHV_PLATFORM_DLL, hLib) @@ -535,11 +543,11 @@ bool init_whp_dispatch(void) if (!load_whp_dispatch_fns(&hWinHvPlatform, WINHV_PLATFORM_FNS_DEFAULT= )) { goto error; } - +#ifdef HOST_X86_64 if (!load_whp_dispatch_fns(&hWinHvEmulation, WINHV_EMULATION_FNS_DEFAU= LT)) { goto error; } - +#endif assert(load_whp_dispatch_fns(&hWinHvPlatform, WINHV_PLATFORM_FNS_SUPPLEMENTAL)); whp_dispatch_initialized =3D true; @@ -549,9 +557,11 @@ error: if (hWinHvPlatform) { FreeLibrary(hWinHvPlatform); } +#ifdef HOST_X86_64 if (hWinHvEmulation) { FreeLibrary(hWinHvEmulation); } +#endif return false; } =20 diff --git a/include/system/whpx-common.h b/include/system/whpx-common.h index e549c7539c..8f171d1397 100644 --- a/include/system/whpx-common.h +++ b/include/system/whpx-common.h @@ -3,7 +3,9 @@ #define SYSTEM_WHPX_COMMON_H =20 struct AccelCPUState { +#ifdef HOST_X86_64 WHV_EMULATOR_HANDLE emulator; +#endif bool window_registered; bool interruptable; bool ready_for_pic_interrupt; diff --git a/include/system/whpx-internal.h b/include/system/whpx-internal.h index 041fa958b4..609d0e1c08 100644 --- a/include/system/whpx-internal.h +++ b/include/system/whpx-internal.h @@ -4,8 +4,9 @@ =20 #include #include +#ifdef HOST_X86_64 #include - +#endif #include "hw/i386/apic.h" #include "exec/vaddr.h" =20 @@ -101,12 +102,16 @@ void whpx_apic_get(APICCommonState *s); =20 /* Define function typedef */ LIST_WINHVPLATFORM_FUNCTIONS(WHP_DEFINE_TYPE) +#ifdef HOST_X86_64 LIST_WINHVEMULATION_FUNCTIONS(WHP_DEFINE_TYPE) +#endif LIST_WINHVPLATFORM_FUNCTIONS_SUPPLEMENTAL(WHP_DEFINE_TYPE) =20 struct WHPDispatch { LIST_WINHVPLATFORM_FUNCTIONS(WHP_DECLARE_MEMBER) +#ifdef HOST_X86_64 LIST_WINHVEMULATION_FUNCTIONS(WHP_DECLARE_MEMBER) +#endif LIST_WINHVPLATFORM_FUNCTIONS_SUPPLEMENTAL(WHP_DECLARE_MEMBER) }; =20 --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Tue, 27 Jan 2026 13:29:12 -0500 Received: from outbound.mr.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPS id E61C91800260; Tue, 27 Jan 2026 18:29:04 +0000 (UTC) Received: from localhost.localdomain (unknown [17.57.152.38]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPSA id 08DD018001E9; Tue, 27 Jan 2026 18:28:59 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; t=1769538548; x=1772130548; bh=c9xkU5JKUppgK3M6NvIGvHRbHv9MZvro5B1lYG+DJ2Y=; h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme; b=Ze6I/zai4Bwt3qsbWrUfDuoMM6GlFK0jBQG4pahZEA2G3Mg52h9hHy9L0EON4ike1qFM5lTxNYWHFkzguaUg2nanvwfruwenaAhqZ+AB1qqONIbIwiXrzZe80eHmSvORptSpOIGSi4yElC4WO02i6h/QHIbdn2coEfx3IiwNwtFTW5UExlOlg32FZG+6q6YY/Ysl2m3jddcIf+hBP8S2iC+85LjOMOAhVSR33GPzkmWBN6SAd0NMZ7LchJSKrIjdYHFtgmr/KGHiPMcAq6T1uDKsrl888qEf0mUoOnxRXcBj3RsFT0fHa+vWKonsIKbOGSpke1yQeCXAX+E7L5ftMw== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org, mohamed@unpredictable.fr Cc: Zhao Liu , "Michael S. Tsirkin" , Roman Bolshakov , qemu-arm@nongnu.org, Ani Sinha , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Akihiko Odaki , Marcel Apfelbaum , Pedro Barbuda , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Shannon Zhao , Igor Mammedov , Cameron Esfahani , Alexander Graf , Peter Maydell , Eduardo Habkost , Phil Dennis-Jordan , Pierrick Bouvier Subject: [PATCH v18 11/22] whpx: common: add WHPX_INTERCEPT_DEBUG_TRAPS define Date: Tue, 27 Jan 2026 19:27:51 +0100 Message-ID: <20260127182805.73212-12-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260127182805.73212-1-mohamed@unpredictable.fr> References: <20260127182805.73212-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: SCxStP9zBChahjV9Odw3Gm95lp8Zg2QL X-Authority-Info-Out: v=2.4 cv=GMoF0+NK c=1 sm=1 tr=0 ts=697903f2 cx=c_apl:c_apl_out:c_pps a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=2psWIPzlEfUqwKpUe20A:9 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDE1MCBTYWx0ZWRfX7V0TDuc7PdyO DXBkGJOwhwwi7jw2wM/K41TF0CHXtRgb1MWMUuIPmYuoEDF6TwCnzps2YEmMcZJ3M1ouA/SzLVl oNWM3iK2eYN1wlNykGdo8DOR9rqgbhm41SmTHv7BkyAPGM4ueB0QTt/ryrF/14ex7fxjgxuIqDF x6CezPq0/ZAYRHMkI12Y+fxJv5rnjhimU4OCPgmmVAqlg/MRRQo+Qo3Vrbbj7K9hpMmr4/bSK4g w+Gu+P15VkQrTgfUaKDRkUDOrlEGF/sbl5lVYJE4inyo5OMGTUGda/xZ3hpFdOurL4QWxR3l6M5 aHPULYdM43+bmFNKASvleubY4/BB5IKDn1D3WbypvF3NZKvGWkrtb4MkCQzjp4= X-Proofpoint-ORIG-GUID: SCxStP9zBChahjV9Odw3Gm95lp8Zg2QL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_04,2026-01-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 adultscore=0 bulkscore=0 malwarescore=0 suspectscore=0 phishscore=0 mlxscore=0 mlxlogscore=999 lowpriorityscore=0 clxscore=1030 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601270150 X-JNJ: AAAAAAABSHoa0zhsEjAvfAyCkkdwAJfPeiM1ISFshHZx0HGPmBvo2gT7kfqNDCKJmvpOjTTSakqL9OgGXMUCg222ombx+OMeNkFf41mZHfoxl6f9RLYc8OOZeJ36AHc2Y8b7e3tSU3TTv77XCjaMWhjvlUKYGEOd5IRUybl30VZnVlO3F+cyOeAXDQgXmvbiFwJFIe+d0SAcV1mvv5gCye1hhtSl3yS1kePeJ3CsB7L71iR1HfoJ59yHFBAKDiCHM1e9iMDu9o1jIYDWNR3wLEhUKfLKDfItoeJRFdzkcYhxkKPGyUa35RkGGfHVml9NzYcv4oBIvho/BcPDfgkJVdKzBMdS/HxVxcABhaZf9h38HLlvGPw6ICw9GJwzVw4qBS7qZ6KN+IqljrfdwQwadXwaGIhCAQ4gTR42oZqujKx3xxCks+yOggAUf1qdusqa+rtMOVmfRZGURoP/juElH+LYzsmPhR/QTcgOMPpu2JZTr+xLOFa17xe1Jq38VtI+3D7f7m2GROXKNYUimsMnspHQOYxbtWgWFWEb9kMWjZ3XCcpOBUEC5FbgWryAcq3Gl8Gl2rUVK4a/a58lz0rDphYQx+k47cy/4Eld468mg189OR0+lQW0jX+IZ0Kdid2cpLZVf9EcIxSMzpvj0cKBJ0r+VeY9kqefruPISNo3B930L+JZnlL9NfvjvRPoKLQ789bg9TayGVdQslBaT5RyJ5L08/ji+U2BUnv3hnqFCF/kaEpKWeyvvrS9Om+Tp3vjMCruawOqIKtIeQsgt7i280mv2syQhcMeI6AbnwG0QMkBQ9NX3jIg2ir27BNm57gg7iDV2p3+TNHjdABKzkow650zlUvtpt5tpeDyPUHyldlgGXRMJPrNp+K6nl2WfZqy/ogfxkTqc0r0VLWAuX58minakPKmRC6M0mTVLElCETEypK14Uxd4+eX/RIloeCgB/w== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.68.63; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769538743178154100 Content-Type: text/plain; charset="utf-8" As of why: WHPX on arm64 doesn't have debug trap support as of today. Keep the exception bitmap interface for now - despite that being entirely u= navailable on arm64 too. Signed-off-by: Mohamed Mediouni Reviewed-by: Pierrick Bouvier Reviewed-by: Akihiko Odaki --- accel/whpx/whpx-common.c | 2 +- include/system/whpx-common.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/accel/whpx/whpx-common.c b/accel/whpx/whpx-common.c index c58344cb61..c0610815d9 100644 --- a/accel/whpx/whpx-common.c +++ b/accel/whpx/whpx-common.c @@ -119,7 +119,7 @@ int whpx_first_vcpu_starting(CPUState *cpu) * have one or more breakpoints enabled. Both require intercepting * the WHvX64ExceptionTypeBreakpointTrap exception. */ - exception_mask =3D 1UL << WHvX64ExceptionTypeDebugTrapOrFault; + exception_mask =3D 1UL << WHPX_INTERCEPT_DEBUG_TRAPS; } else { /* Let the guest handle all exceptions. */ exception_mask =3D 0; diff --git a/include/system/whpx-common.h b/include/system/whpx-common.h index 8f171d1397..b86fe9db6e 100644 --- a/include/system/whpx-common.h +++ b/include/system/whpx-common.h @@ -20,4 +20,7 @@ int whpx_first_vcpu_starting(CPUState *cpu); int whpx_last_vcpu_stopping(CPUState *cpu); void whpx_memory_init(void); struct whpx_breakpoint *whpx_lookup_breakpoint_by_addr(uint64_t address); + +/* On x64: same as WHvX64ExceptionTypeDebugTrapOrFault */ +#define WHPX_INTERCEPT_DEBUG_TRAPS 1 #endif --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1769538852; cv=none; d=zohomail.com; s=zohoarc; b=bSc7p4ZSy04w+vi958R2xQp51gM0Kb8ArFc+Twmelhxz5KXnpV2pGhBf+a+NWI0s6iFHN4xiYbA6E9FymctlLQh0HcDpNpYNqsVjxuZkaYCoH9NkghWv3/EMYUYJKmG3mz90hrDFuGYFu73GDYUdIpqjB171+PMYfhqGNpP9cpU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769538852; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=JwG09taZNQZEUrnety/DLmIDMJ9+cgWSAONaI1A1Ms0=; b=U4Ux6Orv3mpMHAOjAA3J3dDi96bWU5HyYWb4v+Vad2RhHGyoqopDywk+hW/hlr1XALB+5l696OH5ew1TyNpcYt9BA35U+lrvuoaz0RCmmAF7o8IS6WS9IOI1KCICt5In+d9Lyl+JeN+DxcuKPG3nKbuEQr1gWXGE6BOI9VWZ3mI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769538852166448.62936251317797; Tue, 27 Jan 2026 10:34:12 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vknrG-0000P6-QK; Tue, 27 Jan 2026 13:32:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknoT-00023l-V9 for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:29:28 -0500 Received: from p-west2-cluster1-host10-snip4-2.eps.apple.com ([57.103.68.115] helo=outbound.mr.icloud.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknoO-0003Z8-02 for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:29:14 -0500 Received: from outbound.mr.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPS id 32DAF1800976; Tue, 27 Jan 2026 18:29:09 +0000 (UTC) Received: from localhost.localdomain (unknown [17.57.152.38]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPSA id A3FA818001F3; Tue, 27 Jan 2026 18:29:04 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; t=1769538550; x=1772130550; bh=JwG09taZNQZEUrnety/DLmIDMJ9+cgWSAONaI1A1Ms0=; h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme; b=apMJ4OgBp0pPlToolbld4otBiTSjPqaQPpSr4q9uO/sOryz4CLbTGDyMJQ+AD1b6TTv1sofVaPPeyJmL7L60cLX1m3autNSAunUL99L0hT3K06mVKsIvhHo7Rb/wwbObnLAuS0mZMTVUR0myWeFOngekOFs4Y+Q6Hys4D3DcY69wm30SMdrCDyXGMjBFo5naUHYdJ/b2QxFT/F6M+bAn6bZdNd+QXTbo4a3AAQ6vYWh/tZUaYN6+oNCOLnllCXjeCubNqVKmeNfYwhPOHkMR2Qy3qSbl7pZ6WnY48BZxxPBkQqrWfzSEimJCrX5B1zWWXb/UkOAsGojtjXqMDwPxLA== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org, mohamed@unpredictable.fr Cc: Zhao Liu , "Michael S. Tsirkin" , Roman Bolshakov , qemu-arm@nongnu.org, Ani Sinha , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Akihiko Odaki , Marcel Apfelbaum , Pedro Barbuda , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Shannon Zhao , Igor Mammedov , Cameron Esfahani , Alexander Graf , Peter Maydell , Eduardo Habkost , Phil Dennis-Jordan , Pierrick Bouvier Subject: [PATCH v18 12/22] hw, target, accel: whpx: change apic_in_platform to kernel_irqchip Date: Tue, 27 Jan 2026 19:27:52 +0100 Message-ID: <20260127182805.73212-13-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260127182805.73212-1-mohamed@unpredictable.fr> References: <20260127182805.73212-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: XNegB6ph5to70T-XubxwHGfp8FyvWp3- X-Authority-Info-Out: v=2.4 cv=R64O2NRX c=1 sm=1 tr=0 ts=697903f6 cx=c_apl:c_apl_out:c_pps a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=ogbMO5OAvhA2mBZm2BUA:9 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDE1MCBTYWx0ZWRfXxswbTRWTY9ip P2GBP6jHamvQIc2QZOZ0qITqnIFC5hnOpHLbiReWCV2HqxqVPrjVTOZL3EyoKwcaXnT7yD0dwi2 /fOvvdsPbzX5CuDCy0ORnm28Kwkg6cgo9+VeJEsHpIgTs89lbbl6xeH9K+SGjz/soP3NJKkARoR RNLaD72RO6bAdxguRHhKA9u5As5VoTil7JqYSAaVo68MDtfBVyrBfIq2YpVSQhmzAqTq7rz5C4F GesQA7yhvZ9ofjRjUX/WLb1y7GczKy7k+BhUJaWZ/D4SjukGgUjCaaVAY+JMuEl9tPOyNerNd5z vR0HtRsqC3mpO+7JiWI X-Proofpoint-ORIG-GUID: XNegB6ph5to70T-XubxwHGfp8FyvWp3- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_04,2026-01-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 mlxlogscore=999 mlxscore=0 adultscore=0 clxscore=1030 malwarescore=0 bulkscore=0 phishscore=0 suspectscore=0 spamscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2601270150 X-JNJ: AAAAAAABeFiqFHAo0eutcbHHPixflzQTIi482ZoSk7LlaJB/F5E9BFw0GkxlziYpwzaG4B3Zn8Sn08bT+9doWAPBKiCpTKX17BTyw4+/ttQx76zMNcZdivvm4pZfNlm37qmXuBSdi4LZ0jnenN8kdgpt/mRRvtw2Nj7HBuN/Clr9WWuRCq2e3u7Tpd4zGey+Z3JBwCy8XSWIGPnV6HUDD9MaboOQYkbzrqmC5pk/ualbAcSpzRzfVfhtQx1YnGXR05btLx6jJHWaY1u9MGrTKCCMfyqY+Gmu+eHghN+oiIfYEyQbUHflroRoXz01tlUr0C50Qf2CbRXh5a9+87fD4OTye7zhLhtpw6kFP6Vo57b8W0hYg7fSKumzxKR6FcltfarTTzRGy7T9ciSG9Zk+VmEV2QDZMJ5WP4oOqPsnUMcvyjV1g3+YrSFO9EXB+D30rMztis8XyDzrMstoH81BMfK+8+CEqa71xpaC0m9lpou8nP9O9jV0W1rGO9NafylBFqK215GBhwnkZyw0WIpBQtg/Xp0q4iXCJXLpx0Mtpq/0CmhKMdZQ7L1ZnGkat4Q7k+/uk5DdQfagRzqTibh7H6HHe8Ctw1Ih+WIuhfQIdWusvW083LenFigsjJMdHY0CWrEZqEOz7r3+/0y1u7AI0zC8qUGbuiOPuY45VFLADFLvk+Wf5i8wF59ramWXoFjIUXaP/rPUIk+AXLS5sbS8aqQiGtqDAfJ7BYVCxeOjydGrohOXdU/J48AJ3FtY9GUj7DDcFbYfUep84E5emVTqh9UNOt1xxHi1KgQf8nGoN74cS6O89nLvr1qRDfxaNNq1cguTv08HSWCkCXIwtnfJp94K5T/XcCCY7VSRa/mMJanBb6aIOIBALegV8pJkx4wqP6z0FlWiP8ovTK+C2GgqysL0Lv+isrgtNwAFlatmzjzfxgX6yWCOfKne1XL/ Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.68.115; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769538854737154100 Content-Type: text/plain; charset="utf-8" Change terminology to match the KVM one, as APIC is x86-specific. And move out whpx_irqchip_in_kernel() to make it usable from common code even when not compiling with WHPX support. Signed-off-by: Mohamed Mediouni Reviewed-by: Pierrick Bouvier Reviewed-by: Akihiko Odaki --- accel/stubs/whpx-stub.c | 1 + accel/whpx/whpx-accel-ops.c | 2 +- accel/whpx/whpx-common.c | 10 +--------- hw/i386/x86-cpu.c | 4 ++-- include/system/whpx-internal.h | 1 - include/system/whpx.h | 5 +++-- target/i386/cpu-apic.c | 2 +- target/i386/whpx/whpx-all.c | 14 +++++++------- 8 files changed, 16 insertions(+), 23 deletions(-) diff --git a/accel/stubs/whpx-stub.c b/accel/stubs/whpx-stub.c index c564c89fd0..4529dc4f78 100644 --- a/accel/stubs/whpx-stub.c +++ b/accel/stubs/whpx-stub.c @@ -10,3 +10,4 @@ #include "system/whpx.h" =20 bool whpx_allowed; +bool whpx_irqchip_in_kernel; diff --git a/accel/whpx/whpx-accel-ops.c b/accel/whpx/whpx-accel-ops.c index c84a25c273..50fadea0fd 100644 --- a/accel/whpx/whpx-accel-ops.c +++ b/accel/whpx/whpx-accel-ops.c @@ -78,7 +78,7 @@ static void whpx_kick_vcpu_thread(CPUState *cpu) =20 static bool whpx_vcpu_thread_is_idle(CPUState *cpu) { - return !whpx_apic_in_platform(); + return !whpx_irqchip_in_kernel(); } =20 static void whpx_accel_ops_class_init(ObjectClass *oc, const void *data) diff --git a/accel/whpx/whpx-common.c b/accel/whpx/whpx-common.c index c0610815d9..05f9e520b7 100644 --- a/accel/whpx/whpx-common.c +++ b/accel/whpx/whpx-common.c @@ -35,6 +35,7 @@ #include =20 bool whpx_allowed; +bool whpx_irqchip_in_kernel; static bool whp_dispatch_initialized; static HMODULE hWinHvPlatform; #ifdef HOST_X86_64 @@ -488,15 +489,6 @@ static const TypeInfo whpx_cpu_accel_type =3D { .abstract =3D true, }; =20 -/* - * Partition support - */ - -bool whpx_apic_in_platform(void) -{ - return whpx_global.apic_in_platform; -} - static void whpx_accel_class_init(ObjectClass *oc, const void *data) { AccelClass *ac =3D ACCEL_CLASS(oc); diff --git a/hw/i386/x86-cpu.c b/hw/i386/x86-cpu.c index 276f2b0cdf..95e08e3c2a 100644 --- a/hw/i386/x86-cpu.c +++ b/hw/i386/x86-cpu.c @@ -45,7 +45,7 @@ static void pic_irq_request(void *opaque, int irq, int le= vel) =20 trace_x86_pic_interrupt(irq, level); if (cpu_is_apic_enabled(cpu->apic_state) && !kvm_irqchip_in_kernel() && - !whpx_apic_in_platform()) { + !whpx_irqchip_in_kernel()) { CPU_FOREACH(cs) { cpu =3D X86_CPU(cs); if (apic_accept_pic_intr(cpu->apic_state)) { @@ -71,7 +71,7 @@ int cpu_get_pic_interrupt(CPUX86State *env) X86CPU *cpu =3D env_archcpu(env); int intno; =20 - if (!kvm_irqchip_in_kernel() && !whpx_apic_in_platform()) { + if (!kvm_irqchip_in_kernel() && !whpx_irqchip_in_kernel()) { intno =3D apic_get_interrupt(cpu->apic_state); if (intno >=3D 0) { return intno; diff --git a/include/system/whpx-internal.h b/include/system/whpx-internal.h index 609d0e1c08..8ded54a39b 100644 --- a/include/system/whpx-internal.h +++ b/include/system/whpx-internal.h @@ -45,7 +45,6 @@ struct whpx_state { =20 bool kernel_irqchip_allowed; bool kernel_irqchip_required; - bool apic_in_platform; }; =20 extern struct whpx_state whpx_global; diff --git a/include/system/whpx.h b/include/system/whpx.h index 00f6a3e523..4217a27e91 100644 --- a/include/system/whpx.h +++ b/include/system/whpx.h @@ -25,11 +25,12 @@ =20 #ifdef CONFIG_WHPX_IS_POSSIBLE extern bool whpx_allowed; +extern bool whpx_irqchip_in_kernel; #define whpx_enabled() (whpx_allowed) -bool whpx_apic_in_platform(void); +#define whpx_irqchip_in_kernel() (whpx_irqchip_in_kernel) #else /* !CONFIG_WHPX_IS_POSSIBLE */ #define whpx_enabled() 0 -#define whpx_apic_in_platform() (0) +#define whpx_irqchip_in_kernel() (0) #endif /* !CONFIG_WHPX_IS_POSSIBLE */ =20 #endif /* QEMU_WHPX_H */ diff --git a/target/i386/cpu-apic.c b/target/i386/cpu-apic.c index eeee62b52a..50a2b8ae86 100644 --- a/target/i386/cpu-apic.c +++ b/target/i386/cpu-apic.c @@ -32,7 +32,7 @@ APICCommonClass *apic_get_class(Error **errp) apic_type =3D "kvm-apic"; } else if (xen_enabled()) { apic_type =3D "xen-apic"; - } else if (whpx_apic_in_platform()) { + } else if (whpx_irqchip_in_kernel()) { apic_type =3D "whpx-apic"; } =20 diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index 052cda42bf..8210250dc3 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -607,7 +607,7 @@ void whpx_get_registers(CPUState *cpu) hr); } =20 - if (whpx_apic_in_platform()) { + if (whpx_irqchip_in_kernel()) { /* * Fetch the TPR value from the emulated APIC. It may get overwrit= ten * below with the value from CR8 returned by @@ -749,7 +749,7 @@ void whpx_get_registers(CPUState *cpu) =20 assert(idx =3D=3D RTL_NUMBER_OF(whpx_register_names)); =20 - if (whpx_apic_in_platform()) { + if (whpx_irqchip_in_kernel()) { whpx_apic_get(x86_cpu->apic_state); } =20 @@ -1379,7 +1379,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu) } =20 /* Get pending hard interruption or replay one that was overwritten */ - if (!whpx_apic_in_platform()) { + if (!whpx_irqchip_in_kernel()) { if (!vcpu->interruption_pending && vcpu->interruptable && (env->eflags & IF_MASK)) { assert(!new_int.InterruptionPending); @@ -1553,7 +1553,7 @@ int whpx_vcpu_run(CPUState *cpu) =20 if (exclusive_step_mode =3D=3D WHPX_STEP_NONE) { whpx_vcpu_process_async_events(cpu); - if (cpu->halted && !whpx_apic_in_platform()) { + if (cpu->halted && !whpx_irqchip_in_kernel()) { cpu->exception_index =3D EXCP_HLT; qatomic_set(&cpu->exit_request, false); return 0; @@ -1642,7 +1642,7 @@ int whpx_vcpu_run(CPUState *cpu) break; =20 case WHvRunVpExitReasonX64ApicEoi: - assert(whpx_apic_in_platform()); + assert(whpx_irqchip_in_kernel()); ioapic_eoi_broadcast(vcpu->exit_ctx.ApicEoi.InterruptVector); break; =20 @@ -2187,7 +2187,7 @@ int whpx_accel_init(AccelState *as, MachineState *ms) goto error; } } else { - whpx->apic_in_platform =3D true; + whpx_irqchip_in_kernel =3D true; } } =20 @@ -2196,7 +2196,7 @@ int whpx_accel_init(AccelState *as, MachineState *ms) prop.ExtendedVmExits.X64MsrExit =3D 1; prop.ExtendedVmExits.X64CpuidExit =3D 1; prop.ExtendedVmExits.ExceptionExit =3D 1; - if (whpx_apic_in_platform()) { + if (whpx_irqchip_in_kernel()) { prop.ExtendedVmExits.X64ApicInitSipiExitTrap =3D 1; } =20 --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.71.29; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769538913821158500 Content-Type: text/plain; charset="utf-8" Signed-off-by: Mohamed Mediouni Reviewed-by: Peter Maydell --- MAINTAINERS | 1 + hw/arm/virt.c | 10 ++ hw/intc/arm_gicv3_common.c | 3 + hw/intc/arm_gicv3_whpx.c | 237 +++++++++++++++++++++++++++++ hw/intc/meson.build | 1 + include/hw/intc/arm_gicv3_common.h | 3 + 6 files changed, 255 insertions(+) create mode 100644 hw/intc/arm_gicv3_whpx.c diff --git a/MAINTAINERS b/MAINTAINERS index 5a7b955111..d18978a36b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -567,6 +567,7 @@ M: Mohamed Mediouni S: Supported F: accel/whpx/ F: target/i386/whpx/ +F: hw/intc/arm_gicv3_whpx.c F: accel/stubs/whpx-stub.c F: include/system/whpx.h F: include/system/whpx-accel-ops.h diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 3d7f02ce0e..9e989b721b 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -49,6 +49,7 @@ #include "system/tcg.h" #include "system/kvm.h" #include "system/hvf.h" +#include "system/whpx.h" #include "system/qtest.h" #include "system/system.h" #include "hw/core/loader.h" @@ -2110,6 +2111,8 @@ static void finalize_gic_version(VirtMachineState *vm= s) /* KVM w/o kernel irqchip can only deal with GICv2 */ gics_supported |=3D VIRT_GIC_VERSION_2_MASK; accel_name =3D "KVM with kernel-irqchip=3Doff"; + } else if (whpx_enabled()) { + gics_supported |=3D VIRT_GIC_VERSION_3_MASK; } else if (tcg_enabled() || hvf_enabled() || qtest_enabled()) { gics_supported |=3D VIRT_GIC_VERSION_2_MASK; if (module_object_class_by_name("arm-gicv3")) { @@ -2143,6 +2146,9 @@ static void finalize_msi_controller(VirtMachineState = *vms) } } if (vms->msi_controller =3D=3D VIRT_MSI_CTRL_AUTO) { + if (whpx_enabled() && whpx_irqchip_in_kernel()) { + vms->msi_controller =3D VIRT_MSI_CTRL_GICV2M; + } if (vms->gic_version =3D=3D VIRT_GIC_VERSION_2) { vms->msi_controller =3D VIRT_MSI_CTRL_GICV2M; } @@ -2157,6 +2163,10 @@ static void finalize_msi_controller(VirtMachineState= *vms) error_report("GICv2 + ITS is an invalid configuration."); exit(1); } + if (whpx_enabled()) { + error_report("ITS not supported on WHPX."); + exit(1); + } } =20 assert(vms->msi_controller !=3D VIRT_MSI_CTRL_AUTO); diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 0a2e5a3e2f..9054143ea7 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -32,6 +32,7 @@ #include "gicv3_internal.h" #include "hw/arm/linux-boot-if.h" #include "system/kvm.h" +#include "system/whpx.h" =20 =20 static void gicv3_gicd_no_migration_shift_bug_post_load(GICv3State *cs) @@ -663,6 +664,8 @@ const char *gicv3_class_name(void) { if (kvm_irqchip_in_kernel()) { return "kvm-arm-gicv3"; + } else if (whpx_enabled()) { + return TYPE_WHPX_GICV3; } else { if (kvm_enabled()) { error_report("Userspace GICv3 is not supported with KVM"); diff --git a/hw/intc/arm_gicv3_whpx.c b/hw/intc/arm_gicv3_whpx.c new file mode 100644 index 0000000000..849a005242 --- /dev/null +++ b/hw/intc/arm_gicv3_whpx.c @@ -0,0 +1,237 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * ARM Generic Interrupt Controller using HVF platform support + * + * Copyright (c) 2025 Mohamed Mediouni + * Based on vGICv3 KVM code by Pavel Fedin + * + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/intc/arm_gicv3_common.h" +#include "qemu/error-report.h" +#include "qemu/module.h" +#include "system/runstate.h" +#include "system/whpx.h" +#include "system/whpx-internal.h" +#include "gicv3_internal.h" +#include "vgic_common.h" +#include "migration/blocker.h" +#include "qom/object.h" +#include "target/arm/cpregs.h" + +#include "hw/arm/bsa.h" +#include +#include +#include + +struct WHPXARMGICv3Class { + ARMGICv3CommonClass parent_class; + DeviceRealize parent_realize; + ResettablePhases parent_phases; +}; + +OBJECT_DECLARE_TYPE(GICv3State, WHPXARMGICv3Class, WHPX_GICV3) + +/* TODO: Implement GIC state save-restore */ +static void whpx_gicv3_check(GICv3State *s) +{ +} + +static void whpx_gicv3_put(GICv3State *s) +{ + whpx_gicv3_check(s); +} + +static void whpx_gicv3_get(GICv3State *s) +{ +} + +static void whpx_gicv3_set_irq(void *opaque, int irq, int level) +{ + struct whpx_state *whpx =3D &whpx_global; + GICv3State *s =3D opaque; + WHV_INTERRUPT_CONTROL interrupt_control =3D { + .InterruptControl.InterruptType =3D WHvArm64InterruptTypeFixed, + .RequestedVector =3D GIC_INTERNAL + irq, + .InterruptControl.Asserted =3D level + }; + + if (irq > s->num_irq) { + return; + } + + + whp_dispatch.WHvRequestInterrupt(whpx->partition, &interrupt_control, + sizeof(interrupt_control)); +} + +static void whpx_gicv3_icc_reset(CPUARMState *env, const ARMCPRegInfo *ri) +{ + GICv3CPUState *c; + + c =3D env->gicv3state; + + c->icc_pmr_el1 =3D 0; + /* + * Architecturally the reset value of the ICC_BPR registers + * is UNKNOWN. We set them all to 0 here; when the kernel + * uses these values to program the ICH_VMCR_EL2 fields that + * determine the guest-visible ICC_BPR register values, the + * hardware's "writing a value less than the minimum sets + * the field to the minimum value" behaviour will result in + * them effectively resetting to the correct minimum value + * for the host GIC. + */ + c->icc_bpr[GICV3_G0] =3D 0; + c->icc_bpr[GICV3_G1] =3D 0; + c->icc_bpr[GICV3_G1NS] =3D 0; + + c->icc_sre_el1 =3D 0x7; + memset(c->icc_apr, 0, sizeof(c->icc_apr)); + memset(c->icc_igrpen, 0, sizeof(c->icc_igrpen)); +} + +static void whpx_gicv3_reset_hold(Object *obj, ResetType type) +{ + GICv3State *s =3D ARM_GICV3_COMMON(obj); + WHPXARMGICv3Class *kgc =3D WHPX_GICV3_GET_CLASS(s); + + if (kgc->parent_phases.hold) { + kgc->parent_phases.hold(obj, type); + } + + whpx_gicv3_put(s); +} + + +/* + * CPU interface registers of GIC needs to be reset on CPU reset. + * For the calling arm_gicv3_icc_reset() on CPU reset, we register + * below ARMCPRegInfo. As we reset the whole cpu interface under single + * register reset, we define only one register of CPU interface instead + * of defining all the registers. + */ +static const ARMCPRegInfo gicv3_cpuif_reginfo[] =3D { + { .name =3D "ICC_CTLR_EL1", .state =3D ARM_CP_STATE_BOTH, + .opc0 =3D 3, .opc1 =3D 0, .crn =3D 12, .crm =3D 12, .opc2 =3D 4, + /* + * If ARM_CP_NOP is used, resetfn is not called, + * So ARM_CP_NO_RAW is appropriate type. + */ + .type =3D ARM_CP_NO_RAW, + .access =3D PL1_RW, + .readfn =3D arm_cp_read_zero, + .writefn =3D arm_cp_write_ignore, + /* + * We hang the whole cpu interface reset routine off here + * rather than parcelling it out into one little function + * per register + */ + .resetfn =3D whpx_gicv3_icc_reset, + }, +}; + +static void whpx_set_reg(CPUState *cpu, WHV_REGISTER_NAME reg, WHV_REGISTE= R_VALUE val) +{ + struct whpx_state *whpx =3D &whpx_global; + HRESULT hr; + + hr =3D whp_dispatch.WHvSetVirtualProcessorRegisters(whpx->partition, c= pu->cpu_index, + ®, 1, &val); + + if (FAILED(hr)) { + error_report("WHPX: Failed to set register %08x, hr=3D%08lx", reg,= hr); + } +} + +static void whpx_gicv3_realize(DeviceState *dev, Error **errp) +{ + ERRP_GUARD(); + GICv3State *s =3D WHPX_GICV3(dev); + WHPXARMGICv3Class *kgc =3D WHPX_GICV3_GET_CLASS(s); + int i; + + kgc->parent_realize(dev, errp); + if (*errp) { + return; + } + + if (s->revision !=3D 3) { + error_setg(errp, "unsupported GIC revision %d for platform GIC", + s->revision); + return; + } + + if (s->security_extn) { + error_setg(errp, "the platform vGICv3 does not implement the " + "security extensions"); + return; + } + + if (s->nmi_support) { + error_setg(errp, "NMI is not supported with the platform GIC"); + return; + } + + if (s->nb_redist_regions > 1) { + error_setg(errp, "Multiple VGICv3 redistributor regions are not " + "supported by WHPX"); + error_append_hint(errp, "A maximum of %d VCPUs can be used", + s->redist_region_count[0]); + return; + } + + gicv3_init_irqs_and_mmio(s, whpx_gicv3_set_irq, NULL); + + for (i =3D 0; i < s->num_cpu; i++) { + CPUState *cpu_state =3D qemu_get_cpu(i); + ARMCPU *cpu =3D ARM_CPU(cpu_state); + WHV_REGISTER_VALUE val =3D {.Reg64 =3D 0x080A0000 + (GICV3_REDIST_= SIZE * i)}; + whpx_set_reg(cpu_state, WHvArm64RegisterGicrBaseGpa, val); + define_arm_cp_regs(cpu, gicv3_cpuif_reginfo); + } + + if (s->maint_irq) { + error_setg(errp, "Nested virtualisation not currently supported by= WHPX."); + return; + } + + error_setg(&s->migration_blocker, + "Live migration disabled because GIC state save/restore not suppor= ted on WHPX"); + if (migrate_add_blocker(&s->migration_blocker, errp) < 0) { + error_report_err(*errp); + } +} + +static void whpx_gicv3_class_init(ObjectClass *klass, const void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + ResettableClass *rc =3D RESETTABLE_CLASS(klass); + ARMGICv3CommonClass *agcc =3D ARM_GICV3_COMMON_CLASS(klass); + WHPXARMGICv3Class *kgc =3D WHPX_GICV3_CLASS(klass); + + agcc->pre_save =3D whpx_gicv3_get; + agcc->post_load =3D whpx_gicv3_put; + + device_class_set_parent_realize(dc, whpx_gicv3_realize, + &kgc->parent_realize); + resettable_class_set_parent_phases(rc, NULL, whpx_gicv3_reset_hold, NU= LL, + &kgc->parent_phases); +} + +static const TypeInfo whpx_arm_gicv3_info =3D { + .name =3D TYPE_WHPX_GICV3, + .parent =3D TYPE_ARM_GICV3_COMMON, + .instance_size =3D sizeof(GICv3State), + .class_init =3D whpx_gicv3_class_init, + .class_size =3D sizeof(WHPXARMGICv3Class), +}; + +static void whpx_gicv3_register_types(void) +{ + type_register_static(&whpx_arm_gicv3_info); +} + +type_init(whpx_gicv3_register_types) diff --git a/hw/intc/meson.build b/hw/intc/meson.build index faae20b93d..96742df090 100644 --- a/hw/intc/meson.build +++ b/hw/intc/meson.build @@ -41,6 +41,7 @@ specific_ss.add(when: 'CONFIG_APIC', if_true: files('apic= .c', 'apic_common.c')) arm_common_ss.add(when: 'CONFIG_ARM_GIC', if_true: files('arm_gicv3_cpuif_= common.c')) arm_common_ss.add(when: 'CONFIG_ARM_GICV3', if_true: files('arm_gicv3_cpui= f.c')) specific_ss.add(when: 'CONFIG_ARM_GIC_KVM', if_true: files('arm_gic_kvm.c'= )) +specific_ss.add(when: ['CONFIG_WHPX', 'TARGET_AARCH64'], if_true: files('a= rm_gicv3_whpx.c')) specific_ss.add(when: ['CONFIG_ARM_GIC_KVM', 'TARGET_AARCH64'], if_true: f= iles('arm_gicv3_kvm.c', 'arm_gicv3_its_kvm.c')) arm_common_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_nvic.c')) specific_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_irqmp.c')) diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3= _common.h index 3d24ad22d2..c55cf18120 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -313,6 +313,9 @@ typedef struct ARMGICv3CommonClass ARMGICv3CommonClass; DECLARE_OBJ_CHECKERS(GICv3State, ARMGICv3CommonClass, ARM_GICV3_COMMON, TYPE_ARM_GICV3_COMMON) =20 +/* Types for GICv3 kernel-irqchip */ +#define TYPE_WHPX_GICV3 "whpx-arm-gicv3" + struct ARMGICv3CommonClass { /*< private >*/ SysBusDeviceClass parent_class; --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1769539179; cv=none; d=zohomail.com; s=zohoarc; b=KCpvqNqm8bBeAaGHWRE/jGCaoNWW4JovmMzZ0/eUjqLIHpyuEyw4wSlfB2rQojTEj7lSbkJAVigOb8HvTvlYJPqB4wF4CStanWPbD8unLSTs0apaxn9FV8DZUOsSovg4rB3VfaWgbBTwqSZUiic29cP/lVK6wlRh2ZZPmpo9+iw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769539179; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.71.115; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769539181092154100 Signed-off-by: Mohamed Mediouni Reviewed-by: Pierrick Bouvier --- MAINTAINERS | 1 + accel/whpx/whpx-common.c | 1 + target/arm/meson.build | 1 + target/arm/whpx/meson.build | 3 + target/arm/whpx/whpx-all.c | 810 ++++++++++++++++++++++++++++++++++++ 5 files changed, 816 insertions(+) create mode 100644 target/arm/whpx/meson.build create mode 100644 target/arm/whpx/whpx-all.c diff --git a/MAINTAINERS b/MAINTAINERS index d18978a36b..669a97a9b9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -567,6 +567,7 @@ M: Mohamed Mediouni S: Supported F: accel/whpx/ F: target/i386/whpx/ +F: target/arm/whpx/ F: hw/intc/arm_gicv3_whpx.c F: accel/stubs/whpx-stub.c F: include/system/whpx.h diff --git a/accel/whpx/whpx-common.c b/accel/whpx/whpx-common.c index 05f9e520b7..827f50f3e0 100644 --- a/accel/whpx/whpx-common.c +++ b/accel/whpx/whpx-common.c @@ -12,6 +12,7 @@ #include "gdbstub/helpers.h" #include "qemu/accel.h" #include "accel/accel-ops.h" +#include "system/memory.h" #include "system/whpx.h" #include "system/cpus.h" #include "system/runstate.h" diff --git a/target/arm/meson.build b/target/arm/meson.build index 462c71148d..ce155ba9b4 100644 --- a/target/arm/meson.build +++ b/target/arm/meson.build @@ -59,6 +59,7 @@ arm_common_system_ss.add(files( )) =20 subdir('hvf') +subdir('whpx') =20 if 'CONFIG_TCG' in config_all_accel subdir('tcg') diff --git a/target/arm/whpx/meson.build b/target/arm/whpx/meson.build new file mode 100644 index 0000000000..1de2ef0283 --- /dev/null +++ b/target/arm/whpx/meson.build @@ -0,0 +1,3 @@ +arm_system_ss.add(when: 'CONFIG_WHPX', if_true: files( + 'whpx-all.c', +)) diff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c new file mode 100644 index 0000000000..192d7ec7a8 --- /dev/null +++ b/target/arm/whpx/whpx-all.c @@ -0,0 +1,810 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * QEMU Windows Hypervisor Platform accelerator (WHPX) + * + * Copyright (c) 2025 Mohamed Mediouni + * + */ + +#include "qemu/osdep.h" +#include "cpu.h" +#include "system/address-spaces.h" +#include "system/ioport.h" +#include "gdbstub/helpers.h" +#include "qemu/accel.h" +#include "accel/accel-ops.h" +#include "system/whpx.h" +#include "system/cpus.h" +#include "system/runstate.h" +#include "qemu/main-loop.h" +#include "hw/core/boards.h" +#include "qemu/error-report.h" +#include "qapi/error.h" +#include "qapi/qapi-types-common.h" +#include "qapi/qapi-visit-common.h" +#include "migration/blocker.h" +#include "accel/accel-cpu-target.h" +#include + +#include "syndrome.h" +#include "cpu.h" +#include "target/arm/cpregs.h" +#include "internals.h" + +#include "system/whpx-internal.h" +#include "system/whpx-accel-ops.h" +#include "system/whpx-all.h" +#include "system/whpx-common.h" +#include "hw/arm/bsa.h" +#include "arm-powerctl.h" + +#include +#include + +typedef struct WHPXRegMatch { + WHV_REGISTER_NAME reg; + uint64_t offset; +} WHPXRegMatch; + +static const WHPXRegMatch whpx_reg_match[] =3D { + { WHvArm64RegisterX0, offsetof(CPUARMState, xregs[0]) }, + { WHvArm64RegisterX1, offsetof(CPUARMState, xregs[1]) }, + { WHvArm64RegisterX2, offsetof(CPUARMState, xregs[2]) }, + { WHvArm64RegisterX3, offsetof(CPUARMState, xregs[3]) }, + { WHvArm64RegisterX4, offsetof(CPUARMState, xregs[4]) }, + { WHvArm64RegisterX5, offsetof(CPUARMState, xregs[5]) }, + { WHvArm64RegisterX6, offsetof(CPUARMState, xregs[6]) }, + { WHvArm64RegisterX7, offsetof(CPUARMState, xregs[7]) }, + { WHvArm64RegisterX8, offsetof(CPUARMState, xregs[8]) }, + { WHvArm64RegisterX9, offsetof(CPUARMState, xregs[9]) }, + { WHvArm64RegisterX10, offsetof(CPUARMState, xregs[10]) }, + { WHvArm64RegisterX11, offsetof(CPUARMState, xregs[11]) }, + { WHvArm64RegisterX12, offsetof(CPUARMState, xregs[12]) }, + { WHvArm64RegisterX13, offsetof(CPUARMState, xregs[13]) }, + { WHvArm64RegisterX14, offsetof(CPUARMState, xregs[14]) }, + { WHvArm64RegisterX15, offsetof(CPUARMState, xregs[15]) }, + { WHvArm64RegisterX16, offsetof(CPUARMState, xregs[16]) }, + { WHvArm64RegisterX17, offsetof(CPUARMState, xregs[17]) }, + { WHvArm64RegisterX18, offsetof(CPUARMState, xregs[18]) }, + { WHvArm64RegisterX19, offsetof(CPUARMState, xregs[19]) }, + { WHvArm64RegisterX20, offsetof(CPUARMState, xregs[20]) }, + { WHvArm64RegisterX21, offsetof(CPUARMState, xregs[21]) }, + { WHvArm64RegisterX22, offsetof(CPUARMState, xregs[22]) }, + { WHvArm64RegisterX23, offsetof(CPUARMState, xregs[23]) }, + { WHvArm64RegisterX24, offsetof(CPUARMState, xregs[24]) }, + { WHvArm64RegisterX25, offsetof(CPUARMState, xregs[25]) }, + { WHvArm64RegisterX26, offsetof(CPUARMState, xregs[26]) }, + { WHvArm64RegisterX27, offsetof(CPUARMState, xregs[27]) }, + { WHvArm64RegisterX28, offsetof(CPUARMState, xregs[28]) }, + { WHvArm64RegisterFp, offsetof(CPUARMState, xregs[29]) }, + { WHvArm64RegisterLr, offsetof(CPUARMState, xregs[30]) }, + { WHvArm64RegisterPc, offsetof(CPUARMState, pc) }, +}; + +static const WHPXRegMatch whpx_fpreg_match[] =3D { + { WHvArm64RegisterQ0, offsetof(CPUARMState, vfp.zregs[0]) }, + { WHvArm64RegisterQ1, offsetof(CPUARMState, vfp.zregs[1]) }, + { WHvArm64RegisterQ2, offsetof(CPUARMState, vfp.zregs[2]) }, + { WHvArm64RegisterQ3, offsetof(CPUARMState, vfp.zregs[3]) }, + { WHvArm64RegisterQ4, offsetof(CPUARMState, vfp.zregs[4]) }, + { WHvArm64RegisterQ5, offsetof(CPUARMState, vfp.zregs[5]) }, + { WHvArm64RegisterQ6, offsetof(CPUARMState, vfp.zregs[6]) }, + { WHvArm64RegisterQ7, offsetof(CPUARMState, vfp.zregs[7]) }, + { WHvArm64RegisterQ8, offsetof(CPUARMState, vfp.zregs[8]) }, + { WHvArm64RegisterQ9, offsetof(CPUARMState, vfp.zregs[9]) }, + { WHvArm64RegisterQ10, offsetof(CPUARMState, vfp.zregs[10]) }, + { WHvArm64RegisterQ11, offsetof(CPUARMState, vfp.zregs[11]) }, + { WHvArm64RegisterQ12, offsetof(CPUARMState, vfp.zregs[12]) }, + { WHvArm64RegisterQ13, offsetof(CPUARMState, vfp.zregs[13]) }, + { WHvArm64RegisterQ14, offsetof(CPUARMState, vfp.zregs[14]) }, + { WHvArm64RegisterQ15, offsetof(CPUARMState, vfp.zregs[15]) }, + { WHvArm64RegisterQ16, offsetof(CPUARMState, vfp.zregs[16]) }, + { WHvArm64RegisterQ17, offsetof(CPUARMState, vfp.zregs[17]) }, + { WHvArm64RegisterQ18, offsetof(CPUARMState, vfp.zregs[18]) }, + { WHvArm64RegisterQ19, offsetof(CPUARMState, vfp.zregs[19]) }, + { WHvArm64RegisterQ20, offsetof(CPUARMState, vfp.zregs[20]) }, + { WHvArm64RegisterQ21, offsetof(CPUARMState, vfp.zregs[21]) }, + { WHvArm64RegisterQ22, offsetof(CPUARMState, vfp.zregs[22]) }, + { WHvArm64RegisterQ23, offsetof(CPUARMState, vfp.zregs[23]) }, + { WHvArm64RegisterQ24, offsetof(CPUARMState, vfp.zregs[24]) }, + { WHvArm64RegisterQ25, offsetof(CPUARMState, vfp.zregs[25]) }, + { WHvArm64RegisterQ26, offsetof(CPUARMState, vfp.zregs[26]) }, + { WHvArm64RegisterQ27, offsetof(CPUARMState, vfp.zregs[27]) }, + { WHvArm64RegisterQ28, offsetof(CPUARMState, vfp.zregs[28]) }, + { WHvArm64RegisterQ29, offsetof(CPUARMState, vfp.zregs[29]) }, + { WHvArm64RegisterQ30, offsetof(CPUARMState, vfp.zregs[30]) }, + { WHvArm64RegisterQ31, offsetof(CPUARMState, vfp.zregs[31]) }, +}; + +struct whpx_sreg_match { + WHV_REGISTER_NAME reg; + uint32_t key; + bool global; + uint32_t cp_idx; +}; + +static struct whpx_sreg_match whpx_sreg_match[] =3D { + { WHvArm64RegisterDbgbvr0El1, ENCODE_AA64_CP_REG(0, 0, 2, 0, 4) }, + { WHvArm64RegisterDbgbcr0El1, ENCODE_AA64_CP_REG(0, 0, 2, 0, 5) }, + { WHvArm64RegisterDbgwvr0El1, ENCODE_AA64_CP_REG(0, 0, 2, 0, 6) }, + { WHvArm64RegisterDbgwcr0El1, ENCODE_AA64_CP_REG(0, 0, 2, 0, 7) }, + + { WHvArm64RegisterDbgbvr0El1, ENCODE_AA64_CP_REG(0, 1, 2, 0, 4) }, + { WHvArm64RegisterDbgbcr0El1, ENCODE_AA64_CP_REG(0, 1, 2, 0, 5) }, + { WHvArm64RegisterDbgwvr0El1, ENCODE_AA64_CP_REG(0, 1, 2, 0, 6) }, + { WHvArm64RegisterDbgwcr0El1, ENCODE_AA64_CP_REG(0, 1, 2, 0, 7) }, + + { WHvArm64RegisterDbgbvr2El1, ENCODE_AA64_CP_REG(0, 2, 2, 0, 4) }, + { WHvArm64RegisterDbgbcr2El1, ENCODE_AA64_CP_REG(0, 2, 2, 0, 5) }, + { WHvArm64RegisterDbgwvr2El1, ENCODE_AA64_CP_REG(0, 2, 2, 0, 6) }, + { WHvArm64RegisterDbgwcr2El1, ENCODE_AA64_CP_REG(0, 2, 2, 0, 7) }, + + { WHvArm64RegisterDbgbvr3El1, ENCODE_AA64_CP_REG(0, 3, 2, 0, 4) }, + { WHvArm64RegisterDbgbcr3El1, ENCODE_AA64_CP_REG(0, 3, 2, 0, 5) }, + { WHvArm64RegisterDbgwvr3El1, ENCODE_AA64_CP_REG(0, 3, 2, 0, 6) }, + { WHvArm64RegisterDbgwcr3El1, ENCODE_AA64_CP_REG(0, 3, 2, 0, 7) }, + + { WHvArm64RegisterDbgbvr4El1, ENCODE_AA64_CP_REG(0, 4, 2, 0, 4) }, + { WHvArm64RegisterDbgbcr4El1, ENCODE_AA64_CP_REG(0, 4, 2, 0, 5) }, + { WHvArm64RegisterDbgwvr4El1, ENCODE_AA64_CP_REG(0, 4, 2, 0, 6) }, + { WHvArm64RegisterDbgwcr4El1, ENCODE_AA64_CP_REG(0, 4, 2, 0, 7) }, + + { WHvArm64RegisterDbgbvr5El1, ENCODE_AA64_CP_REG(0, 5, 2, 0, 4) }, + { WHvArm64RegisterDbgbcr5El1, ENCODE_AA64_CP_REG(0, 5, 2, 0, 5) }, + { WHvArm64RegisterDbgwvr5El1, ENCODE_AA64_CP_REG(0, 5, 2, 0, 6) }, + { WHvArm64RegisterDbgwcr5El1, ENCODE_AA64_CP_REG(0, 5, 2, 0, 7) }, + + { WHvArm64RegisterDbgbvr6El1, ENCODE_AA64_CP_REG(0, 6, 2, 0, 4) }, + { WHvArm64RegisterDbgbcr6El1, ENCODE_AA64_CP_REG(0, 6, 2, 0, 5) }, + { WHvArm64RegisterDbgwvr6El1, ENCODE_AA64_CP_REG(0, 6, 2, 0, 6) }, + { WHvArm64RegisterDbgwcr6El1, ENCODE_AA64_CP_REG(0, 6, 2, 0, 7) }, + + { WHvArm64RegisterDbgbvr7El1, ENCODE_AA64_CP_REG(0, 7, 2, 0, 4) }, + { WHvArm64RegisterDbgbcr7El1, ENCODE_AA64_CP_REG(0, 7, 2, 0, 5) }, + { WHvArm64RegisterDbgwvr7El1, ENCODE_AA64_CP_REG(0, 7, 2, 0, 6) }, + { WHvArm64RegisterDbgwcr7El1, ENCODE_AA64_CP_REG(0, 7, 2, 0, 7) }, + + { WHvArm64RegisterDbgbvr8El1, ENCODE_AA64_CP_REG(0, 8, 2, 0, 4) }, + { WHvArm64RegisterDbgbcr8El1, ENCODE_AA64_CP_REG(0, 8, 2, 0, 5) }, + { WHvArm64RegisterDbgwvr8El1, ENCODE_AA64_CP_REG(0, 8, 2, 0, 6) }, + { WHvArm64RegisterDbgwcr8El1, ENCODE_AA64_CP_REG(0, 8, 2, 0, 7) }, + + { WHvArm64RegisterDbgbvr9El1, ENCODE_AA64_CP_REG(0, 9, 2, 0, 4) }, + { WHvArm64RegisterDbgbcr9El1, ENCODE_AA64_CP_REG(0, 9, 2, 0, 5) }, + { WHvArm64RegisterDbgwvr9El1, ENCODE_AA64_CP_REG(0, 9, 2, 0, 6) }, + { WHvArm64RegisterDbgwcr9El1, ENCODE_AA64_CP_REG(0, 9, 2, 0, 7) }, + + { WHvArm64RegisterDbgbvr10El1, ENCODE_AA64_CP_REG(0, 10, 2, 0, 4) }, + { WHvArm64RegisterDbgbcr10El1, ENCODE_AA64_CP_REG(0, 10, 2, 0, 5) }, + { WHvArm64RegisterDbgwvr10El1, ENCODE_AA64_CP_REG(0, 10, 2, 0, 6) }, + { WHvArm64RegisterDbgwcr10El1, ENCODE_AA64_CP_REG(0, 10, 2, 0, 7) }, + + { WHvArm64RegisterDbgbvr11El1, ENCODE_AA64_CP_REG(0, 11, 2, 0, 4) }, + { WHvArm64RegisterDbgbcr11El1, ENCODE_AA64_CP_REG(0, 11, 2, 0, 5) }, + { WHvArm64RegisterDbgwvr11El1, ENCODE_AA64_CP_REG(0, 11, 2, 0, 6) }, + { WHvArm64RegisterDbgwcr11El1, ENCODE_AA64_CP_REG(0, 11, 2, 0, 7) }, + + { WHvArm64RegisterDbgbvr12El1, ENCODE_AA64_CP_REG(0, 12, 2, 0, 4) }, + { WHvArm64RegisterDbgbcr12El1, ENCODE_AA64_CP_REG(0, 12, 2, 0, 5) }, + { WHvArm64RegisterDbgwvr12El1, ENCODE_AA64_CP_REG(0, 12, 2, 0, 6) }, + { WHvArm64RegisterDbgwcr12El1, ENCODE_AA64_CP_REG(0, 12, 2, 0, 7) }, + + { WHvArm64RegisterDbgbvr13El1, ENCODE_AA64_CP_REG(0, 13, 2, 0, 4) }, + { WHvArm64RegisterDbgbcr13El1, ENCODE_AA64_CP_REG(0, 13, 2, 0, 5) }, + { WHvArm64RegisterDbgwvr13El1, ENCODE_AA64_CP_REG(0, 13, 2, 0, 6) }, + { WHvArm64RegisterDbgwcr13El1, ENCODE_AA64_CP_REG(0, 13, 2, 0, 7) }, + + { WHvArm64RegisterDbgbvr14El1, ENCODE_AA64_CP_REG(0, 14, 2, 0, 4) }, + { WHvArm64RegisterDbgbcr14El1, ENCODE_AA64_CP_REG(0, 14, 2, 0, 5) }, + { WHvArm64RegisterDbgwvr14El1, ENCODE_AA64_CP_REG(0, 14, 2, 0, 6) }, + { WHvArm64RegisterDbgwcr14El1, ENCODE_AA64_CP_REG(0, 14, 2, 0, 7) }, + + { WHvArm64RegisterDbgbvr15El1, ENCODE_AA64_CP_REG(0, 15, 2, 0, 4) }, + { WHvArm64RegisterDbgbcr15El1, ENCODE_AA64_CP_REG(0, 15, 2, 0, 5) }, + { WHvArm64RegisterDbgwvr15El1, ENCODE_AA64_CP_REG(0, 15, 2, 0, 6) }, + { WHvArm64RegisterDbgwcr15El1, ENCODE_AA64_CP_REG(0, 15, 2, 0, 7) }, +#ifdef SYNC_NO_RAW_REGS + /* + * The registers below are manually synced on init because they are + * marked as NO_RAW. We still list them to make number space sync easi= er. + */ + { WHvArm64RegisterMidrEl1, ENCODE_AA64_CP_REG(0, 0, 3, 0, 0) }, + { WHvArm64RegisterMpidrEl1, ENCODE_AA64_CP_REG(0, 0, 3, 0, 5) }, + { WHvArm64RegisterIdPfr0El1, ENCODE_AA64_CP_REG(0, 4, 3, 0, 0) }, +#endif + { WHvArm64RegisterIdAa64Pfr1El1, ENCODE_AA64_CP_REG(0, 4, 3, 0, 1), tr= ue }, + { WHvArm64RegisterIdAa64Dfr0El1, ENCODE_AA64_CP_REG(0, 5, 3, 0, 0), tr= ue }, + { WHvArm64RegisterIdAa64Dfr1El1, ENCODE_AA64_CP_REG(0, 5, 3, 0, 1), tr= ue }, + { WHvArm64RegisterIdAa64Isar0El1, ENCODE_AA64_CP_REG(0, 6, 3, 0, 0), t= rue }, + { WHvArm64RegisterIdAa64Isar1El1, ENCODE_AA64_CP_REG(0, 6, 3, 0, 1), t= rue }, +#ifdef SYNC_NO_MMFR0 + /* We keep the hardware MMFR0 around. HW limits are there anyway */ + { WHvArm64RegisterIdAa64Mmfr0El1, ENCODE_AA64_CP_REG(0, 7, 3, 0, 0) }, +#endif + { WHvArm64RegisterIdAa64Mmfr1El1, ENCODE_AA64_CP_REG(0, 7, 3, 0, 1), t= rue }, + { WHvArm64RegisterIdAa64Mmfr2El1, ENCODE_AA64_CP_REG(0, 7, 3, 0, 2), t= rue }, + { WHvArm64RegisterIdAa64Mmfr3El1, ENCODE_AA64_CP_REG(0, 7, 3, 0, 3), t= rue }, + + { WHvArm64RegisterMdscrEl1, ENCODE_AA64_CP_REG(0, 2, 2, 0, 2) }, + { WHvArm64RegisterSctlrEl1, ENCODE_AA64_CP_REG(1, 0, 3, 0, 0) }, + { WHvArm64RegisterCpacrEl1, ENCODE_AA64_CP_REG(1, 0, 3, 0, 2) }, + { WHvArm64RegisterTtbr0El1, ENCODE_AA64_CP_REG(2, 0, 3, 0, 0) }, + { WHvArm64RegisterTtbr1El1, ENCODE_AA64_CP_REG(2, 0, 3, 0, 1) }, + { WHvArm64RegisterTcrEl1, ENCODE_AA64_CP_REG(2, 0, 3, 0, 2) }, + + { WHvArm64RegisterApiAKeyLoEl1, ENCODE_AA64_CP_REG(2, 1, 3, 0, 0) }, + { WHvArm64RegisterApiAKeyHiEl1, ENCODE_AA64_CP_REG(2, 1, 3, 0, 1) }, + { WHvArm64RegisterApiBKeyLoEl1, ENCODE_AA64_CP_REG(2, 1, 3, 0, 2) }, + { WHvArm64RegisterApiBKeyHiEl1, ENCODE_AA64_CP_REG(2, 1, 3, 0, 3) }, + { WHvArm64RegisterApdAKeyLoEl1, ENCODE_AA64_CP_REG(2, 2, 3, 0, 0) }, + { WHvArm64RegisterApdAKeyHiEl1, ENCODE_AA64_CP_REG(2, 2, 3, 0, 1) }, + { WHvArm64RegisterApdBKeyLoEl1, ENCODE_AA64_CP_REG(2, 2, 3, 0, 2) }, + { WHvArm64RegisterApdBKeyHiEl1, ENCODE_AA64_CP_REG(2, 2, 3, 0, 3) }, + { WHvArm64RegisterApgAKeyLoEl1, ENCODE_AA64_CP_REG(2, 3, 3, 0, 0) }, + { WHvArm64RegisterApgAKeyHiEl1, ENCODE_AA64_CP_REG(2, 3, 3, 0, 1) }, + + { WHvArm64RegisterSpsrEl1, ENCODE_AA64_CP_REG(4, 0, 3, 0, 0) }, + { WHvArm64RegisterElrEl1, ENCODE_AA64_CP_REG(4, 0, 3, 0, 1) }, + { WHvArm64RegisterSpEl1, ENCODE_AA64_CP_REG(4, 1, 3, 0, 0) }, + { WHvArm64RegisterEsrEl1, ENCODE_AA64_CP_REG(5, 2, 3, 0, 0) }, + { WHvArm64RegisterFarEl1, ENCODE_AA64_CP_REG(6, 0, 3, 0, 0) }, + { WHvArm64RegisterParEl1, ENCODE_AA64_CP_REG(7, 4, 3, 0, 0) }, + { WHvArm64RegisterMairEl1, ENCODE_AA64_CP_REG(10, 2, 3, 0, 0) }, + { WHvArm64RegisterVbarEl1, ENCODE_AA64_CP_REG(12, 0, 3, 0, 0) }, + { WHvArm64RegisterContextidrEl1, ENCODE_AA64_CP_REG(13, 0, 3, 0, 1) }, + { WHvArm64RegisterTpidrEl1, ENCODE_AA64_CP_REG(13, 0, 3, 0, 4) }, + { WHvArm64RegisterCntkctlEl1, ENCODE_AA64_CP_REG(14, 1, 3, 0, 0) }, + { WHvArm64RegisterCsselrEl1, ENCODE_AA64_CP_REG(0, 0, 3, 2, 0) }, + { WHvArm64RegisterTpidrEl0, ENCODE_AA64_CP_REG(13, 0, 3, 3, 2) }, + { WHvArm64RegisterTpidrroEl0, ENCODE_AA64_CP_REG(13, 0, 3, 3, 3) }, + { WHvArm64RegisterCntvCtlEl0, ENCODE_AA64_CP_REG(14, 3, 3, 3, 1) }, + { WHvArm64RegisterCntvCvalEl0, ENCODE_AA64_CP_REG(14, 3, 3, 3, 2) }, + { WHvArm64RegisterSpEl1, ENCODE_AA64_CP_REG(4, 1, 3, 4, 0) }, +}; + +static void flush_cpu_state(CPUState *cpu) +{ + if (cpu->vcpu_dirty) { + whpx_set_registers(cpu, WHPX_SET_RUNTIME_STATE); + cpu->vcpu_dirty =3D false; + } +} + +HRESULT whpx_set_exception_exit_bitmap(UINT64 exceptions) +{ + if (exceptions !=3D 0) { + return E_NOTIMPL; + } + return ERROR_SUCCESS; +} +void whpx_apply_breakpoints( + struct whpx_breakpoint_collection *breakpoints, + CPUState *cpu, + bool resuming) +{ + /* Breakpoints aren=E2=80=99t supported on this platform */ +} +void whpx_translate_cpu_breakpoints( + struct whpx_breakpoints *breakpoints, + CPUState *cpu, + int cpu_breakpoint_count) +{ + /* Breakpoints aren=E2=80=99t supported on this platform */ +} + +static void whpx_get_reg(CPUState *cpu, WHV_REGISTER_NAME reg, WHV_REGISTE= R_VALUE* val) +{ + struct whpx_state *whpx =3D &whpx_global; + HRESULT hr; + + flush_cpu_state(cpu); + + hr =3D whp_dispatch.WHvGetVirtualProcessorRegisters(whpx->partition, c= pu->cpu_index, + ®, 1, val); + + if (FAILED(hr)) { + error_report("WHPX: Failed to get register %08x, hr=3D%08lx", reg,= hr); + } +} + +static void whpx_set_reg(CPUState *cpu, WHV_REGISTER_NAME reg, WHV_REGISTE= R_VALUE val) +{ + struct whpx_state *whpx =3D &whpx_global; + HRESULT hr; + hr =3D whp_dispatch.WHvSetVirtualProcessorRegisters(whpx->partition, c= pu->cpu_index, + ®, 1, &val); + + if (FAILED(hr)) { + error_report("WHPX: Failed to set register %08x, hr=3D%08lx", reg,= hr); + } +} + +static void whpx_get_global_reg(WHV_REGISTER_NAME reg, WHV_REGISTER_VALUE = *val) +{ + struct whpx_state *whpx =3D &whpx_global; + HRESULT hr; + + hr =3D whp_dispatch.WHvGetVirtualProcessorRegisters(whpx->partition, W= HV_ANY_VP, + ®, 1, val); + + if (FAILED(hr)) { + error_report("WHPX: Failed to get register %08x, hr=3D%08lx", reg,= hr); + } +} + +static void whpx_set_global_reg(WHV_REGISTER_NAME reg, WHV_REGISTER_VALUE = val) +{ + struct whpx_state *whpx =3D &whpx_global; + HRESULT hr; + hr =3D whp_dispatch.WHvSetVirtualProcessorRegisters(whpx->partition, W= HV_ANY_VP, + ®, 1, &val); + + if (FAILED(hr)) { + error_report("WHPX: Failed to set register %08x, hr=3D%08lx", reg,= hr); + } +} + +static uint64_t whpx_get_gp_reg(CPUState *cpu, int rt) +{ + assert(rt <=3D 31); + if (rt =3D=3D 31) { + return 0; + } + WHV_REGISTER_NAME reg =3D WHvArm64RegisterX0 + rt; + WHV_REGISTER_VALUE val; + whpx_get_reg(cpu, reg, &val); + + return val.Reg64; +} + +static void whpx_set_gp_reg(CPUState *cpu, int rt, uint64_t val) +{ + assert(rt < 31); + WHV_REGISTER_NAME reg =3D WHvArm64RegisterX0 + rt; + WHV_REGISTER_VALUE reg_val =3D {.Reg64 =3D val}; + + whpx_set_reg(cpu, reg, reg_val); +} + +static int whpx_handle_mmio(CPUState *cpu, WHV_MEMORY_ACCESS_CONTEXT *ctx) +{ + uint64_t syndrome =3D ctx->Syndrome; + + bool isv =3D syndrome & ARM_EL_ISV; + bool iswrite =3D (syndrome >> 6) & 1; + bool sse =3D (syndrome >> 21) & 1; + uint32_t sas =3D (syndrome >> 22) & 3; + uint32_t len =3D 1 << sas; + uint32_t srt =3D (syndrome >> 16) & 0x1f; + uint32_t cm =3D (syndrome >> 8) & 0x1; + uint64_t val =3D 0; + + assert(!cm); + assert(isv); + + if (iswrite) { + val =3D whpx_get_gp_reg(cpu, srt); + address_space_write(&address_space_memory, + ctx->Gpa, + MEMTXATTRS_UNSPECIFIED, &val, len); + } else { + address_space_read(&address_space_memory, + ctx->Gpa, + MEMTXATTRS_UNSPECIFIED, &val, len); + if (sse) { + val =3D sextract64(val, 0, len * 8); + } + whpx_set_gp_reg(cpu, srt, val); + } + + return 0; +} + +static void whpx_psci_cpu_off(ARMCPU *arm_cpu) +{ + int32_t ret =3D arm_set_cpu_off(arm_cpu_mp_affinity(arm_cpu)); + assert(ret =3D=3D QEMU_ARM_POWERCTL_RET_SUCCESS); +} + +int whpx_vcpu_run(CPUState *cpu) +{ + HRESULT hr; + struct whpx_state *whpx =3D &whpx_global; + ARMCPU *arm_cpu =3D ARM_CPU(cpu); + AccelCPUState *vcpu =3D cpu->accel; + int ret; + + + g_assert(bql_locked()); + + if (whpx->running_cpus++ =3D=3D 0) { + ret =3D whpx_first_vcpu_starting(cpu); + if (ret !=3D 0) { + return ret; + } + } + + bql_unlock(); + + + cpu_exec_start(cpu); + do { + bool advance_pc =3D false; + if (cpu->vcpu_dirty) { + whpx_set_registers(cpu, WHPX_SET_RUNTIME_STATE); + cpu->vcpu_dirty =3D false; + } + + if (qatomic_read(&cpu->exit_request)) { + whpx_vcpu_kick(cpu); + } + + hr =3D whp_dispatch.WHvRunVirtualProcessor( + whpx->partition, cpu->cpu_index, + &vcpu->exit_ctx, sizeof(vcpu->exit_ctx)); + + if (FAILED(hr)) { + error_report("WHPX: Failed to exec a virtual processor," + " hr=3D%08lx", hr); + ret =3D -1; + break; + } + + switch (vcpu->exit_ctx.ExitReason) { + case WHvRunVpExitReasonGpaIntercept: + case WHvRunVpExitReasonUnmappedGpa: + advance_pc =3D true; + + if (vcpu->exit_ctx.MemoryAccess.Syndrome & BIT(8)) { + error_report("WHPX: cached access to unmapped memory" + "Pc =3D 0x%llx Gva =3D 0x%llx Gpa =3D 0x%llx", + vcpu->exit_ctx.MemoryAccess.Header.Pc, + vcpu->exit_ctx.MemoryAccess.Gpa, + vcpu->exit_ctx.MemoryAccess.Gva); + break; + } + + ret =3D whpx_handle_mmio(cpu, &vcpu->exit_ctx.MemoryAccess); + break; + case WHvRunVpExitReasonCanceled: + cpu->exception_index =3D EXCP_INTERRUPT; + ret =3D 1; + break; + case WHvRunVpExitReasonArm64Reset: + switch (vcpu->exit_ctx.Arm64Reset.ResetType) { + case WHvArm64ResetTypePowerOff: + qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN= ); + break; + case WHvArm64ResetTypeReboot: + qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); + break; + default: + g_assert_not_reached(); + } + bql_lock(); + if (arm_cpu->power_state !=3D PSCI_OFF) { + whpx_psci_cpu_off(arm_cpu); + } + bql_unlock(); + break; + case WHvRunVpExitReasonNone: + case WHvRunVpExitReasonUnrecoverableException: + case WHvRunVpExitReasonInvalidVpRegisterValue: + case WHvRunVpExitReasonUnsupportedFeature: + default: + error_report("WHPX: Unexpected VP exit code 0x%08x", + vcpu->exit_ctx.ExitReason); + whpx_get_registers(cpu); + bql_lock(); + qemu_system_guest_panicked(cpu_get_crash_info(cpu)); + bql_unlock(); + break; + } + if (advance_pc) { + WHV_REGISTER_VALUE pc; + + flush_cpu_state(cpu); + pc.Reg64 =3D vcpu->exit_ctx.MemoryAccess.Header.Pc + 4; + whpx_set_reg(cpu, WHvArm64RegisterPc, pc); + } + } while (!ret); + + cpu_exec_end(cpu); + + bql_lock(); + current_cpu =3D cpu; + + if (--whpx->running_cpus =3D=3D 0) { + whpx_last_vcpu_stopping(cpu); + } + + qatomic_set(&cpu->exit_request, false); + + return ret < 0; +} + +static void clean_whv_register_value(WHV_REGISTER_VALUE *val) +{ + memset(val, 0, sizeof(WHV_REGISTER_VALUE)); +} + +void whpx_get_registers(CPUState *cpu) +{ + ARMCPU *arm_cpu =3D ARM_CPU(cpu); + CPUARMState *env =3D &arm_cpu->env; + WHV_REGISTER_VALUE val; + int i; + + for (i =3D 0; i < ARRAY_SIZE(whpx_reg_match); i++) { + whpx_get_reg(cpu, whpx_reg_match[i].reg, &val); + *(uint64_t *)((char *)env + whpx_reg_match[i].offset) =3D val.Reg6= 4; + } + + for (i =3D 0; i < ARRAY_SIZE(whpx_fpreg_match); i++) { + whpx_get_reg(cpu, whpx_reg_match[i].reg, &val); + memcpy((char *)env + whpx_fpreg_match[i].offset, &val, sizeof(val.= Reg128)); + } + + whpx_get_reg(cpu, WHvArm64RegisterPc, &val); + env->pc =3D val.Reg64; + + whpx_get_reg(cpu, WHvArm64RegisterFpcr, &val); + vfp_set_fpcr(env, val.Reg32); + + whpx_get_reg(cpu, WHvArm64RegisterFpsr, &val); + vfp_set_fpsr(env, val.Reg32); + + whpx_get_reg(cpu, WHvArm64RegisterPstate, &val); + pstate_write(env, val.Reg32); + + for (i =3D 0; i < ARRAY_SIZE(whpx_sreg_match); i++) { + if (whpx_sreg_match[i].cp_idx =3D=3D -1) { + continue; + } + + if (whpx_sreg_match[i].global) { + /* WHP disallows us from accessing global regs as a vCPU */ + whpx_get_global_reg(whpx_sreg_match[i].reg, &val); + } else { + whpx_get_reg(cpu, whpx_sreg_match[i].reg, &val); + } + arm_cpu->cpreg_values[whpx_sreg_match[i].cp_idx] =3D val.Reg64; + } + + assert(write_list_to_cpustate(arm_cpu)); + aarch64_restore_sp(env, arm_current_el(env)); +} + +void whpx_set_registers(CPUState *cpu, int level) +{ + ARMCPU *arm_cpu =3D ARM_CPU(cpu); + CPUARMState *env =3D &arm_cpu->env; + WHV_REGISTER_VALUE val; + clean_whv_register_value(&val); + int i; + + assert(cpu_is_stopped(cpu) || qemu_cpu_is_self(cpu)); + + for (i =3D 0; i < ARRAY_SIZE(whpx_reg_match); i++) { + val.Reg64 =3D *(uint64_t *)((char *)env + whpx_reg_match[i].offset= ); + whpx_set_reg(cpu, whpx_reg_match[i].reg, val); + } + + for (i =3D 0; i < ARRAY_SIZE(whpx_fpreg_match); i++) { + memcpy(&val.Reg128, (char *)env + whpx_fpreg_match[i].offset, size= of(val.Reg128)); + whpx_set_reg(cpu, whpx_reg_match[i].reg, val); + } + + clean_whv_register_value(&val); + val.Reg64 =3D env->pc; + whpx_set_reg(cpu, WHvArm64RegisterPc, val); + + clean_whv_register_value(&val); + val.Reg32 =3D vfp_get_fpcr(env); + whpx_set_reg(cpu, WHvArm64RegisterFpcr, val); + val.Reg32 =3D vfp_get_fpsr(env); + whpx_set_reg(cpu, WHvArm64RegisterFpsr, val); + val.Reg32 =3D pstate_read(env); + whpx_set_reg(cpu, WHvArm64RegisterPstate, val); + + aarch64_save_sp(env, arm_current_el(env)); + + assert(write_cpustate_to_list(arm_cpu, false)); + + /* Currently set global regs every time. */ + for (i =3D 0; i < ARRAY_SIZE(whpx_sreg_match); i++) { + if (whpx_sreg_match[i].cp_idx =3D=3D -1) { + continue; + } + + val.Reg64 =3D arm_cpu->cpreg_values[whpx_sreg_match[i].cp_idx]; + if (whpx_sreg_match[i].global) { + /* WHP disallows us from accessing global regs as a vCPU */ + whpx_set_global_reg(whpx_sreg_match[i].reg, val); + } else { + whpx_set_reg(cpu, whpx_sreg_match[i].reg, val); + } + } +} + +static uint32_t max_vcpu_index; + +static void whpx_cpu_update_state(void *opaque, bool running, RunState sta= te) +{ +} + +int whpx_init_vcpu(CPUState *cpu) +{ + HRESULT hr; + struct whpx_state *whpx =3D &whpx_global; + ARMCPU *arm_cpu =3D ARM_CPU(cpu); + CPUARMState *env =3D &arm_cpu->env; + + uint32_t sregs_match_len =3D ARRAY_SIZE(whpx_sreg_match); + uint32_t sregs_cnt =3D 0; + WHV_REGISTER_VALUE val; + int i; + + hr =3D whp_dispatch.WHvCreateVirtualProcessor( + whpx->partition, cpu->cpu_index, 0); + if (FAILED(hr)) { + error_report("WHPX: Failed to create a virtual processor," + " hr=3D%08lx", hr); + return -EINVAL; + } + + /* Assumption that CNTFRQ_EL0 is the same between the VMM and the part= ition. */ + asm volatile("mrs %0, cntfrq_el0" : "=3Dr"(arm_cpu->gt_cntfrq_hz)); + + cpu->vcpu_dirty =3D true; + cpu->accel =3D g_new0(AccelCPUState, 1); + max_vcpu_index =3D MAX(max_vcpu_index, cpu->cpu_index); + qemu_add_vm_change_state_handler(whpx_cpu_update_state, env); + + env->aarch64 =3D true; + + /* Allocate enough space for our sysreg sync */ + arm_cpu->cpreg_indexes =3D g_renew(uint64_t, arm_cpu->cpreg_indexes, + sregs_match_len); + arm_cpu->cpreg_values =3D g_renew(uint64_t, arm_cpu->cpreg_values, + sregs_match_len); + arm_cpu->cpreg_vmstate_indexes =3D g_renew(uint64_t, + arm_cpu->cpreg_vmstate_indexe= s, + sregs_match_len); + arm_cpu->cpreg_vmstate_values =3D g_renew(uint64_t, + arm_cpu->cpreg_vmstate_values, + sregs_match_len); + + memset(arm_cpu->cpreg_values, 0, sregs_match_len * sizeof(uint64_t)); + + /* Populate cp list for all known sysregs */ + for (i =3D 0; i < sregs_match_len; i++) { + const ARMCPRegInfo *ri; + uint32_t key =3D whpx_sreg_match[i].key; + + ri =3D get_arm_cp_reginfo(arm_cpu->cp_regs, key); + if (ri) { + assert(!(ri->type & ARM_CP_NO_RAW)); + whpx_sreg_match[i].cp_idx =3D sregs_cnt; + arm_cpu->cpreg_indexes[sregs_cnt++] =3D cpreg_to_kvm_id(key); + } else { + whpx_sreg_match[i].cp_idx =3D -1; + } + } + arm_cpu->cpreg_array_len =3D sregs_cnt; + arm_cpu->cpreg_vmstate_array_len =3D sregs_cnt; + + assert(write_cpustate_to_list(arm_cpu, false)); + + /* Set CP_NO_RAW system registers on init */ + val.Reg64 =3D arm_cpu->midr; + whpx_set_reg(cpu, WHvArm64RegisterMidrEl1, + val); + + clean_whv_register_value(&val); + + val.Reg64 =3D deposit64(arm_cpu->mp_affinity, 31, 1, 1 /* RES1 */); + whpx_set_reg(cpu, WHvArm64RegisterMpidrEl1, val); + + return 0; +} + +void whpx_cpu_instance_init(CPUState *cs) +{ +} + +int whpx_accel_init(AccelState *as, MachineState *ms) +{ + struct whpx_state *whpx; + int ret; + HRESULT hr; + WHV_CAPABILITY whpx_cap; + UINT32 whpx_cap_size; + WHV_PARTITION_PROPERTY prop; + WHV_CAPABILITY_FEATURES features; + + whpx =3D &whpx_global; + /* on arm64 Windows Hypervisor Platform, vGICv3 always used */ + whpx_irqchip_in_kernel =3D true; + + if (!init_whp_dispatch()) { + ret =3D -ENOSYS; + goto error; + } + + whpx->mem_quota =3D ms->ram_size; + + hr =3D whp_dispatch.WHvGetCapability( + WHvCapabilityCodeHypervisorPresent, &whpx_cap, + sizeof(whpx_cap), &whpx_cap_size); + if (FAILED(hr) || !whpx_cap.HypervisorPresent) { + error_report("WHPX: No accelerator found, hr=3D%08lx", hr); + ret =3D -ENOSPC; + goto error; + } + + memset(&features, 0, sizeof(features)); + hr =3D whp_dispatch.WHvGetCapability( + WHvCapabilityCodeFeatures, &features, sizeof(features), NULL); + if (FAILED(hr)) { + error_report("WHPX: Failed to query capabilities, hr=3D%08lx", hr); + ret =3D -EINVAL; + goto error; + } + + if (!features.Arm64Support) { + error_report("WHPX: host OS exposing pre-release WHPX implementati= on. " + "Please update your operating system to at least build 26100.3= 915"); + ret =3D -EINVAL; + goto error; + } + + hr =3D whp_dispatch.WHvCreatePartition(&whpx->partition); + if (FAILED(hr)) { + error_report("WHPX: Failed to create partition, hr=3D%08lx", hr); + ret =3D -EINVAL; + goto error; + } + + memset(&prop, 0, sizeof(prop)); + prop.ProcessorCount =3D ms->smp.cpus; + hr =3D whp_dispatch.WHvSetPartitionProperty( + whpx->partition, + WHvPartitionPropertyCodeProcessorCount, + &prop, + sizeof(prop)); + + if (FAILED(hr)) { + error_report("WHPX: Failed to set partition processor count to %u," + " hr=3D%08lx", prop.ProcessorCount, hr); + ret =3D -EINVAL; + goto error; + } + + if (!whpx->kernel_irqchip_allowed) { + error_report("WHPX: on Arm, only kernel-irqchip=3Don is currently = supported"); + ret =3D -EINVAL; + goto error; + } + + memset(&prop, 0, sizeof(prop)); + + hr =3D whp_dispatch.WHvSetupPartition(whpx->partition); + if (FAILED(hr)) { + error_report("WHPX: Failed to setup partition, hr=3D%08lx", hr); + ret =3D -EINVAL; + goto error; + } + + whpx_memory_init(); + + return 0; + +error: + if (whpx->partition !=3D NULL) { + whp_dispatch.WHvDeletePartition(whpx->partition); + whpx->partition =3D NULL; + } + + return ret; +} --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1769539064; cv=none; d=zohomail.com; s=zohoarc; b=fSMYmqDLmz22SRs7gi0JbOuspow8htlvWhu4CrOH8EI7a8/Xh9Kr40D5Ai6vOHxmqn6In2vq9CJYN9c5JW/VEd8cybkSun1It5BFeYorBhlzMq1PkzrzRzHrN6n46VGKrc5E7wL5ue+h1poH4l3TZjEvBy1XDURMxZFGE42UJwE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769539064; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=KaQ368BT2+kXLDF2JjCqdQWANc+K5Nc/lcLx70881Os=; b=Rw/M7Z7xfSBnueMoREW79Wj8W8qvfSnNu2SzTWpdayA+mGYboQz0Uvpf8lpOyf+IvkSmfDF3dCKOGxd/UqB7OMQN92F4/sqOhC0mVH8HWhoRRnVZpa+fvnz2ISXg55QOcceJYw0iVTW7CpuII0JoWgoxbCIF5l88Q5I3a71Rvv0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769539064295994.9860993000678; Tue, 27 Jan 2026 10:37:44 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vknrI-0000fk-NX; Tue, 27 Jan 2026 13:32:12 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknoi-00027k-7f for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:29:38 -0500 Received: from p-west2-cluster5-host12-snip4-5.eps.apple.com ([57.103.71.18] helo=outbound.mr.icloud.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknof-0003iL-0A for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:29:31 -0500 Received: from outbound.mr.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPS id DED7818001C0; Tue, 27 Jan 2026 18:29:22 +0000 (UTC) Received: from localhost.localdomain (unknown [17.57.152.38]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPSA id 5570A180096C; Tue, 27 Jan 2026 18:29:18 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; t=1769538564; x=1772130564; bh=KaQ368BT2+kXLDF2JjCqdQWANc+K5Nc/lcLx70881Os=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type:x-icloud-hme; b=SHWV4KAWT0wL74rv65dbAG2pxtW2YkQRR6z21Y1kvO3qsuAkB44hhuYlQeDgjoHb03GtSFgD6011MFeCFTjPGTSRp4mTGQnhW6U0Zwf8ki5I2EAIZuJ8xtytPUdqPzko9f2iuwW0ddFjoSvIvSbGZrz2Ofb3DpONtlCjugRO/BanElyeN5YAn/ffUAwIYjMoON7b6vEvV3JJrluw7P+jgeOPquF8BQRIwBN2c0kne7IbRGo1/1fiMForNVQ48H8hPUpRUk45g7CRdp7vEN07eLv++PlVed8/bouIMxdFbOR5suzgxjTs5oXJ56c9RmqjL+bC63T+PyZkXI/vZHoTJg== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org, mohamed@unpredictable.fr Cc: Zhao Liu , "Michael S. Tsirkin" , Roman Bolshakov , qemu-arm@nongnu.org, Ani Sinha , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Akihiko Odaki , Marcel Apfelbaum , Pedro Barbuda , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Shannon Zhao , Igor Mammedov , Cameron Esfahani , Alexander Graf , Peter Maydell , Eduardo Habkost , Phil Dennis-Jordan , Pierrick Bouvier Subject: [PATCH v18 15/22] whpx: change memory management logic Date: Tue, 27 Jan 2026 19:27:55 +0100 Message-ID: <20260127182805.73212-16-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260127182805.73212-1-mohamed@unpredictable.fr> References: <20260127182805.73212-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Authority-Info-Out: v=2.4 cv=Vucuwu2n c=1 sm=1 tr=0 ts=69790403 cx=c_apl:c_apl_out:c_pps a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=Wq2Hhhcarr-WV7vA_m4A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: Pv-FPXJQ2JGolH75hVr_Jbh185nomGvB X-Proofpoint-GUID: Pv-FPXJQ2JGolH75hVr_Jbh185nomGvB X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDE1MCBTYWx0ZWRfX2VZVShhvi7OR Wgcf7RalqfPkphnEATMsBYMgjCA6HJoUQqy6ezOXnEMNM58LXq+WxkFm38hc1AF38kjEfsJSX0N eFWpsSF4pDvSb9kDaNT/zXaasyWF555HsmIg5T55Ira1eSvCjtxLfAGVydGe18UZFDDuibVKgXX jasL3EKuvYAOppUyOQcunb+E12uJfBahRnxRGLUHn8XocExUdbCm737q5WRaHleOHIX7/gVm2RX XUsTEDUZacrc/afQWt6zVcRLc+AWQjPAL6pQthbm3Y115mCKyqwwb00NQtCmHdj9XA6XS78OFD3 5g8xtMgPPtdyqgH3m7H8yc0ZqALeyzsxeOBq4gb+gjaHw2Utw6xd+ty2xq61uI= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_04,2026-01-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 mlxscore=0 spamscore=0 adultscore=0 bulkscore=0 suspectscore=0 malwarescore=0 clxscore=1030 mlxlogscore=999 phishscore=0 lowpriorityscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601270150 X-JNJ: AAAAAAAB2V4MfFN1NcjHWSxbK2aHSXigW3kJQULPkUYgGt94Z6dCHheuDsZH3HpJpWHZNNk0nTlAIXOHNoitbPs3ea9X2d2CwxlbUZH1i/CZyNDsfUXA8e2kvS9FQn3bGF6wI/UX4CIrx5RqB99dxYsRoN9SXVxZDU6XNcQGrIBazZYlu+ptUBPL8C2TtS/KCwxEAN5iFvw9VfZ42Mz0qbXpTN7hfr/y/sBzWf7ylILLU3UPXoRTYgyqrPcymh51Rq24cu1mIW0HcoZh6e9MhxluatUA59YsCoRvpEQoAAtEO1hFVUN3Y2yKbw6qM6m1jA0i5heFKong1sfzNsb1kmEu34Igiw+3Wo7DmsVaozO9dVEDb3qlbGo3Pj+GFUiDSTpu30YD1tJZyx8m0DvfN9u6qrHPv/H7sCxZEzPBodyxhI89wQaPFlflTaNAGnDKf0+lGhKPlHTQnZsHMuTcT9dPYZ+HYfX71kmS4Ucgn2g3T0efTPQKCegBL35h32pJAdDFR+Unga1GafI4Izk2ItwaIewqqyl8qKrG/5n4urkCW+dazaXHRRe1iGmoFf7auZho3ZrpPW06+0Rny3rP1STWUNSVg7XbD1OtlNT3ZHNQqVslkY9i8tTXFLGvjUpd8IfjyVggM0QPJqnPsV5r56aeqfHyxKUZYK+JGq/ba8mfw2qVte14PPSN1vYYhwdgcC3VJRBsAMH5wTyZRiZcidr5eiAzoRNTuoSPfzF2Q/v4Ojrxi86H36NTnEwA9OlY+RhmdTI7lq2xdpzk8RUIllDoFDa1/KougNhjcfgi9+L+oO/Gnd54srETZNa+D553sl7uCoLlSCQbyqkO/Lglh9IgzDg+Yp0IERt56CC9BtO4z20vQ3g2ckeZvMDT1gLgJWkaMKDK2BCa5fOLr+yUVtQlH3L0slih0McpEMcf4FiYbB4MJ1UFJWj3oQOxBYeuzA== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.71.18; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769539065472158500 This allows edk2 to work on Arm, although u-boot is still not functional. Signed-off-by: Mohamed Mediouni Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Akihiko Odaki --- accel/whpx/whpx-common.c | 97 +++++++++++++++------------------------- 1 file changed, 36 insertions(+), 61 deletions(-) diff --git a/accel/whpx/whpx-common.c b/accel/whpx/whpx-common.c index 827f50f3e0..f018a8f5c7 100644 --- a/accel/whpx/whpx-common.c +++ b/accel/whpx/whpx-common.c @@ -255,89 +255,64 @@ void whpx_vcpu_kick(CPUState *cpu) * Memory support. */ =20 -static void whpx_update_mapping(hwaddr start_pa, ram_addr_t size, - void *host_va, int add, int rom, - const char *name) +static void whpx_set_phys_mem(MemoryRegionSection *section, bool add) { struct whpx_state *whpx =3D &whpx_global; + MemoryRegion *area =3D section->mr; + bool writable =3D !area->readonly && !area->rom_device; + WHV_MAP_GPA_RANGE_FLAGS flags; + uint64_t page_size =3D qemu_real_host_page_size(); + uint64_t gva =3D section->offset_within_address_space; + uint64_t size =3D int128_get64(section->size); HRESULT hr; + void *mem; =20 - /* - if (add) { - printf("WHPX: ADD PA:%p Size:%p, Host:%p, %s, '%s'\n", - (void*)start_pa, (void*)size, host_va, - (rom ? "ROM" : "RAM"), name); - } else { - printf("WHPX: DEL PA:%p Size:%p, Host:%p, '%s'\n", - (void*)start_pa, (void*)size, host_va, name); - } - */ - - if (add) { - hr =3D whp_dispatch.WHvMapGpaRange(whpx->partition, - host_va, - start_pa, - size, - (WHvMapGpaRangeFlagRead | - WHvMapGpaRangeFlagExecute | - (rom ? 0 : WHvMapGpaRangeFlagWri= te))); - } else { - hr =3D whp_dispatch.WHvUnmapGpaRange(whpx->partition, - start_pa, - size); - } - - if (FAILED(hr)) { - error_report("WHPX: Failed to %s GPA range '%s' PA:%p, Size:%p byt= es," - " Host:%p, hr=3D%08lx", - (add ? "MAP" : "UNMAP"), name, - (void *)(uintptr_t)start_pa, (void *)size, host_va, h= r); + if (!memory_region_is_ram(area)) { + if (writable) { + return; + } else if (!memory_region_is_romd(area)) { + add =3D false; + } } -} - -static void whpx_process_section(MemoryRegionSection *section, int add) -{ - MemoryRegion *mr =3D section->mr; - hwaddr start_pa =3D section->offset_within_address_space; - ram_addr_t size =3D int128_get64(section->size); - unsigned int delta; - uint64_t host_va; =20 - if (!memory_region_is_ram(mr)) { - return; + if (!QEMU_IS_ALIGNED(size, page_size) || + !QEMU_IS_ALIGNED(gva, page_size)) { + /* Not page aligned, so we can not map as RAM */ + add =3D false; } =20 - delta =3D qemu_real_host_page_size() - (start_pa & ~qemu_real_host_pag= e_mask()); - delta &=3D ~qemu_real_host_page_mask(); - if (delta > size) { - return; - } - start_pa +=3D delta; - size -=3D delta; - size &=3D qemu_real_host_page_mask(); - if (!size || (start_pa & ~qemu_real_host_page_mask())) { + if (!add) { + hr =3D whp_dispatch.WHvUnmapGpaRange(whpx->partition, + gva, size); + if (FAILED(hr)) { + error_report("WHPX: failed to unmap GPA range"); + abort(); + } return; } =20 - host_va =3D (uintptr_t)memory_region_get_ram_ptr(mr) - + section->offset_within_region + delta; + flags =3D WHvMapGpaRangeFlagRead | WHvMapGpaRangeFlagExecute + | (writable ? WHvMapGpaRangeFlagWrite : 0); + mem =3D memory_region_get_ram_ptr(area) + section->offset_within_regio= n; =20 - whpx_update_mapping(start_pa, size, (void *)(uintptr_t)host_va, add, - memory_region_is_rom(mr), mr->name); + hr =3D whp_dispatch.WHvMapGpaRange(whpx->partition, + mem, gva, size, flags); + if (FAILED(hr)) { + error_report("WHPX: failed to map GPA range"); + abort(); + } } =20 static void whpx_region_add(MemoryListener *listener, MemoryRegionSection *section) { - memory_region_ref(section->mr); - whpx_process_section(section, 1); + whpx_set_phys_mem(section, true); } =20 static void whpx_region_del(MemoryListener *listener, MemoryRegionSection *section) { - whpx_process_section(section, 0); - memory_region_unref(section->mr); + whpx_set_phys_mem(section, false); } =20 static void whpx_transaction_begin(MemoryListener *listener) --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1769539165; cv=none; d=zohomail.com; s=zohoarc; b=lXQSPbehLrJofB1F9XRCSKvsCqVqvq8T9lWh4XDx272gcEmxnwmrUfMjeT2ajkDNgB8KbqFjt+D2Y457k1YxUGFsBwg4JPmnPeYs83po3e5rJkz4uHslGiyY1Db+kv033Z5L1ukf8EjOZSIovpwFXLq/nXcJVp1a+/BgdqPkzY8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769539165; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=0JMxBdejtyNGNNsrlyDp+frLA+zrF8bgZozsFerjTiI=; b=IsLhEh3O5kN1t9Ma7gljba4Q/CEJXzMLT3sQMHmSrrkrXy4MyIczwk4KwMmtZpZVT8mwqqZOFFFEYtXs93V+oCx9unvew2Qsq0tHkc3JxzwFRsLEa9g0mugVKjV+lOpF6DO7Mgo1CpEw5X2rhQAsjvxTYVjRoMtqjO/bT+TtQ2k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 176953916508196.08384410701717; Tue, 27 Jan 2026 10:39:25 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vknrJ-0000j8-Bu; Tue, 27 Jan 2026 13:32:13 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknoi-00027j-7S for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:29:38 -0500 Received: from p-west2-cluster5-host12-snip4-1.eps.apple.com ([57.103.71.14] helo=outbound.mr.icloud.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknof-0003jh-Vu for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:29:31 -0500 Received: from outbound.mr.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPS id 74CF618001F3; Tue, 27 Jan 2026 18:29:27 +0000 (UTC) Received: from localhost.localdomain (unknown [17.57.152.38]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPSA id EC16F1800253; Tue, 27 Jan 2026 18:29:22 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; t=1769538569; x=1772130569; bh=0JMxBdejtyNGNNsrlyDp+frLA+zrF8bgZozsFerjTiI=; h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme; b=Ai5a5bLjOrDtWDWidVBYXEp3RviT8T5i8viRFo++3hMRAdsAcDqoJBUJob+RXeHe0t060KjhZaDwoLkJ3OgpJHCP8WDniS+sBALeOz+W6xNdR059WVHOmqichYYZtHVLhJe0cnul2rNlgXTrWh6DkZlyAesC30dTFe36ihm52Fd2gj1lPQeVzNQhAa5OciNzyV2zVNC9paZmVQhuT4yzpRA3XbDSyVN5Ok/kd9A6wlSUZJ9ci4DWI99B0El4rl9QPRl70YT1XQu+A9bWLpKs2j7iBBUHNogHIRfQ4UNsIegBbrssqE9o/upzNDuzLVfA5K9lF/EmHnDidsvtoy137g== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org, mohamed@unpredictable.fr Cc: Zhao Liu , "Michael S. Tsirkin" , Roman Bolshakov , qemu-arm@nongnu.org, Ani Sinha , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Akihiko Odaki , Marcel Apfelbaum , Pedro Barbuda , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Shannon Zhao , Igor Mammedov , Cameron Esfahani , Alexander Graf , Peter Maydell , Eduardo Habkost , Phil Dennis-Jordan , Pierrick Bouvier Subject: [PATCH v18 16/22] target/arm: cpu: mark WHPX as supporting PSCI 1.3 Date: Tue, 27 Jan 2026 19:27:56 +0100 Message-ID: <20260127182805.73212-17-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260127182805.73212-1-mohamed@unpredictable.fr> References: <20260127182805.73212-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDE1MCBTYWx0ZWRfXyfSKfQdRZ4rl wNik2mJyWDaBspjQXdERrSpbpRnnyjEl0zSkL2l+1HWUn79EbzlC196eWau+QD0WagYMDdlKwJy KfBjC96XhpSURB/vs/z9XPlEDwBGm+I8u07/J1zMKYzEH4xyWnyBR+9Z4k9EWBMpleJ33hyHmTZ heh4gschctH5N60SDf0x7UUF2pCf6ePjdhwEPBYMGV8eEa9jfunf/uPU6cwmq1k93Ia777zOin2 mX7iUEsWVXVAWhbvVTNX3VOe9qfVjcFmsOEEK8fav2/DBvdSXWvN7K/YjfDtnMttRuC8tQwULTc inaZ13oBkNws6heHLbm X-Authority-Info-Out: v=2.4 cv=Ip4Tsb/g c=1 sm=1 tr=0 ts=69790408 cx=c_apl:c_apl_out:c_pps a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=emIkxkYSJqCgyAM8kcYA:9 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: edtKmxvSa9X9PZ5F668JCCAxMvzE16Be X-Proofpoint-ORIG-GUID: edtKmxvSa9X9PZ5F668JCCAxMvzE16Be X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_04,2026-01-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 clxscore=1030 mlxlogscore=999 adultscore=0 malwarescore=0 bulkscore=0 mlxscore=0 phishscore=0 spamscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2601270150 X-JNJ: AAAAAAABWVYCEWy7fbN/QDJ/JhOQOcmKy0QedLKHq4pHCCousYj5p6drEqu5hMEDmbRCdwKh0aLuBdixw5MvZzUBfwAuZ1gEnacjrVScdl+IiGC1aRW2ib8wITxRdqQir9v9RadyFfk5h+eeshODTre/WWBjH/JD5TP2/p5sJVzdfoDQTP30UB3g8scQEEMmljwdZQb66JNFZl31/s4W+TkmtXDboodN09R9RxJlpR09lSfFXQ5AFM4lwmj69LdAbjJWlw+58MsuZnFDPiXffQLuU2iKrJ2eO6pcPnPtoX6uWzg65/KU1Ft9srk9foicGNF7VnOG/gpIOvShlE6d+K88J2YT6gU+aOgvUdbndqnPzSIiT1M/80qKJG4qPK/0WqqOsmO+DqTASFX7TcsPdNkgayRTlf7eRgnqCWqtVWzHKbguJZQviPPjWdU8PJ9aldREWzsOlBrA4eTqM0lowCFezEiGadmhXa565UzdsYcKMBTMH9mjnh4pttctc73XcYPspovkoqWSAfdM0HisAxHZ3tdmVk0Yn5o/nwRmCIRH93/Be320De1ZyuBpLkWsbzE5XJ5x7xhLPxLEn1WtN2b9gLNOi3fLRchGXw89Ap5Z42i6D3A11erFttS7BNoAmAF8l1hzksygHq1iLocT+bH/8WaiBhl50oBxRPTEmobxWbviZhF1Zkvh6tx8uL3DwQbifcAco1uXePlRUc6+Y7HL5ouE1yfeLOE9vrn/ptFldcFmitKgWDCavDPszChBtAxw2/arNKf+tGobxM4/ycTWVmFEuMrfd70vcAtZ6ql5eUAhouaXmR9TIZzayDrkKDet9t+zx+MF8vuU4550LLKmPR073oh6sCHgnpYfm7Yzb271qfur03lnUuxOokRE21PA9GAEWAHoCMQxCoC6eaYC05V8MFVTgcQUaRCiZYOwHkHdMmmGYvmepU2W3uR0JfORYJ7e0uF/sYTi2V4Wgg== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.71.14; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769539166175158500 Content-Type: text/plain; charset="utf-8" Hyper-V supports PSCI 1.3, and that implementation is exposed through WHPX. Signed-off-by: Mohamed Mediouni Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier Reviewed-by: Akihiko Odaki --- target/arm/cpu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 6e1cbf3d61..7bfc3ecd2e 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -23,6 +23,7 @@ #include "qemu/timer.h" #include "qemu/log.h" #include "exec/page-vary.h" +#include "system/whpx.h" #include "target/arm/idau.h" #include "qemu/module.h" #include "qapi/error.h" @@ -1143,6 +1144,8 @@ static void arm_cpu_initfn(Object *obj) if (tcg_enabled() || hvf_enabled()) { /* TCG and HVF implement PSCI 1.1 */ cpu->psci_version =3D QEMU_PSCI_VERSION_1_1; + } else if (whpx_enabled()) { + cpu->psci_version =3D QEMU_PSCI_VERSION_1_3; } } =20 --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1769538973; cv=none; d=zohomail.com; s=zohoarc; b=Lkmn3uh3430VWB+eTgyXLEnZzcuudcKvt/vP4THixzN14NdcyJVtcAhNPjmRy6CZKUTKLgmoKQ0+QC5E80mEWI96/DCYp32MYOYLHgSCMYY/Xnuh2v+FeRXPUe/GNpfwJqXI+hhZYO7Nq7I6tGgcfSQAQpNUWKvT+vkPf7ylMwM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769538973; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=3CEC0K0yCRaDKfMtdWsQ+wsxVh2pkGJE98uF0Yg+sIc=; b=F+OeJadGNFT1F2M8VYn0tQEV5R2dsOrBbgn+NjMsq5gM/jqrmh86JxsOd2h/8iQFQkeMHiPE2nfWIlpSVktDXI50qo3zLrFFHmVlUOTTmzTU5ZwdMEW+l3x/pMkYViVBcZN5ZQV3CSqo6RIXv+i3cS29ttUTTovEoIDUH7lNyaQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769538973227335.510920679465; Tue, 27 Jan 2026 10:36:13 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vknrl-0001nF-FY; Tue, 27 Jan 2026 13:32:48 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknor-0002Dz-Ig for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:29:42 -0500 Received: from p-west2-cluster5-host3-snip4-4.eps.apple.com ([57.103.71.87] helo=outbound.mr.icloud.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknoo-0003lo-7j for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:29:41 -0500 Received: from outbound.mr.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPS id 1F0B318001E6; Tue, 27 Jan 2026 18:29:32 +0000 (UTC) Received: from localhost.localdomain (unknown [17.57.152.38]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPSA id 89FC718001E0; Tue, 27 Jan 2026 18:29:27 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; t=1769538573; x=1772130573; bh=3CEC0K0yCRaDKfMtdWsQ+wsxVh2pkGJE98uF0Yg+sIc=; h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme; b=PalTnNdeECTn7ol7T/A6fg/7KNUgeMQgJuZzpFcgkqNmmkKHW+GIPi3abBTKqUvb5m3UGaUJAcF9xUyTahdq/c2aQj8nTcGR/5kdQCvuQujmqG7YK2NsLj/cpIRZCH6/uB+NH7ShG4lrmU9uXtIkF7Flxmk0nvHfahRNm3DXbsR0nEd5Fy4QgAKmAeKkpIWX+BuJp/oo4a60X2jMhZulQldP4lD+79jgQYeyIKfyahnTIo086Wf/iKPVtne5tfuEcH/WZfXZlNAyDB3lSjzj3StIS11mcppyObwyREgAg+XnVuyXkZnF5qSzNCkhYMEfP8CKDe61a08JH4LzzEYUvw== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org, mohamed@unpredictable.fr Cc: Zhao Liu , "Michael S. Tsirkin" , Roman Bolshakov , qemu-arm@nongnu.org, Ani Sinha , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Akihiko Odaki , Marcel Apfelbaum , Pedro Barbuda , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Shannon Zhao , Igor Mammedov , Cameron Esfahani , Alexander Graf , Peter Maydell , Eduardo Habkost , Phil Dennis-Jordan , Pierrick Bouvier Subject: [PATCH v18 17/22] whpx: arm64: clamp down IPA size Date: Tue, 27 Jan 2026 19:27:57 +0100 Message-ID: <20260127182805.73212-18-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260127182805.73212-1-mohamed@unpredictable.fr> References: <20260127182805.73212-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: HUSDZ4HRI8y-y4ayE25e2nobPDpKYHR8 X-Authority-Info-Out: v=2.4 cv=bJQb4f+Z c=1 sm=1 tr=0 ts=6979040d cx=c_apl:c_apl_out:c_pps a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=Pkv3TnVKpG-98NsSaS0A:9 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDE1MCBTYWx0ZWRfX26nQ2EpbQ98I wY8iUgdmMIvwbo7IUm9PmpdgAcqYx4kqm/QBF9/PeEkF3vFWVWYhrZQFOsr3HLJSDk33ZX+i3Rl TucHhkgrkleCpYqkZtxcaQF7h1sR0o1xGHFQoAmSqKuG58LTz/Q1K8RUKOlMJ5pEmX2PRENsfqT qsceeGHeWDmogMgsPknBpJTtBWlkpXyQlLL9pwJ/xvOar0Cv76XdUJJh7TRqfO8AKrP+tMUBwZN jDrW9u7ijPBeEKIjfg58UTQeJv3Ct4PpMOy09J8QD2PcHZjYoA9e5EUosHJIgJfJPy/YRZcoZ6n c3mocI+PBAuPbe2Mno/Q71PyGVqAN5PrCkiSCnJ46thJmIh795pVQBXUWr3mfI= X-Proofpoint-ORIG-GUID: HUSDZ4HRI8y-y4ayE25e2nobPDpKYHR8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_04,2026-01-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 mlxlogscore=999 clxscore=1030 bulkscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 adultscore=0 mlxscore=0 phishscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601270150 X-JNJ: AAAAAAAB7dLqxbQE+RaG+pXmVsdIPXNVSlJsQF36+lwdbFrjD4A8//v/rEWv8/1mPzaRVocUWmK2WHvJJmiWZzkPSL6u5cZnBtJwhlhJm01X3jf2RzsfPdfVSk40oJTFGUxwXOacxSReBbHHVWmSwI84sJSHAop7m6zAvLcpy4GClV5II9gYqUpd3k89CeADtssk/spr03MLlAlgPKeK8fWBxPAVJ2Os73Rd1xiTCucFDIu10nRu/Frfq7DeivlAnh5wgfPCi6QGae2o8bWmrfeHtM6nW2a5L8oJ4mcf3F3T2kFx/sXHNODEhz0izWf3Y/1lyncjxkbxeSAmaWC2BeHRxYdi21Ey9k6O8WM7gyQWYNmG1Tgvh1zj9FZyYNqJu8oczhoR7O7jguLxghmG6m+fsP3sXKq2PhuXzABLdq3k12E9ZPZdtuhZdq8Qs1bLnJdlRM60LOtOaQAvI7UEvIVC2GcZO5TxEbPkGSDW4rugr2iqsiyfoGhOvYDc9aEPT81a2ZvbJcbRqm/ImTOBHwRWs8YRJ6tN0HoJ+XfGqCwrZnxobgIN63zMcuRrKsstISns1fi8b4mVoukY5HiFqpnTRY5SY769FTauce+9pBbCbeqaES8uiSUXEt+qlQKoijBDo7dqg7fKNt0q82H+LOeHPEOl0npy4tLG6nIbENUZRP4FN+9ZYS1ha34HtBKvUnbX+nyxotMQ/rQfiYkq/kFexcfqrXL/scX8SiS2DpMiCwPH7JVrSn6gC2loWw7WaAcm/nTGurmVfG4Omeqw/B4lcai3BQhO4zuB//hjxRjsLKjkgPBMieYgd9GaBOUE0YzUfrSiRQ7JC2NnAKXLTDevUooHMnnK/DCl1WjUBMPcjmBx9lHp+81ncpMGS4rthRMTvnUcm7oR8PBwK6G8fxh8/k6+qxPEMXPyzclHCA== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.71.87; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769538975056158500 Content-Type: text/plain; charset="utf-8" Code taken from HVF and adapted for WHPX use. Note that WHPX doesn't have a default vs maximum IPA distinction. Signed-off-by: Mohamed Mediouni Reviewed-by: Pierrick Bouvier --- hw/arm/virt.c | 32 ++++++++++++++++++++++++++ include/hw/core/boards.h | 1 + target/arm/whpx/meson.build | 2 ++ target/arm/whpx/whpx-all.c | 45 +++++++++++++++++++++++++++++++++++++ target/arm/whpx/whpx-stub.c | 15 +++++++++++++ target/arm/whpx_arm.h | 16 +++++++++++++ 6 files changed, 111 insertions(+) create mode 100644 target/arm/whpx/whpx-stub.c create mode 100644 target/arm/whpx_arm.h diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 9e989b721b..7a9bcd15fd 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -72,6 +72,7 @@ #include "hw/core/irq.h" #include "kvm_arm.h" #include "hvf_arm.h" +#include "whpx_arm.h" #include "hw/firmware/smbios.h" #include "qapi/visitor.h" #include "qapi/qapi-visit-common.h" @@ -3329,6 +3330,36 @@ static int virt_kvm_type(MachineState *ms, const cha= r *type_str) return fixed_ipa ? 0 : requested_pa_size; } =20 +static int virt_whpx_get_physical_address_range(MachineState *ms) +{ + VirtMachineState *vms =3D VIRT_MACHINE(ms); + + int max_ipa_size =3D whpx_arm_get_ipa_bit_size(); + + /* We freeze the memory map to compute the highest gpa */ + virt_set_memmap(vms, max_ipa_size); + + int requested_ipa_size =3D 64 - clz64(vms->highest_gpa); + + /* + * If we're <=3D the default IPA size just use the default. + * If we're above the default but below the maximum, round up to + * the maximum. whpx_arm_get_max_ipa_bit_size() conveniently only + * returns values that are valid ARM PARange values. + */ + if (requested_ipa_size <=3D max_ipa_size) { + requested_ipa_size =3D max_ipa_size; + } else { + error_report("-m and ,maxmem option values " + "require an IPA range (%d bits) larger than " + "the one supported by the host (%d bits)", + requested_ipa_size, max_ipa_size); + return -1; + } + + return requested_ipa_size; +} + static int virt_hvf_get_physical_address_range(MachineState *ms) { VirtMachineState *vms =3D VIRT_MACHINE(ms); @@ -3428,6 +3459,7 @@ static void virt_machine_class_init(ObjectClass *oc, = const void *data) mc->get_default_cpu_node_id =3D virt_get_default_cpu_node_id; mc->kvm_type =3D virt_kvm_type; mc->hvf_get_physical_address_range =3D virt_hvf_get_physical_address_r= ange; + mc->whpx_get_physical_address_range =3D virt_whpx_get_physical_address= _range; assert(!mc->get_hotplug_handler); mc->get_hotplug_handler =3D virt_machine_get_hotplug_handler; hc->pre_plug =3D virt_machine_device_pre_plug_cb; diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h index 07f8938752..0b2aefb126 100644 --- a/include/hw/core/boards.h +++ b/include/hw/core/boards.h @@ -278,6 +278,7 @@ struct MachineClass { void (*wakeup)(MachineState *state); int (*kvm_type)(MachineState *machine, const char *arg); int (*hvf_get_physical_address_range)(MachineState *machine); + int (*whpx_get_physical_address_range)(MachineState *machine); =20 BlockInterfaceType block_default_type; int units_per_default_bus; diff --git a/target/arm/whpx/meson.build b/target/arm/whpx/meson.build index 1de2ef0283..3df632c9d3 100644 --- a/target/arm/whpx/meson.build +++ b/target/arm/whpx/meson.build @@ -1,3 +1,5 @@ arm_system_ss.add(when: 'CONFIG_WHPX', if_true: files( 'whpx-all.c', )) + +arm_common_system_ss.add(when: 'CONFIG_WHPX', if_false: files('whpx-stub.c= ')) diff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c index 192d7ec7a8..850f6ec81f 100644 --- a/target/arm/whpx/whpx-all.c +++ b/target/arm/whpx/whpx-all.c @@ -35,6 +35,7 @@ #include "system/whpx-accel-ops.h" #include "system/whpx-all.h" #include "system/whpx-common.h" +#include "whpx_arm.h" #include "hw/arm/bsa.h" #include "arm-powerctl.h" =20 @@ -633,6 +634,40 @@ static void whpx_cpu_update_state(void *opaque, bool r= unning, RunState state) { } =20 +uint32_t whpx_arm_get_ipa_bit_size(void) +{ + WHV_CAPABILITY whpx_cap; + UINT32 whpx_cap_size; + HRESULT hr; + hr =3D whp_dispatch.WHvGetCapability( + WHvCapabilityCodePhysicalAddressWidth, &whpx_cap, + sizeof(whpx_cap), &whpx_cap_size); + if (FAILED(hr)) { + error_report("WHPX: failed to get supported " + "physical address width, hr=3D%08lx", hr); + } + + /* + * We clamp any IPA size we want to back the VM with to a valid PARange + * value so the guest doesn't try and map memory outside of the valid = range. + * This logic just clamps the passed in IPA bit size to the first valid + * PARange value <=3D to it. + */ + return round_down_to_parange_bit_size(whpx_cap.PhysicalAddressWidth); +} + +static void clamp_id_aa64mmfr0_parange_to_ipa_size(ARMISARegisters *isar) +{ + uint32_t ipa_size =3D whpx_arm_get_ipa_bit_size(); + uint64_t id_aa64mmfr0; + + /* Clamp down the PARange to the IPA size the kernel supports. */ + uint8_t index =3D round_down_to_parange_index(ipa_size); + id_aa64mmfr0 =3D GET_IDREG(isar, ID_AA64MMFR0); + id_aa64mmfr0 =3D (id_aa64mmfr0 & ~R_ID_AA64MMFR0_PARANGE_MASK) | index; + SET_IDREG(isar, ID_AA64MMFR0, id_aa64mmfr0); +} + int whpx_init_vcpu(CPUState *cpu) { HRESULT hr; @@ -706,6 +741,7 @@ int whpx_init_vcpu(CPUState *cpu) val.Reg64 =3D deposit64(arm_cpu->mp_affinity, 31, 1, 1 /* RES1 */); whpx_set_reg(cpu, WHvArm64RegisterMpidrEl1, val); =20 + clamp_id_aa64mmfr0_parange_to_ipa_size(&arm_cpu->isar); return 0; } =20 @@ -722,6 +758,8 @@ int whpx_accel_init(AccelState *as, MachineState *ms) UINT32 whpx_cap_size; WHV_PARTITION_PROPERTY prop; WHV_CAPABILITY_FEATURES features; + MachineClass *mc =3D MACHINE_GET_CLASS(ms); + int pa_range =3D 0; =20 whpx =3D &whpx_global; /* on arm64 Windows Hypervisor Platform, vGICv3 always used */ @@ -732,6 +770,13 @@ int whpx_accel_init(AccelState *as, MachineState *ms) goto error; } =20 + if (mc->whpx_get_physical_address_range) { + pa_range =3D mc->whpx_get_physical_address_range(ms); + if (pa_range < 0) { + return -EINVAL; + } + } + whpx->mem_quota =3D ms->ram_size; =20 hr =3D whp_dispatch.WHvGetCapability( diff --git a/target/arm/whpx/whpx-stub.c b/target/arm/whpx/whpx-stub.c new file mode 100644 index 0000000000..32e434a5f6 --- /dev/null +++ b/target/arm/whpx/whpx-stub.c @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * WHPX stubs for ARM + * + * Copyright (c) 2025 Mohamed Mediouni + * + */ + +#include "qemu/osdep.h" +#include "whpx_arm.h" + +uint32_t whpx_arm_get_ipa_bit_size(void) +{ + g_assert_not_reached(); +} diff --git a/target/arm/whpx_arm.h b/target/arm/whpx_arm.h new file mode 100644 index 0000000000..de7406b66f --- /dev/null +++ b/target/arm/whpx_arm.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * WHPX support -- ARM specifics + * + * Copyright (c) 2025 Mohamed Mediouni + * + */ + +#ifndef QEMU_WHPX_ARM_H +#define QEMU_WHPX_ARM_H + +#include "target/arm/cpu-qom.h" + +uint32_t whpx_arm_get_ipa_bit_size(void); + +#endif --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1769538988; cv=none; d=zohomail.com; s=zohoarc; b=DKUoPUV7+U35VNSpCk7BK5atowVJRTC6cvSBlKzI+P++yH27u9j/4S7eZ1mbFdcyT08Sop8odZ/pB+2QmzhNY2bjsDB381O+ltTOxZT/mF6sP0ICKCiDqLSmVhWubLbLwk872xKuVXQh9ccAjGjd9CNFm82RS5VufBU/1/M0Xxo= ARC-Message-Signature: i=1; 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Tsirkin" , Roman Bolshakov , qemu-arm@nongnu.org, Ani Sinha , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Akihiko Odaki , Marcel Apfelbaum , Pedro Barbuda , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Shannon Zhao , Igor Mammedov , Cameron Esfahani , Alexander Graf , Peter Maydell , Eduardo Habkost , Phil Dennis-Jordan , Pierrick Bouvier Subject: [PATCH v18 18/22] hw/arm, accel/hvf, whpx: unify get_physical_address_range between WHPX and HVF Date: Tue, 27 Jan 2026 19:27:58 +0100 Message-ID: <20260127182805.73212-19-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260127182805.73212-1-mohamed@unpredictable.fr> References: <20260127182805.73212-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: ssQgTqKzpzcm2wO5bpqOZWFmxrX3P8XR X-Authority-Info-Out: v=2.4 cv=V5BwEOni c=1 sm=1 tr=0 ts=69790411 cx=c_apl:c_apl_out:c_pps a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=2TttH9MEl-kxELt7c1gA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDE1MCBTYWx0ZWRfX339OSDK34jCk laQ0xp6aiEg1Fl3meBPxjW21y9LPIdt6zuNqZrzhwNZlsYEjWtlz6XuNQ/Qe1cxuF0yF6IX4e6q UJxlWDbrMej62V7hiJwzKg/TcXhlHoWe5wyKEYGVFGQTXyj522YP/VJDjTcxUq8vQolWUtnliVz kRunBzz1Ba1GRDKAwEMjzA3vTs/JUv1C04aGoz4nDFcWYWM01midrIfbO/sRstUcq4PlC2L8lhv CkbZ34GY0CM1yFtWC9c4YmCkB8XxtBwAhiEN/OQ0/4KN3Cp6xLJ9P2/LwF2UAyLhkctmrvyy1s0 tCSasHC53XFxaKESBu0dErM0NcoSOBonaNNsaeCXj/R43Eh2rawi14x98byorE= X-Proofpoint-GUID: ssQgTqKzpzcm2wO5bpqOZWFmxrX3P8XR X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_04,2026-01-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 mlxlogscore=999 suspectscore=0 bulkscore=0 clxscore=1030 mlxscore=0 phishscore=0 spamscore=0 malwarescore=0 lowpriorityscore=0 adultscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601270150 X-JNJ: AAAAAAABtj/G/jS/1ZAaXZxJnRnsH5DyAzwyynmOVfB7ac6s+w5C7JmHfsInCBBHN0t+IGAZzRTZ17Buc5PkPRkZO7f3y09oKlDTmyJqeIYOojMj9e9DszlahUQfv6k2lAigMXHZ6q61GIN8Ha7yBiN4o97TC0ln0ptykYEXF4BuDTN0ZFli3HsgOiklry/CthEld5nh1IZtillXGxqDCZ6ZfY210cPW/aFZhdXmrKn7S7zQise2IPHu5BmGwjFxyYShbM8G2JoY3dFSAe0Y2uqkkUKvkZ7cSawruF1optkxZbN4lz1pW8uUfEKPLQBkhrBb4WQfsFQBmmcQRZWDEiuyRn5gsOK3C8JL0MK7ncIo7LWTenMQhx0ThfnY2K2s7hkBc1zqgMt6N2GzEBmrnaCVpFNIXy6oOTp7z+AKaI0w6/p6llVtkZHmnLspm86r8zJoAs5mA7zYWWrjvo649LyMmEROuV0L/ZKo8XVP4aRnW3PqHFT7ZBUlbL4Q3dNebsxR1SwlMM/Ly2cGfxyiqPFrSmLZM7kiKusqFWPqaUFugoH1YxyBzNY2lxoq4LZMMArsYIURD0e+7OAj8OPFqkMTFeWUB6AD96mzMfKJrCj32Fzqa5mMQ3CLxXS14TtN9/Roi594E5QaTwnEmdKiqXLYU9/brUtOTRwokUQGn/GZCXncFSX+UltOzIX4XuoFF9AylaiQiT0w/T83qogME2RkMCZMkLobW0RyXcUl1TkmbW8MfwWcfs7qr3TlYqnx/8r1j2HGQqwfLEKVF/IVUOsAI8FSShwC0DLCRstivFQxU3/ZodZk2OuXCRMFogNpjz4kIOSylA7Ly1KVBI4UXfKj8Is3+FQnOMUt6QwM3yw4ll+7P+MxSXweHngFcIo7AAf6khFlO9cXqjs+GzNdd0VN8f26arUcuX00UfiN77Wwt8fJgiLFAuNbmj8OFgI/HF5V5OjpMEX4xsU= Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.71.8; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769538990713154100 Signed-off-by: Mohamed Mediouni Reviewed-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- accel/hvf/hvf-all.c | 7 +++++-- hw/arm/virt.c | 43 +++++--------------------------------- include/hw/core/boards.h | 4 ++-- include/system/hvf_int.h | 4 ++++ target/arm/hvf-stub.c | 20 ------------------ target/arm/hvf/hvf.c | 6 +++--- target/arm/hvf_arm.h | 3 --- target/arm/meson.build | 1 - target/arm/whpx/whpx-all.c | 5 +++-- target/i386/hvf/hvf.c | 11 ++++++++++ 10 files changed, 33 insertions(+), 71 deletions(-) delete mode 100644 target/arm/hvf-stub.c diff --git a/accel/hvf/hvf-all.c b/accel/hvf/hvf-all.c index 0fbe27dfa2..033c677b6f 100644 --- a/accel/hvf/hvf-all.c +++ b/accel/hvf/hvf-all.c @@ -18,6 +18,7 @@ #include "system/hvf_int.h" #include "hw/core/cpu.h" #include "hw/core/boards.h" +#include "target/arm/hvf_arm.h" #include "trace.h" =20 bool hvf_allowed; @@ -186,8 +187,10 @@ static int hvf_accel_init(AccelState *as, MachineState= *ms) int pa_range =3D 36; MachineClass *mc =3D MACHINE_GET_CLASS(ms); =20 - if (mc->hvf_get_physical_address_range) { - pa_range =3D mc->hvf_get_physical_address_range(ms); + + if (mc->get_physical_address_range) { + pa_range =3D mc->get_physical_address_range(ms, + hvf_arch_get_default_ipa_bit_size(), hvf_arch_get_max_ipa_bit_= size()); if (pa_range < 0) { return -EINVAL; } diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 7a9bcd15fd..fd9a3ed480 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -3330,43 +3330,11 @@ static int virt_kvm_type(MachineState *ms, const ch= ar *type_str) return fixed_ipa ? 0 : requested_pa_size; } =20 -static int virt_whpx_get_physical_address_range(MachineState *ms) +static int virt_get_physical_address_range(MachineState *ms, + int default_ipa_size, int max_ipa_size) { VirtMachineState *vms =3D VIRT_MACHINE(ms); =20 - int max_ipa_size =3D whpx_arm_get_ipa_bit_size(); - - /* We freeze the memory map to compute the highest gpa */ - virt_set_memmap(vms, max_ipa_size); - - int requested_ipa_size =3D 64 - clz64(vms->highest_gpa); - - /* - * If we're <=3D the default IPA size just use the default. - * If we're above the default but below the maximum, round up to - * the maximum. whpx_arm_get_max_ipa_bit_size() conveniently only - * returns values that are valid ARM PARange values. - */ - if (requested_ipa_size <=3D max_ipa_size) { - requested_ipa_size =3D max_ipa_size; - } else { - error_report("-m and ,maxmem option values " - "require an IPA range (%d bits) larger than " - "the one supported by the host (%d bits)", - requested_ipa_size, max_ipa_size); - return -1; - } - - return requested_ipa_size; -} - -static int virt_hvf_get_physical_address_range(MachineState *ms) -{ - VirtMachineState *vms =3D VIRT_MACHINE(ms); - - int default_ipa_size =3D hvf_arm_get_default_ipa_bit_size(); - int max_ipa_size =3D hvf_arm_get_max_ipa_bit_size(); - /* We freeze the memory map to compute the highest gpa */ virt_set_memmap(vms, max_ipa_size); =20 @@ -3375,8 +3343,8 @@ static int virt_hvf_get_physical_address_range(Machin= eState *ms) /* * If we're <=3D the default IPA size just use the default. * If we're above the default but below the maximum, round up to - * the maximum. hvf_arm_get_max_ipa_bit_size() conveniently only - * returns values that are valid ARM PARange values. + * the maximum. hvf/whpx_arch_get_max_ipa_bit_size() conveniently only + * return values that are valid ARM PARange values. */ if (requested_ipa_size <=3D default_ipa_size) { requested_ipa_size =3D default_ipa_size; @@ -3458,8 +3426,7 @@ static void virt_machine_class_init(ObjectClass *oc, = const void *data) mc->get_valid_cpu_types =3D virt_get_valid_cpu_types; mc->get_default_cpu_node_id =3D virt_get_default_cpu_node_id; mc->kvm_type =3D virt_kvm_type; - mc->hvf_get_physical_address_range =3D virt_hvf_get_physical_address_r= ange; - mc->whpx_get_physical_address_range =3D virt_whpx_get_physical_address= _range; + mc->get_physical_address_range =3D virt_get_physical_address_range; assert(!mc->get_hotplug_handler); mc->get_hotplug_handler =3D virt_machine_get_hotplug_handler; hc->pre_plug =3D virt_machine_device_pre_plug_cb; diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h index 0b2aefb126..26e0879e1a 100644 --- a/include/hw/core/boards.h +++ b/include/hw/core/boards.h @@ -277,8 +277,8 @@ struct MachineClass { void (*reset)(MachineState *state, ResetType type); void (*wakeup)(MachineState *state); int (*kvm_type)(MachineState *machine, const char *arg); - int (*hvf_get_physical_address_range)(MachineState *machine); - int (*whpx_get_physical_address_range)(MachineState *machine); + int (*get_physical_address_range)(MachineState *machine, + int default_ipa_size, int max_ipa_size); =20 BlockInterfaceType block_default_type; int units_per_default_bus; diff --git a/include/system/hvf_int.h b/include/system/hvf_int.h index 96790b4938..2621164cb2 100644 --- a/include/system/hvf_int.h +++ b/include/system/hvf_int.h @@ -57,6 +57,8 @@ void assert_hvf_ok_impl(hv_return_t ret, const char *file= , unsigned int line, const char *hvf_return_string(hv_return_t ret); int hvf_arch_init(void); hv_return_t hvf_arch_vm_create(MachineState *ms, uint32_t pa_range); +uint32_t hvf_arch_get_default_ipa_bit_size(void); +uint32_t hvf_arch_get_max_ipa_bit_size(void); void hvf_kick_vcpu_thread(CPUState *cpu); =20 /* Must be called by the owning thread */ @@ -107,5 +109,7 @@ int hvf_update_guest_debug(CPUState *cpu); bool hvf_arch_supports_guest_debug(void); =20 bool hvf_arch_cpu_realize(CPUState *cpu, Error **errp); +uint32_t hvf_arch_get_default_ipa_bit_size(void); +uint32_t hvf_arch_get_max_ipa_bit_size(void); =20 #endif diff --git a/target/arm/hvf-stub.c b/target/arm/hvf-stub.c deleted file mode 100644 index ff137267a0..0000000000 --- a/target/arm/hvf-stub.c +++ /dev/null @@ -1,20 +0,0 @@ -/* - * QEMU Hypervisor.framework (HVF) stubs for ARM - * - * Copyright (c) Linaro - * - * SPDX-License-Identifier: GPL-2.0-or-later - */ - -#include "qemu/osdep.h" -#include "hvf_arm.h" - -uint32_t hvf_arm_get_default_ipa_bit_size(void) -{ - g_assert_not_reached(); -} - -uint32_t hvf_arm_get_max_ipa_bit_size(void) -{ - g_assert_not_reached(); -} diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index e4c0d936f1..74b6f5e7db 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -729,7 +729,7 @@ static uint64_t hvf_get_reg(CPUState *cpu, int rt) static void clamp_id_aa64mmfr0_parange_to_ipa_size(ARMISARegisters *isar) { uint32_t ipa_size =3D chosen_ipa_bit_size ? - chosen_ipa_bit_size : hvf_arm_get_max_ipa_bit_size(); + chosen_ipa_bit_size : hvf_arch_get_max_ipa_bit_size(); uint64_t id_aa64mmfr0; =20 /* Clamp down the PARange to the IPA size the kernel supports. */ @@ -825,7 +825,7 @@ static bool hvf_arm_get_host_cpu_features(ARMHostCPUFea= tures *ahcf) return r =3D=3D HV_SUCCESS; } =20 -uint32_t hvf_arm_get_default_ipa_bit_size(void) +uint32_t hvf_arch_get_default_ipa_bit_size(void) { uint32_t default_ipa_size; hv_return_t ret =3D hv_vm_config_get_default_ipa_size(&default_ipa_siz= e); @@ -834,7 +834,7 @@ uint32_t hvf_arm_get_default_ipa_bit_size(void) return default_ipa_size; } =20 -uint32_t hvf_arm_get_max_ipa_bit_size(void) +uint32_t hvf_arch_get_max_ipa_bit_size(void) { uint32_t max_ipa_size; hv_return_t ret =3D hv_vm_config_get_max_ipa_size(&max_ipa_size); diff --git a/target/arm/hvf_arm.h b/target/arm/hvf_arm.h index ea82f2691d..5d19d82e5d 100644 --- a/target/arm/hvf_arm.h +++ b/target/arm/hvf_arm.h @@ -22,7 +22,4 @@ void hvf_arm_init_debug(void); =20 void hvf_arm_set_cpu_features_from_host(ARMCPU *cpu); =20 -uint32_t hvf_arm_get_default_ipa_bit_size(void); -uint32_t hvf_arm_get_max_ipa_bit_size(void); - #endif diff --git a/target/arm/meson.build b/target/arm/meson.build index ce155ba9b4..1ddc4b2a54 100644 --- a/target/arm/meson.build +++ b/target/arm/meson.build @@ -41,7 +41,6 @@ arm_common_system_ss.add(files('cpu.c')) arm_common_system_ss.add(when: 'TARGET_AARCH64', if_false: files( 'cpu32-stubs.c')) arm_common_system_ss.add(when: 'CONFIG_KVM', if_false: files('kvm-stub.c')) -arm_common_system_ss.add(when: 'CONFIG_HVF', if_false: files('hvf-stub.c')) arm_common_system_ss.add(when: 'CONFIG_ARM_COMPATIBLE_SEMIHOSTING', if_true: files('common-semi-target.c')) arm_common_system_ss.add(files( diff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c index 850f6ec81f..6067918b27 100644 --- a/target/arm/whpx/whpx-all.c +++ b/target/arm/whpx/whpx-all.c @@ -770,8 +770,9 @@ int whpx_accel_init(AccelState *as, MachineState *ms) goto error; } =20 - if (mc->whpx_get_physical_address_range) { - pa_range =3D mc->whpx_get_physical_address_range(ms); + if (mc->get_physical_address_range) { + pa_range =3D mc->get_physical_address_range(ms, + whpx_arm_get_ipa_bit_size(), whpx_arm_get_ipa_bit_size()); if (pa_range < 0) { return -EINVAL; } diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 7cfaee389e..ce54020f00 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -228,6 +228,17 @@ int hvf_arch_init(void) return 0; } =20 +/* 48-bit on all Intel Macs. Function currently unused. */ +uint32_t hvf_arch_get_default_ipa_bit_size(void) +{ + g_assert_not_reached(); +} + +uint32_t hvf_arch_get_max_ipa_bit_size(void) +{ + g_assert_not_reached(); +} + hv_return_t hvf_arch_vm_create(MachineState *ms, uint32_t pa_range) { return hv_vm_create(HV_VM_DEFAULT); --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1769538884; cv=none; d=zohomail.com; s=zohoarc; b=h5NTtRvIehpBhHK5/PsNtqR9S57ZR5pZiVCBW0rsPn9a1r4Cek4+iYFjvgTLkgopT3KmWIsucgM2MHqdsYUBfER8usezO+ygq+FUvKLUdQNUczk6ql1b3Ou1Q/YbCWmI6ZJpzYNhBgkigBXDmO/jwGHQJcv7b/HeFWMlZX5S0HE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769538884; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=D9dMRQ5z3xomTmo157AA3bI1OBJkHwbU8UBW04yIxKY=; b=HONHpi1unDthJdjgrDgTeSWIuOB7q5naayIpI1Lk50ZbckJ40rdu0y/cdJQOYsnsGFFJu/qJxh1GjII3CjvseNmgmOGHVG2U0jpopOMqkw6jSY8xnoOeRlvHZaRy5DGN3KFZGyOkNFsj8mnVA8FoQQS9rMH1TKqmMSOJQmiVCNw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769538883700327.78647809714596; Tue, 27 Jan 2026 10:34:43 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vknrM-0001Hg-Kc; Tue, 27 Jan 2026 13:32:16 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknow-0002bR-D0 for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:29:46 -0500 Received: from p-west2-cluster5-host7-snip4-10.eps.apple.com ([57.103.71.73] helo=outbound.mr.icloud.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknot-0003ot-VR for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:29:45 -0500 Received: from outbound.mr.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPS id 4DE941800137; Tue, 27 Jan 2026 18:29:41 +0000 (UTC) Received: from localhost.localdomain (unknown [17.57.152.38]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPSA id BBBD91800957; Tue, 27 Jan 2026 18:29:36 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; t=1769538582; x=1772130582; bh=D9dMRQ5z3xomTmo157AA3bI1OBJkHwbU8UBW04yIxKY=; h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme; b=UDFWW/SFCZE8rcK//swBIHUPzY6WM4/7032EXmjdJ88Qw1k4pMhB4a4mMIOn0lgWetlXWJv5Q3tEZaxpnniQcocj+8BUYunUU6bd2WRBAC89G96H3+xF+gBs1188Zhv5asjJ+4ibHZLTfcGwOt8n8G4JzUQf3EnOSrzKoL2KjlXwrI0hDrubQssa/lrJyt/Cs+qKZ7feshUwh21L0CJ8WR3uiPi1wlMfF3l4QTJOOwW3xDV0E2qNdS28jDgY20+GVfods1H1664dbOjuZCQM5aoivNrLId0VwKuXhGBtMOH1YAPgu8opSyQAJpUX8+F9rT1LSDowmxJQ/ews/iA8ig== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org, mohamed@unpredictable.fr Cc: Zhao Liu , "Michael S. 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charset="utf-8" Logic to fetch MIDR_EL1 for cpu 0 adapted from: https://github.com/FEX-Emu/FEX/blob/e6de17e72ef03aa88ba14fa0ec13163061608c7= 4/Source/Windows/Common/CPUFeatures.cpp#L62 Signed-off-by: Mohamed Mediouni Reviewed-by: Pierrick Bouvier Reviewed-by: Akihiko Odaki --- target/arm/cpu64.c | 17 +++--- target/arm/whpx/whpx-all.c | 104 +++++++++++++++++++++++++++++++++++++ target/arm/whpx_arm.h | 1 + 3 files changed, 116 insertions(+), 6 deletions(-) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index bf30381370..689babe822 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -26,10 +26,13 @@ #include "qemu/units.h" #include "system/kvm.h" #include "system/hvf.h" +#include "system/whpx.h" +#include "system/hw_accel.h" #include "system/qtest.h" #include "system/tcg.h" #include "kvm_arm.h" #include "hvf_arm.h" +#include "whpx_arm.h" #include "qapi/visitor.h" #include "hw/core/qdev-properties.h" #include "internals.h" @@ -521,7 +524,7 @@ void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp) isar2 =3D FIELD_DP64(isar2, ID_AA64ISAR2, APA3, 0); isar2 =3D FIELD_DP64(isar2, ID_AA64ISAR2, GPA3, 0); =20 - if (kvm_enabled() || hvf_enabled()) { + if (hwaccel_enabled()) { /* * Exit early if PAuth is enabled and fall through to disable it. * The algorithm selection properties are not present. @@ -598,10 +601,10 @@ void aarch64_add_pauth_properties(Object *obj) =20 /* Default to PAUTH on, with the architected algorithm on TCG. */ qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_property); - if (kvm_enabled() || hvf_enabled()) { + if (hwaccel_enabled()) { /* * Mirror PAuth support from the probed sysregs back into the - * property for KVM or hvf. Is it just a bit backward? Yes it is! + * property for HW accel. Is it just a bit backward? Yes it is! * Note that prop_pauth is true whether the host CPU supports the * architected QARMA5 algorithm or the IMPDEF one. We don't * provide the separate pauth-impdef property for KVM or hvf, @@ -769,6 +772,8 @@ static void aarch64_host_initfn(Object *obj) } #elif defined(CONFIG_HVF) hvf_arm_set_cpu_features_from_host(cpu); +#elif defined(CONFIG_WHPX) + whpx_arm_set_cpu_features_from_host(cpu); #else g_assert_not_reached(); #endif @@ -779,8 +784,8 @@ static void aarch64_host_initfn(Object *obj) =20 static void aarch64_max_initfn(Object *obj) { - if (kvm_enabled() || hvf_enabled()) { - /* With KVM or HVF, '-cpu max' is identical to '-cpu host' */ + if (hwaccel_enabled()) { + /* When hardware acceleration enabled, '-cpu max' is identical to = '-cpu host' */ aarch64_host_initfn(obj); return; } @@ -799,7 +804,7 @@ static const ARMCPUInfo aarch64_cpus[] =3D { { .name =3D "cortex-a57", .initfn =3D aarch64_a57_initfn }, { .name =3D "cortex-a53", .initfn =3D aarch64_a53_initfn }, { .name =3D "max", .initfn =3D aarch64_max_initfn }, -#if defined(CONFIG_KVM) || defined(CONFIG_HVF) +#if defined(CONFIG_KVM) || defined(CONFIG_HVF) || defined(CONFIG_WHPX) { .name =3D "host", .initfn =3D aarch64_host_initfn }, #endif }; diff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c index 6067918b27..c88c67a9e2 100644 --- a/target/arm/whpx/whpx-all.c +++ b/target/arm/whpx/whpx-all.c @@ -41,6 +41,17 @@ =20 #include #include +#include + +typedef struct ARMHostCPUFeatures { + ARMISARegisters isar; + uint64_t features; + uint64_t midr; + uint32_t reset_sctlr; + const char *dtb_compatible; +} ARMHostCPUFeatures; + +static ARMHostCPUFeatures arm_host_cpu_features; =20 typedef struct WHPXRegMatch { WHV_REGISTER_NAME reg; @@ -668,6 +679,99 @@ static void clamp_id_aa64mmfr0_parange_to_ipa_size(ARM= ISARegisters *isar) SET_IDREG(isar, ID_AA64MMFR0, id_aa64mmfr0); } =20 +static uint64_t whpx_read_midr(void) +{ + HKEY key; + uint64_t midr_el1; + DWORD size =3D sizeof(midr_el1); + const char *path =3D "Hardware\\Description\\System\\CentralProcessor\= \0\\"; + assert(!RegOpenKeyExA(HKEY_LOCAL_MACHINE, path, 0, KEY_READ, &key)); + assert(!RegGetValueA(key, NULL, "CP 4000", RRF_RT_REG_QWORD, NULL, &mi= dr_el1, &size)); + RegCloseKey(key); + return midr_el1; +} + +static bool whpx_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) +{ + const struct isar_regs { + WHV_REGISTER_NAME reg; + uint64_t *val; + } regs[] =3D { + { WHvArm64RegisterIdAa64Pfr0El1, &ahcf->isar.idregs[ID_AA64PFR0_EL= 1_IDX] }, + { WHvArm64RegisterIdAa64Pfr1El1, &ahcf->isar.idregs[ID_AA64PFR1_EL= 1_IDX] }, + { WHvArm64RegisterIdAa64Dfr0El1, &ahcf->isar.idregs[ID_AA64DFR0_EL= 1_IDX] }, + { WHvArm64RegisterIdAa64Dfr1El1 , &ahcf->isar.idregs[ID_AA64DFR1_E= L1_IDX] }, + { WHvArm64RegisterIdAa64Isar0El1, &ahcf->isar.idregs[ID_AA64ISAR0_= EL1_IDX] }, + { WHvArm64RegisterIdAa64Isar1El1, &ahcf->isar.idregs[ID_AA64ISAR1_= EL1_IDX] }, + { WHvArm64RegisterIdAa64Isar2El1, &ahcf->isar.idregs[ID_AA64ISAR2_= EL1_IDX] }, + { WHvArm64RegisterIdAa64Mmfr0El1, &ahcf->isar.idregs[ID_AA64MMFR0_= EL1_IDX] }, + { WHvArm64RegisterIdAa64Mmfr1El1, &ahcf->isar.idregs[ID_AA64MMFR1_= EL1_IDX] }, + { WHvArm64RegisterIdAa64Mmfr2El1, &ahcf->isar.idregs[ID_AA64MMFR2_= EL1_IDX] }, + { WHvArm64RegisterIdAa64Mmfr3El1, &ahcf->isar.idregs[ID_AA64MMFR2_= EL1_IDX] } + }; + + int i; + WHV_REGISTER_VALUE val; + + ahcf->dtb_compatible =3D "arm,armv8"; + ahcf->features =3D (1ULL << ARM_FEATURE_V8) | + (1ULL << ARM_FEATURE_NEON) | + (1ULL << ARM_FEATURE_AARCH64) | + (1ULL << ARM_FEATURE_PMU) | + (1ULL << ARM_FEATURE_GENERIC_TIMER); + + for (i =3D 0; i < ARRAY_SIZE(regs); i++) { + clean_whv_register_value(&val); + whpx_get_global_reg(regs[i].reg, &val); + *regs[i].val =3D val.Reg64; + } + + /* + * MIDR_EL1 is not a global register on WHPX + * As such, read the CPU0 from the registry to get a consistent value. + * Otherwise, on heterogenous systems, you'll get variance between CPU= s. + */ + ahcf->midr =3D whpx_read_midr(); + + clamp_id_aa64mmfr0_parange_to_ipa_size(&ahcf->isar); + + /* + * Disable SVE, which is not supported by QEMU whpx yet. + * Work needed for SVE support: + * - SVE state save/restore + * - any potentially needed VL management + * Also disable SME at the same time. (not currently supported by Hype= r-V) + */ + SET_IDREG(&ahcf->isar, ID_AA64PFR0, + GET_IDREG(&ahcf->isar, ID_AA64PFR0) & ~R_ID_AA64PFR0_SVE_MAS= K); + + SET_IDREG(&ahcf->isar, ID_AA64PFR1, + GET_IDREG(&ahcf->isar, ID_AA64PFR1) & ~R_ID_AA64PFR1_SME_MAS= K); + + return true; +} + +void whpx_arm_set_cpu_features_from_host(ARMCPU *cpu) +{ + if (!arm_host_cpu_features.dtb_compatible) { + if (!whpx_enabled() || + !whpx_arm_get_host_cpu_features(&arm_host_cpu_features)) { + /* + * We can't report this error yet, so flag that we need to + * in arm_cpu_realizefn(). + */ + cpu->host_cpu_probe_failed =3D true; + return; + } + } + + cpu->dtb_compatible =3D arm_host_cpu_features.dtb_compatible; + cpu->isar =3D arm_host_cpu_features.isar; + cpu->env.features =3D arm_host_cpu_features.features; + cpu->midr =3D arm_host_cpu_features.midr; + cpu->reset_sctlr =3D arm_host_cpu_features.reset_sctlr; +} + int whpx_init_vcpu(CPUState *cpu) { HRESULT hr; diff --git a/target/arm/whpx_arm.h b/target/arm/whpx_arm.h index de7406b66f..df65fd753c 100644 --- a/target/arm/whpx_arm.h +++ b/target/arm/whpx_arm.h @@ -12,5 +12,6 @@ #include "target/arm/cpu-qom.h" =20 uint32_t whpx_arm_get_ipa_bit_size(void); +void whpx_arm_set_cpu_features_from_host(ARMCPU *cpu); =20 #endif --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1769538822; cv=none; d=zohomail.com; s=zohoarc; b=YiW59DuBostRFor3GQhVroyWmXSy0RK8gop0LJHKG7Oc6Oq/ifx79aHi9BVjUVNR7nHx4YKC2LZiIql1PefRwIDpwY1Ry1uBlnuIwhdUuLuJ2WoZqEPgK5iE48FCLK2J2Moc8si0IeIoK864VJig892DM6DkFFiOnNjRBEKkGSg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769538822; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=sbPjhD1HbjqmKWH8q+YsBZgWt0PU5qx63I+bE83pR2M=; b=I3tu4LC/PSl+XFITNil0dzJDBP0TDEy3ioHHxETHaGSgZw14alLqb3xxeXzGOd9KGqMtF8/FeokCkk6PgkIN+MIO4M8v7bE7Zy92oHQPm/QiUt6atgLeDk5b0hcHjJib8TrtTu6Hw9xnUESjnwRqv2ySm+2OoyfwITqiav5Sro0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769538822618782.3203191596948; Tue, 27 Jan 2026 10:33:42 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vknrv-0001sT-Tn; Tue, 27 Jan 2026 13:32:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknp0-0002xy-Hu for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:29:50 -0500 Received: from p-west2-cluster5-host7-snip4-5.eps.apple.com ([57.103.71.68] helo=outbound.mr.icloud.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknoy-0003qi-ON for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:29:50 -0500 Received: from outbound.mr.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPS id D8F3A1800957; Tue, 27 Jan 2026 18:29:45 +0000 (UTC) Received: from localhost.localdomain (unknown [17.57.152.38]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPSA id 5AF521800274; Tue, 27 Jan 2026 18:29:41 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; t=1769538587; x=1772130587; bh=sbPjhD1HbjqmKWH8q+YsBZgWt0PU5qx63I+bE83pR2M=; h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme; b=VaXldj8CzmVADB9t1VvdGbv5AmuzeiBew9enosF59GFEoTL8f4EYHRg7AlyqoGG8FXNZ11mQTq/chrdVA32JvqJkVTy2BHE7CWyha1sWWqaM1Hmyr9y4VKGkvCUn+aeJR6I87T6i42eYezP+jAHv3gvcj8nU4acfEBi7OrWtTMBe7cmz/8mGUBEeQQMtn7PMOQRKWgi/jPdPH9Cu88F2yNHoG9qygM7arvBdpZMajijXW5VBzgi/skRFIGD0+vMURKrsECvY+fY9bvz8F9koESQl+5iqCYJyUzqa5xb/e+EzaNCUF8C18A90v4GUSxakZuHtjbNyBhGhUXUJH4rGRQ== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org, mohamed@unpredictable.fr Cc: Zhao Liu , "Michael S. Tsirkin" , Roman Bolshakov , qemu-arm@nongnu.org, Ani Sinha , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Akihiko Odaki , Marcel Apfelbaum , Pedro Barbuda , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Shannon Zhao , Igor Mammedov , Cameron Esfahani , Alexander Graf , Peter Maydell , Eduardo Habkost , Phil Dennis-Jordan , Pierrick Bouvier Subject: [PATCH v18 20/22] target/arm: whpx: instantiate GIC early Date: Tue, 27 Jan 2026 19:28:00 +0100 Message-ID: <20260127182805.73212-21-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260127182805.73212-1-mohamed@unpredictable.fr> References: <20260127182805.73212-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Info-Out: v=2.4 cv=Vucuwu2n c=1 sm=1 tr=0 ts=6979041a cx=c_apl:c_apl_out:c_pps a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=EYz79TNVRTG0waESW9UA:9 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: Q3zWLkADGGLB8svTqg_Ejmsr1o0ZHRuz X-Proofpoint-GUID: Q3zWLkADGGLB8svTqg_Ejmsr1o0ZHRuz X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDE1MCBTYWx0ZWRfXztPhWY3BNgT/ H0VM41E+l/MpDX5xZLS/SK2SH2CnHaYqdDzbDeMOD7rTTPm9bl80UuRz7lVAk4G9ZgTot4ESXZh NxrifaiaJWDyDm9KN9LEI55B/ffxod+iZ4kAWmFNK9swHLaT7UpbktkTwv6XQdplr1uJiN1bMvF FrGxU6rLm573AxmchqqptFWchiOroV0qYAuNWzrZq16W5cNyYqLvgiZlYrGVQVUEYEEZN7eDG8M 9lyIFmZAB9peAP6bo/inaoqyzi43FFzV3FcthHD9vSlyxhS/QZA8zW6r/63sOeN3z6XNJCpdW/B MmvS0k8A3/ksMe92J4Gfj1LOgcfdeIZju8lHco7OCs3vN8+akgWxhPJBCdVujs= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_04,2026-01-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 mlxscore=0 spamscore=0 adultscore=0 bulkscore=0 suspectscore=0 malwarescore=0 clxscore=1030 mlxlogscore=834 phishscore=0 lowpriorityscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601270150 X-JNJ: AAAAAAABXwTSMTBgmk+NbTnTjXIk08uunlBORcDEkUQoElniIy+BQTNUFOQ6yZaFsYLMz0PYihHqMQSEuixfpOrJrSIx00unB0kaenp5kOUER/pg9TQHIwvWB75E9cxjNKo2e/g1I83DHIq84kqIMVghMaikEG+l12Rp3TbqR0/dNhn/BcznHZJabAnfW6Rv8Yr3ZdwMdi/Qa8IqD+VXBnzavfWQuMxJOuFxXdM0/FRttmhLzxpXrD9Fw2VH2a93w1Ot8c8lkPYUVC7iYfEeBq8bIBp6ehmYxsdw0P6/uRPNp4z2qcDHjD6H1HmZPL3chRggJYXdPLqGP8yGgfSZjqWLEwMK0+2XHHRdjH2kXJyTw1UgiSJbQFnAcp5rXHruqr6CKaaepBJjf79552aZYRWGILMPACePQuoHlqRnjeF91CZmu7U3c3OZiUVluVdS2L5IXyog3yBLOJwgqdNC5PqrA/pkqckuDxMGL8UhPRGtBfI7b5YEPKvCHE96MsLvoG5jYCvk2mxwKAoi7a8XC935NOeh2Pqa6C68gQAP6mmEUpr1i4+Bqu5/xTP7ykJkRAQqy3Z5mSAdEXFK2nM+/0DDhFLLayEVObMR1nbld5LvOuoQJW0vppbsg+fvmad2aZb8wM49sTqfepIWOJOuiw2fXKExYfzursdada3G1pbcfT1T7wZvh++PoxJdIMdLJLjoBkxh6NUWvt7l989HuDt1dbk8Zd9pDQJQIUAgpQtPlzd6vhwe4eddTcAcC7BnEkbOFDgH+buOmUBY48CD5iIJwZDjbm4oDiuAPRaiL2sapI/+cpqzQbEXTF40vGjPYaKCdUfOSINOje8+zuxJeXShUtW+CRMw+m4NXkctbvTbiulQ2dv0cjJGoCvMd7ajXx3oNjVPu6kMqp0KuTEWAaYjAUdz1tJ8l4P/GPzD14Sn Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.71.68; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769538824568154100 Content-Type: text/plain; charset="utf-8" While figuring out a better spot for it, put it in whpx_accel_init. Needs to be done before WHvSetupPartition. Signed-off-by: Mohamed Mediouni Reviewed-by: Pierrick Bouvier Reviewed-by: Akihiko Odaki --- target/arm/whpx/whpx-all.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c index c88c67a9e2..55773555b7 100644 --- a/target/arm/whpx/whpx-all.c +++ b/target/arm/whpx/whpx-all.c @@ -939,6 +939,29 @@ int whpx_accel_init(AccelState *as, MachineState *ms) =20 memset(&prop, 0, sizeof(prop)); =20 + WHV_ARM64_IC_PARAMETERS ic_params =3D { + .EmulationMode =3D WHvArm64IcEmulationModeGicV3, + .GicV3Parameters =3D { + .GicdBaseAddress =3D 0x08000000, + .GitsTranslaterBaseAddress =3D 0x08080000, + .GicLpiIntIdBits =3D 0, + .GicPpiPerformanceMonitorsInterrupt =3D VIRTUAL_PMU_IRQ, + .GicPpiOverflowInterruptFromCntv =3D ARCH_TIMER_VIRT_IRQ + } + }; + prop.Arm64IcParameters =3D ic_params; + + hr =3D whp_dispatch.WHvSetPartitionProperty( + whpx->partition, + WHvPartitionPropertyCodeArm64IcParameters, + &prop, + sizeof(prop)); + if (FAILED(hr)) { + error_report("WHPX: Failed to enable GICv3 interrupt controller, h= r=3D%08lx", hr); + ret =3D -EINVAL; + goto error; + } + hr =3D whp_dispatch.WHvSetupPartition(whpx->partition); if (FAILED(hr)) { error_report("WHPX: Failed to setup partition, hr=3D%08lx", hr); --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1769538862; cv=none; d=zohomail.com; s=zohoarc; b=GGVhkoRIjIs6KunmErQsRk5duTqG9j/9dTQF2cArcOsveIFFdZJxvTPyJa7hHXF+BLti4uhONu80zvbNFm2j9Jn0jhdwNvVc2b+aGJ8Sb/z9GfEfiGSKAPbyYNrbYfSL3sOtQYm5A37L2hJ45b8DfEoo/Q9sgAQsJ5b4TbwfVgk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769538862; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=MAqqeKbQwR4WEZPLy9SVkmdTt6Yfi3jNZF5s19r1Uoo=; b=fsZLmVl+146WPTpdii0+aGXgNKu8qw7hthyYWpgoS83t+HhL/XErlB2MGR0bAR4fG5kPh+eng9yS1CkYs6+rUOrXoUZSbl6Mb28Mf8Bng3wY7yRSlq1lAGm+H7fMA2jugaPVF/95i3jwb410mJDdzVYonbVtWCY69Uib4jNCpDI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769538862073401.0953283444834; Tue, 27 Jan 2026 10:34:22 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vknrw-0001yb-1n; Tue, 27 Jan 2026 13:32:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknp4-0003aT-PY for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:29:54 -0500 Received: from p-west2-cluster5-host1-snip4-4.eps.apple.com ([57.103.71.107] helo=outbound.mr.icloud.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vknp2-0003sV-Su for qemu-devel@nongnu.org; Tue, 27 Jan 2026 13:29:54 -0500 Received: from outbound.mr.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPS id 784DB18000AD; Tue, 27 Jan 2026 18:29:50 +0000 (UTC) Received: from localhost.localdomain (unknown [17.57.152.38]) by p00-icloudmta-asmtp-us-west-2a-100-percent-11 (Postfix) with ESMTPSA id EED1A180013E; Tue, 27 Jan 2026 18:29:45 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; t=1769538592; x=1772130592; bh=MAqqeKbQwR4WEZPLy9SVkmdTt6Yfi3jNZF5s19r1Uoo=; h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme; b=bx5F8uH15r1qssc44hZP1HpM4eo0JUChXH4jNPqLfCfqVMUti99SYS9AYTgsBJVNTEVXqC9ZyKOcc5QCoa/EcaSDj6rvUR0fWNj11F+hy26cd/MXOt0muEyh1CNO2cvN0L9jRTiwfaLXdPuF766/GE2WVEW9iSMvBpscSxikziK6pk1d+wTJgHwfeprfYjWchB9nC6v/BgW+tDAqbGGJECQ0sxkOfsURE3uczfc24R1+PinUsVyNBmIXQb89QvStLVOUFwtFbNOKRBCVBSZTu0JQY4Jj8pAMUqrh2udeuQ/OqPz3LSVFKrcTj4aSjLLIpMTmF3/numKwvWlme0ahMg== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: qemu-devel@nongnu.org, mohamed@unpredictable.fr Cc: Zhao Liu , "Michael S. Tsirkin" , Roman Bolshakov , qemu-arm@nongnu.org, Ani Sinha , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Akihiko Odaki , Marcel Apfelbaum , Pedro Barbuda , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Shannon Zhao , Igor Mammedov , Cameron Esfahani , Alexander Graf , Peter Maydell , Eduardo Habkost , Phil Dennis-Jordan , Pierrick Bouvier Subject: [PATCH v18 21/22] whpx: enable arm64 builds Date: Tue, 27 Jan 2026 19:28:01 +0100 Message-ID: <20260127182805.73212-22-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260127182805.73212-1-mohamed@unpredictable.fr> References: <20260127182805.73212-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDE1MCBTYWx0ZWRfX5I//y3Exorxx URmoT71gbWagpWttLCnxYVazr/SaZWE74Uvd3XyeiS0e2nfTd2DzUzrNWUUPVzJ/1iJDD401pQf v83JnC/FngAoAZnmC3h/SqKRC5dKyLk5vbGELaYBReWDz/G7fVuTDAKnF4Ey4Geb9sjtiivv60k ZKrNRRr4Zk1+ARvCG2UlnyVFymTGP1NbhDdT00dLAuECJf4ywiyrfw0DAuDSOXjExf7NmUsksV5 IbnB4bOuWlgz1HWjg1JARwV8Ol7r19xjmaVGteSjESkpH105doFq4c1lAKU5ECh32JuB2/CgZV8 TW+ERFye7p/Fq9Tji4HfSwZmcL+Z2DAW9dMO2hQUFmT8qzy55joMUF/sTK09wY= X-Proofpoint-GUID: TLJ1g47XktAIKJphqRngLfQ8kbau0N_Z X-Authority-Info-Out: v=2.4 cv=Jon8bc4C c=1 sm=1 tr=0 ts=6979041f cx=c_apl:c_apl_out:c_pps a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=Ck9h3XeVBPDugYI9Na4A:9 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: TLJ1g47XktAIKJphqRngLfQ8kbau0N_Z X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_04,2026-01-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 phishscore=0 bulkscore=0 clxscore=1030 suspectscore=0 spamscore=0 adultscore=0 lowpriorityscore=0 mlxlogscore=955 mlxscore=0 malwarescore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601270150 X-JNJ: AAAAAAAB6nbOkU6G1DzihKzwYLMgBFRXxreg2uxg4pS+6J9ChSaP8dWfE74sSZ2FuhAqYqg4IxR89bKKggy0K7hu+6yzmfGyFxMac3aN+McaVWe12ULgfkT8R8lI4xtDvNVktNgeSyWrF61+9v57RGFe4XRZZzza05nB8L6QDEtnxRtU7k8cjBAXceI/qy7c//qP38PQVsrJQwT03krb7jb+pUKERKRSNTBtTBxObtbKPvvGMr0ZS4Im2y+fsYtTTYXd8Iw2ExjMl8GCNWTQouBoBN1rtlm9WG3SGNgRbQXKn2Ky/rn+Ge2lz+5HnqasvRaX/x7k+7DTvfGImzkOPTTUlEAcRryv+J5RykKyFsYdj5KqR1BZbz14hVqRT2uiwKd/dmQlhRCutqz4yD+yue2JinuJHnLvz58oGX4LPExlqgdZRcz9uZKxZu68HXA0J1H7zAVG99BRARystMdcAxE4QthVEdxXyiU8/uU7KZ1IjgnWNPLsoEIHDhL3dw0axCCu/BPvQLqimlopvWGHWvygrnapp3XfsMR+SX3PLcD9cCroy3YnQT3whYpFCTHAcWUpP0fwwE9NiDdP2P8lLIDkwRCPykI0dP0eNXyzNWnZy2LOROGsTTktM/6BI7cHHAToO1I+HbLuDMjbKNhXxPxhA9PTSW1gDo3bgCy8LJ9l5E7BICFWbP/gR8C/vsJDJMsk1uMC0TisZ18HeYTtnm5WCw58htYhedhBEOVajb0QUEbj+CWJaHKhBqzb4cM5LLC1NqbN2sxvamQbtOKA8qCBdiV/eT/C8/cCJMNWVHBWbuOaIrl9tKDRyILOkBQqDH/pfpmK+KBMTlpMME+YxP0LWI2K6XJYLHkSWWRLf570rZqK+HJiHbRCJVGH1/IdyLOrIBBT5KCtUgX+RGVI3sUQho3mKDnh7mDq Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.71.107; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769538863932158500 Content-Type: text/plain; charset="utf-8" Signed-off-by: Mohamed Mediouni Reviewed-by: Pierrick Bouvier Reviewed-by: Akihiko Odaki --- meson.build | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/meson.build b/meson.build index a84f14258b..286afca4bb 100644 --- a/meson.build +++ b/meson.build @@ -300,7 +300,8 @@ accelerator_targets +=3D { 'CONFIG_XEN': xen_targets } =20 if cpu =3D=3D 'aarch64' accelerator_targets +=3D { - 'CONFIG_HVF': ['aarch64-softmmu'] + 'CONFIG_HVF': ['aarch64-softmmu'], + 'CONFIG_WHPX': ['aarch64-softmmu'] } elif cpu =3D=3D 'x86_64' accelerator_targets +=3D { @@ -856,13 +857,18 @@ if get_option('mshv').allowed() and host_os =3D=3D 'l= inux' endif =20 if get_option('whpx').allowed() and host_os =3D=3D 'windows' - if get_option('whpx').enabled() and host_machine.cpu() !=3D 'x86_64' - error('WHPX requires 64-bit host') - elif cc.has_header('winhvplatform.h', required: get_option('whpx')) and \ - cc.has_header('winhvemulation.h', required: get_option('whpx')) - accelerators +=3D 'CONFIG_WHPX' + if cpu =3D=3D 'i386' + if get_option('whpx').enabled() + error('WHPX requires 64-bit host') + endif + # Leave CONFIG_WHPX disabled + else + if cc.has_header('winhvplatform.h', required: get_option('whpx')) and \ + cc.has_header('winhvemulation.h', required: get_option('whpx')) + accelerators +=3D 'CONFIG_WHPX' + endif endif -endif + endif =20 hvf =3D not_found if get_option('hvf').allowed() --=20 2.50.1 (Apple Git-155) From nobody Mon Feb 9 01:34:24 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Tsirkin" , Roman Bolshakov , qemu-arm@nongnu.org, Ani Sinha , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Akihiko Odaki , Marcel Apfelbaum , Pedro Barbuda , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Shannon Zhao , Igor Mammedov , Cameron Esfahani , Alexander Graf , Peter Maydell , Eduardo Habkost , Phil Dennis-Jordan , Pierrick Bouvier Subject: [PATCH v18 22/22] whpx: arm64: add partition-wide reset on the reboot path Date: Tue, 27 Jan 2026 19:28:02 +0100 Message-ID: <20260127182805.73212-23-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260127182805.73212-1-mohamed@unpredictable.fr> References: <20260127182805.73212-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: aoY0ojfSOH2B603rE9d5UVxMpkrYOxrc X-Authority-Info-Out: v=2.4 cv=Dewaa/tW c=1 sm=1 tr=0 ts=69790423 cx=c_apl:c_apl_out:c_pps a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=h5GvOLqLgfJ3vAEETv4A:9 a=NqO74GWdXPXpGKcKHaDJD/ajO6k=:19 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI3MDE1MCBTYWx0ZWRfX29WY6hwjm1Yj btZIePzm08J63qf+lcQlkaySbfk6Zly7JVcKO+aIaPXEC0mIrBQ40q557EQhmxs8pFMBYn2tO9u IR6XAdBFlWt/tL98IvbZn9vKoNuoq+Miw5j2CxRA0+1rX1U89I0VegHLTS3jc3s2klS3/sj91LP kwajWASxa1Qd9g5qKzqRH4txU2kpXLlM7yFUc2pLLp0SBYYt42vw8iFiVd6EN+TMzyZ22yBhtld De3SMKvHeq1a1mKms5FsHuvws9IfvzfAk/ZqiKPprKM+a0nTAZoVXQSAADGIWjQMDO6vPjv76jD UwzrEN8lJfnMXNoDLxr X-Proofpoint-GUID: aoY0ojfSOH2B603rE9d5UVxMpkrYOxrc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-27_04,2026-01-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 phishscore=0 malwarescore=0 mlxscore=0 clxscore=1030 spamscore=0 suspectscore=0 mlxlogscore=999 bulkscore=0 adultscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2601270150 X-JNJ: AAAAAAABr4bX3vfOhvFf+jTuaC2lb5IoEGcirO0eUzr2JO86f9M6jEUV8rAHm4SnCu7tZNRjuDK1YNDtYbqVJ0PAVoIpze8hhtzqxklFuPsuNvW+wvkfWoOP3Js2fydthDpXYQ/ikwU+h2MQtV0FrRHQvtdjkIBRq073++0UMZzvEhnMtdLTPYx9pwuN83dzYnI/czn/QsmCYX9COahRYqiVHrcvQddDRzsjXNKofclyyN68ac22QRo9omtOieP6JrxmnISlCcT8gC3UptkwW/UVgguHqSgCT4+eXjddBESfPkuQhbHEvb/JEdO7MgoxW/58P7iNJet5/1lkFfltJzshjQ5xxf5HN+4cygp9Lo+YITvWf37S2HYxpoH7JR5HhMIdTGnD88+alKQB2MSfqK4qjQDpqMYoAuyegrjRFaGODcIzx864XpMtrZnjaBnx/0Zc63F7axAsWyRrvhVCTb8u/11ipWSSVYlEp95mFBzayY6lCFZ3C3+V0Q1TvbjD4MioGAkNFmMQ59SbxjmUqYi/Zxzu3AabIGLBMNMNuDAKQpqH4TurZRoi9tUlAwTjyaYUhqMc+SWKhYbyBbSirF237RK7UBnAzcswM5anPW7lNlO+7d4aoQAY1gG4V3a2lv7wkUY4EcePNMd1LbN6wBZY8OLIXDvunlS7gBOP4U/wLK7e5S5nYeyF0hiKnlvGLPOmyuUMzp+gq9GF69UJFLCgBTxW8E70/pHZ2/v9r4l9wbY5fY/5IKIQyYxZcxTK3bnGcZIRGw0QWt3VgVjtsS7OiLyUSgsLEVQL3PU+53g15ZDkuy6Xn9L3XCXvWSGiYkEj/7NSCT8G31NZsFB6rsq06AkScSR1clSu1iGx546GpyE2n+68NOOt711gSxs1hv8W2TiZ+8xUB/MYBLWpWDfQFf/fCEa7e3ytlUrQZJ4tcUWB0dX0XRE= Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.71.19; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1769538931726154100 Content-Type: text/plain; charset="utf-8" This resets non-architectural state to allow for reboots to succeed. Signed-off-by: Mohamed Mediouni Reviewed-by: Pierrick Bouvier Reviewed-by: Akihiko Odaki --- include/system/whpx-internal.h | 2 ++ target/arm/whpx/whpx-all.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/include/system/whpx-internal.h b/include/system/whpx-internal.h index 8ded54a39b..ad6ade223e 100644 --- a/include/system/whpx-internal.h +++ b/include/system/whpx-internal.h @@ -86,6 +86,8 @@ void whpx_apic_get(APICCommonState *s); X(HRESULT, WHvSetVirtualProcessorInterruptControllerState2, \ (WHV_PARTITION_HANDLE Partition, UINT32 VpIndex, PVOID State, \ UINT32 StateSize)) \ + X(HRESULT, WHvResetPartition, \ + (WHV_PARTITION_HANDLE Partition)) \ =20 #define LIST_WINHVEMULATION_FUNCTIONS(X) \ X(HRESULT, WHvEmulatorCreateEmulator, (const WHV_EMULATOR_CALLBACKS* Cal= lbacks, WHV_EMULATOR_HANDLE* Emulator)) \ diff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c index 55773555b7..444f8c3d42 100644 --- a/target/arm/whpx/whpx-all.c +++ b/target/arm/whpx/whpx-all.c @@ -497,6 +497,8 @@ int whpx_vcpu_run(CPUState *cpu) if (arm_cpu->power_state !=3D PSCI_OFF) { whpx_psci_cpu_off(arm_cpu); } + /* Partition-wide reset, to reset state for reboots to succeed= . */ + whp_dispatch.WHvResetPartition(whpx->partition); bql_unlock(); break; case WHvRunVpExitReasonNone: --=20 2.50.1 (Apple Git-155)