From nobody Mon Feb 9 03:17:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1 dmarc=pass fromdomain=nvidia.com); dmarc=pass(p=reject dis=none) header.from=nvidia.com ARC-Seal: i=2; a=rsa-sha256; t=1769510347; cv=pass; d=zohomail.com; s=zohoarc; b=XfW3P0+i3RaOJ8eOJzexsMNaXEBOzDy3EoyLy/h/FSXnP0sFRSxmgpCwOF7PlZs458LSH6+9qCqEywdkTw087nCMlB3af3cKN80NYY4k1PwFyTBeKlkQlW1JzWxUx6cFn9ktWkKk79h4cKtI4D2dOyOFoakEMc3+z7UsHqzPdr0= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769510347; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=XT7O4mrQ9VclqmzqBjZNrfY6MLpvrUtAP3o/A/Lg+f8=; b=ZG/F+/7yNYtkbsSmrolflZE0rVotgg57ahm/XnypuhK7FWBGSKBD9gtxBMH2Tzqmx3kCh/itroVS16mZhN6AHLSfvgv3/rVl/VDi0/qKzBu6fX3VMvA2yh4lDMkKtmqiBSzx3wTRZk9IAcwDaHbaikQoKI5iulEZqArZ7ZJFs3g= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1 dmarc=pass fromdomain=nvidia.com); dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769510347186636.8221216832324; Tue, 27 Jan 2026 02:39:07 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vkgRu-0004Rs-1D; Tue, 27 Jan 2026 05:37:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vkgQf-0003Ie-Q4; Tue, 27 Jan 2026 05:36:16 -0500 Received: from mail-westcentralusazlp170130007.outbound.protection.outlook.com ([2a01:111:f403:c112::7] helo=CY3PR05CU001.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vkgQW-00017t-BD; Tue, 27 Jan 2026 05:36:13 -0500 Received: from CH0PR03CA0393.namprd03.prod.outlook.com (2603:10b6:610:11b::21) by SA1PR12MB7293.namprd12.prod.outlook.com (2603:10b6:806:2b9::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9564.7; Tue, 27 Jan 2026 10:34:27 +0000 Received: from CH1PEPF0000A345.namprd04.prod.outlook.com (2603:10b6:610:11b:cafe::43) by CH0PR03CA0393.outlook.office365.com (2603:10b6:610:11b::21) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9542.16 via Frontend Transport; Tue, 27 Jan 2026 10:34:32 +0000 Received: from mail.nvidia.com (216.228.117.161) by CH1PEPF0000A345.mail.protection.outlook.com (10.167.244.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9564.3 via Frontend Transport; Tue, 27 Jan 2026 10:34:27 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 27 Jan 2026 02:34:13 -0800 Received: from NV-2Y5XW94.nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 27 Jan 2026 02:34:10 -0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=T7u/hAvR2I1Sc5uFe+5QeUibJpadcvk/A0BfCfjkv4roPwB+DQRkovBOSLoKZnOcG0txqFlHoKS3CSWVA4jdVc58TeG2xazhkTYzuILDb41MeD1z27eZ8n3LtvTcFfd+7kB7wdmOhFQOqdvAPZvN0jhp9uzSCni47pMhS2KftoJtWdOpCLR132IWUXs+cbQLHDAW49r+xiIybgyxyxh3itbyGgQEpz8vrho5RSBbzylAgmRQGCdN3tiOVq52sAWuPAG2NX2WMqLZNuxTZtY/Ni6Pgrfed+93vflIa7afNrdjcRtovhJ72uV7W2VY3XZV9ajjxIgazmANtP14N7MqXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=XT7O4mrQ9VclqmzqBjZNrfY6MLpvrUtAP3o/A/Lg+f8=; b=vhwxmIpCSJMzg4yYhjA3FvOoRufEdxHvqYvEUSFfQbrgGitqpDDEBLpoFWsbdIy8J/9HoZF8mEZw0/YOsOhS9G8Idjbn69MLUozkQRt9PlxYtCmb8YDw3W6KCrxuTyrBXN5S5Q1XPIowLjjsCvFKESVEPgyQjsSJghNDXWjzzXkMn58L+0dA8+PyIgkPY1rIlLcSUZghk5lhxfqqqVveEowMPu55h9oYxPafN45xFtEzQwWvbuJf7Tmpk1vsobrqilnOBFVGw1JBMjVDvwEGQ0wpy2GN/imKOOa9qTUWNfT6fosWT2MVnzff0wxhjOENRBT2jPE7PGNqZrGxzuAQ7g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=nongnu.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=XT7O4mrQ9VclqmzqBjZNrfY6MLpvrUtAP3o/A/Lg+f8=; b=NdwTUVohH5bzrE0WRX2PnTpJjStHgTZod/FNImOhoONZNlD6aiMS0YRH842OoUCYCqiXT6AcM8QaiWjdaYh6tFjUcAfWGIfSychI5vlfhL7eq7wGgNs2P2N0p6gXk/8FD39MM9g3YxLl+4V2LA55+lDo9HwwQos759PbbPP8ZvEU+zq7otXl683GNUWuAHPEDF78Q8B+NjOSIdzw7QnfjLssc0qj1TDriFJwDEsdQf4BRQp+YKbB9nAq+wUURqr+yNaXIffXTzXmndLab+zwmZ8PA5k7bpwjEFcjz7Jwe6zBDYkWyzH9nfzvveFoK3Nqv/LHPasYtxpotXPr+PE5IQ== X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C From: Shameer Kolothum To: , CC: , , , , , , , , , Subject: [PATCH v3 1/4] backends/iommufd: Introduce iommufd_backend_alloc_veventq Date: Tue, 27 Jan 2026 10:33:25 +0000 Message-ID: <20260127103328.255382-2-skolothumtho@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260127103328.255382-1-skolothumtho@nvidia.com> References: <20260127103328.255382-1-skolothumtho@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000A345:EE_|SA1PR12MB7293:EE_ X-MS-Office365-Filtering-Correlation-Id: 3d7ab667-1946-431f-95f1-08de5d8fa5d9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|82310400026|36860700013|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?xJI5/A+wfRzoNnjmywXAfek/mtMdQ3p8vwSyR5QgRlAxlRsTyLIbpHQyRGJm?= =?us-ascii?Q?whLvzlcqWkKaP06QhlEKTweyFNM6+A8qq7/NuqAW7fGHTahCUPbriNPw/bb+?= =?us-ascii?Q?iH/h65BX7HaOSGiWOFG67cWMeDpYpLh2I8xuJdjZA90DziRcVuZDTrxNSYr2?= =?us-ascii?Q?ZnVlY9QNJwOzd0QWIVJAqDy7czyGvh7420egkyYQwLYkLP/sSaAarkGsFd2t?= =?us-ascii?Q?/jCpG4LnsMxLWpLdHfN4WJI/O/7xKinYSLNxRE5ExRTwFxj3QATitDXrEu2r?= =?us-ascii?Q?kFsjopKg+fNEdlJ0wXIKN3m1MF11C5bRSSdqZ0S6NSKC010mZNYoJK3RWOXi?= =?us-ascii?Q?eQyadtQN/sGLqyNKyTGG0Kx20+fIxOTUTMK+oy5y/OdXqSQrUmkSQBaSKgBc?= =?us-ascii?Q?XdRNYIbY3c3HmcSvR0gmkOg/+ncOdlSuzaqwmpLnIR8XTNF6LqVOHHz0cO82?= =?us-ascii?Q?IUXetOG+YumEtUVaWAYErs9D0c1c6LrgBH+Pwkg7I3XFgnCvcPNC95DjN2TI?= =?us-ascii?Q?J7YMzSvXF4ySJgHsKbcFlB7TQXNZ+O6MML4vYx7fiegImn0RBGmiul5nRSjJ?= =?us-ascii?Q?i8HKO89LNc0w6hFCQqFonSFQncPoSFJWbO/vKaSl2VwGFtUHBRs01Nx0jgkB?= =?us-ascii?Q?BVIheIJGs5ltVciIQGWlaivz1RBHlIF0SqEKZN7d1HFun3hcBm+3ZZKRagoc?= =?us-ascii?Q?7HAli+ok1retShNCAeNi+HQZ2qG9MrSqVIlNbUp55uKRaJDaJMGtS+Bstg2H?= =?us-ascii?Q?V3Z2XD0aIHHQOvyAptxmL7wbsl+4wg7RMwHDu6C27eUMDopv18XzyJVVtCas?= =?us-ascii?Q?xKMDz2SwuxfC2IGMli8Ny+4suxCmyNxBgUQKMYJjLVIEKN1XpCkWvlS28PNz?= =?us-ascii?Q?7xhcEgXX8U3cEiTucyP6ypXRWAE9d0db1ujDatpUDeY1oJbJ7JSs5xIS7uw9?= =?us-ascii?Q?BwL3dY+g/sNumqL3aj+yIy6oamCxDHvPsqLtQVwdL8uapZ/2PPVxOrwHkdIT?= =?us-ascii?Q?7//ncWMKEYIH7wA43oHfABt2bo1m1bzwuL87+ENf/B7l75R3o/mhKZ4UQuPe?= =?us-ascii?Q?liaAMD6wd3T+L6hG9umAHQa9THZS086zSbS49D7byI8gX8mEA2bYkUz74idG?= =?us-ascii?Q?hrMIb3AAH0/xHmdqpGxDKdrhlt2J4bBxRx2U1NJn4+H6JVUHxMTzqp389w8P?= =?us-ascii?Q?cvhIx8UT9Y2cewvu+5D8wJQjDtkfaCXS7ZHr8wRiBPsBSenjAsRU3RTo/0Gu?= =?us-ascii?Q?F+rX3IBs9bBBvv6S6s5LMNyluaOOb3IfeBFs1cJE6AU5jNxMixH196ERS/lY?= =?us-ascii?Q?OdCy8r8k/9ZiLQMbI2BwuNZkKYhJQ77ygzHDOnlOmqOmqg+mjP8ZJSaRcJAa?= =?us-ascii?Q?Ejmst8C618rKwZmPtn3PYj3PaNiP7mmwSMCAfDfdKnzvv7qsyU0w4APXYLKz?= =?us-ascii?Q?eQld8I2JVeyRqun4LhX9iF2ZXzy9lCFd/ootIblSmsb84TlJsJHcsqi/tvsG?= =?us-ascii?Q?cLRQIa67EcL1CW9M7zlheBXEB/xOhzTjXqc083Uo7zCVLX+NjSqE79GfwJXW?= =?us-ascii?Q?J1vo5pOlayaN+NjvP2+r9kruDUpZYPxrCx9uNJ/8VD8zl1IXlzKr11qg7EBu?= =?us-ascii?Q?2aCogxeJcmzQ/wUoc9f31XhPJXJPgZmKVzzjoIcSlStGlkcHMcKddO0PNwN1?= =?us-ascii?Q?0Bd/sw=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jan 2026 10:34:27.5936 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3d7ab667-1946-431f-95f1-08de5d8fa5d9 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000A345.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7293 Received-SPF: permerror client-ip=2a01:111:f403:c112::7; envelope-from=skolothumtho@nvidia.com; helo=CY3PR05CU001.outbound.protection.outlook.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FORGED_SPF_HELO=1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001, SPF_NONE=0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @Nvidia.com) X-ZM-MESSAGEID: 1769510350385154100 Content-Type: text/plain; charset="utf-8" From: Nicolin Chen Add a new helper for IOMMU_VEVENTQ_ALLOC ioctl to allocate a virtual event queue (vEVENTQ) for a vIOMMU object. Signed-off-by: Nicolin Chen Tested-by: Nicolin Chen Signed-off-by: Shameer Kolothum Reviewed-by: Eric Auger --- backends/iommufd.c | 31 +++++++++++++++++++++++++++++++ backends/trace-events | 1 + include/system/iommufd.h | 12 ++++++++++++ 3 files changed, 44 insertions(+) diff --git a/backends/iommufd.c b/backends/iommufd.c index 13822df82f..acfab907c0 100644 --- a/backends/iommufd.c +++ b/backends/iommufd.c @@ -504,6 +504,37 @@ bool iommufd_backend_alloc_vdev(IOMMUFDBackend *be, ui= nt32_t dev_id, return true; } =20 +bool iommufd_backend_alloc_veventq(IOMMUFDBackend *be, uint32_t viommu_id, + uint32_t type, uint32_t depth, + uint32_t *out_veventq_id, + uint32_t *out_veventq_fd, Error **errp) +{ + int ret; + struct iommu_veventq_alloc alloc_veventq =3D { + .size =3D sizeof(alloc_veventq), + .flags =3D 0, + .type =3D type, + .veventq_depth =3D depth, + .viommu_id =3D viommu_id, + }; + + ret =3D ioctl(be->fd, IOMMU_VEVENTQ_ALLOC, &alloc_veventq); + + trace_iommufd_viommu_alloc_eventq(be->fd, viommu_id, type, + alloc_veventq.out_veventq_id, + alloc_veventq.out_veventq_fd, ret); + if (ret) { + error_setg_errno(errp, errno, "IOMMU_VEVENTQ_ALLOC failed"); + return false; + } + + g_assert(out_veventq_id); + g_assert(out_veventq_fd); + *out_veventq_id =3D alloc_veventq.out_veventq_id; + *out_veventq_fd =3D alloc_veventq.out_veventq_fd; + return true; +} + bool host_iommu_device_iommufd_attach_hwpt(HostIOMMUDeviceIOMMUFD *idev, uint32_t hwpt_id, Error **errp) { diff --git a/backends/trace-events b/backends/trace-events index 14a7ecf5aa..5cb7d4d62d 100644 --- a/backends/trace-events +++ b/backends/trace-events @@ -23,3 +23,4 @@ iommufd_backend_get_dirty_bitmap(int iommufd, uint32_t hw= pt_id, uint64_t iova, u iommufd_backend_invalidate_cache(int iommufd, uint32_t id, uint32_t data_t= ype, uint32_t entry_len, uint32_t entry_num, uint32_t done_num, uint64_t da= ta_ptr, int ret) " iommufd=3D%d id=3D%u data_type=3D%u entry_len=3D%u entry= _num=3D%u done_num=3D%u data_ptr=3D0x%"PRIx64" (%d)" iommufd_backend_alloc_viommu(int iommufd, uint32_t dev_id, uint32_t type, = uint32_t hwpt_id, uint32_t viommu_id, int ret) " iommufd=3D%d type=3D%u dev= _id=3D%u hwpt_id=3D%u viommu_id=3D%u (%d)" iommufd_backend_alloc_vdev(int iommufd, uint32_t dev_id, uint32_t viommu_i= d, uint64_t virt_id, uint32_t vdev_id, int ret) " iommufd=3D%d dev_id=3D%u = viommu_id=3D%u virt_id=3D0x%"PRIx64" vdev_id=3D%u (%d)" +iommufd_viommu_alloc_eventq(int iommufd, uint32_t viommu_id, uint32_t type= , uint32_t veventq_id, uint32_t veventq_fd, int ret) " iommufd=3D%d viommu_= id=3D%u type=3D%u veventq_id=3D%u veventq_fd=3D%u (%d)" diff --git a/include/system/iommufd.h b/include/system/iommufd.h index 80d72469a9..e4ca16da70 100644 --- a/include/system/iommufd.h +++ b/include/system/iommufd.h @@ -56,6 +56,13 @@ typedef struct IOMMUFDVdev { uint32_t virt_id; /* virtual device ID */ } IOMMUFDVdev; =20 +/* Virtual event queue interface for a vIOMMU */ +typedef struct IOMMUFDVeventq { + IOMMUFDViommu *viommu; + uint32_t veventq_id; + uint32_t veventq_fd; +} IOMMUFDVeventq; + bool iommufd_backend_connect(IOMMUFDBackend *be, Error **errp); void iommufd_backend_disconnect(IOMMUFDBackend *be); =20 @@ -86,6 +93,11 @@ bool iommufd_backend_alloc_vdev(IOMMUFDBackend *be, uint= 32_t dev_id, uint32_t viommu_id, uint64_t virt_id, uint32_t *out_vdev_id, Error **errp); =20 +bool iommufd_backend_alloc_veventq(IOMMUFDBackend *be, uint32_t viommu_id, + uint32_t type, uint32_t depth, + uint32_t *out_veventq_id, + uint32_t *out_veventq_fd, Error **errp); + bool iommufd_backend_set_dirty_tracking(IOMMUFDBackend *be, uint32_t hwpt_= id, bool start, Error **errp); bool iommufd_backend_get_dirty_bitmap(IOMMUFDBackend *be, uint32_t hwpt_id, --=20 2.43.0 From nobody Mon Feb 9 03:17:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1 dmarc=pass fromdomain=nvidia.com); dmarc=pass(p=reject dis=none) header.from=nvidia.com ARC-Seal: i=2; a=rsa-sha256; t=1769510312; cv=pass; d=zohomail.com; s=zohoarc; b=E215gzxwMXpuDvcPlpwnG/ir2g+tRbaMQ8Lj/vrdSD32mv1vEbpu7zWxysqhd9PhOaa2WFQjkSkPzsE3wieii/vgqQGh4ILOCZ6048WrSSp48HqKcQ+bAqFdP2rkXYUaeNCQhxar86+P2NNNa1p8/TmLx8FqWilETp1I4EtWeXQ= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769510312; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=g7XLTBK8Gh2r/wj4zljP+9fHPuER/ZXw6oQx58rGO1o=; b=j1pnmDATg8SiZXei/zPxkfUcgo9vh0smbcnkP7NN7WHPN5kGeVE1YIBF/nn1aoclQeiL4aXmMcw3DCp/8EvsPFO5CPfBfmE4WK0yg+tBrjoxV3pD/jfWXYWYESb76XxdbT0Nwy5NsoHbsj4HFr15mppwvdrCXyNyOsCrSInMFj4= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1 dmarc=pass fromdomain=nvidia.com); dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769510312011850.8261230217691; Tue, 27 Jan 2026 02:38:32 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vkgRu-0004Sa-F6; Tue, 27 Jan 2026 05:37:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vkgQc-0003EA-6V; Tue, 27 Jan 2026 05:36:15 -0500 Received: from mail-eastus2azlp170100001.outbound.protection.outlook.com ([2a01:111:f403:c110::1] helo=BN1PR04CU002.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vkgQV-00017q-73; Tue, 27 Jan 2026 05:36:09 -0500 Received: from CH0PR03CA0414.namprd03.prod.outlook.com (2603:10b6:610:11b::32) by LV5PR12MB9828.namprd12.prod.outlook.com (2603:10b6:408:304::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9542.15; Tue, 27 Jan 2026 10:34:33 +0000 Received: from CH1PEPF0000A345.namprd04.prod.outlook.com (2603:10b6:610:11b:cafe::12) by CH0PR03CA0414.outlook.office365.com (2603:10b6:610:11b::32) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9542.16 via Frontend Transport; Tue, 27 Jan 2026 10:34:25 +0000 Received: from mail.nvidia.com (216.228.117.161) by CH1PEPF0000A345.mail.protection.outlook.com (10.167.244.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9564.3 via Frontend Transport; Tue, 27 Jan 2026 10:34:33 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 27 Jan 2026 02:34:20 -0800 Received: from NV-2Y5XW94.nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 27 Jan 2026 02:34:17 -0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=LJRlw3W+Nvy3QwHcTPQlYyMQi0djTu0/AdbY7UV9VfeRI7zLCGo5PcJjPM5Lf4a5vtBMzx6qjjpB9/FE4mzgV5DZPXfhnadkpa/aAMEx/ffL9qyx1ZLwfM4n3s5xmczeGB+vRH1Pu6DzXCYhb6Ugk8OcwZsrJkQMQMM4A28N8Il1MiGrHUsZIP9RQp5Jx5cKgWcX0MlyiMYRUmg8bFMOgvQaQhjb2bOkzWOzed7nKWSs6nyphsTmLTHxujsvSV0enJGUJFzQZMbbumlwMhw/PqQADypWjBQXr6MZaXerd2T8ZgIY70uPdC2XhBbIQz8UP0tJRJtlhH6Bx31jeaqe8Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=g7XLTBK8Gh2r/wj4zljP+9fHPuER/ZXw6oQx58rGO1o=; b=yhH/AJxIoB2x0YePMq/ooGDQl696opoSP/FmqeQj6MDr/6ARo5oVOc/5vWYYIaZS6sovEtHFJmbvbYm/V+6tousMSnDf928+N+Cz6CytwsKNfLgzRlT0/MGLr2dOMPK1oBiBtWa1wa2eDVmjpOs2BDksNXX2lYw9eeAB7ACErppcLB8MFKPrRzHmqXU+ZHZcG6BD/AvbdTKpuPK+o1xXCAZKVj+r3AOYxKugwVu2wFYuivFln8WCUFb4oQU8m5KXFRHUoKFeXK+arCaBmyC/4YvRZsfZJr6ndTxqsD006oDCW0ouqYSS34TRgZg1GotRDcB4dhxRVppuVkziZwXL+A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=nongnu.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=g7XLTBK8Gh2r/wj4zljP+9fHPuER/ZXw6oQx58rGO1o=; b=t0puA6hbo46z5pr4d30oUUK0lFFNHqWAi32WJzOrNmyOwgfcRTohLsC4IbGzG3q7p2xTIy/Iv+z7yYHfOJ1ll76OKFP/osUUcKhbV/NlW2LFUF2+t/1hvwB2vFB+5xhklwpQxScg9UTPZWgSK3At35G00mpe1rG+MVlCOzYbIJ9dXmDcVbPAvgxMD0nEtRASahx459i3D3oRA8cnS/bUWf0+aWmzaOn8elAQHdo1MHQLtxb3U+c7mwHoOl9MKZUI/OOMdwI1gkQuJYrUrwda7dNygbRiqMKroYUXI050BRgLgvaWJk6QjrxuuKK6+p5slNA3Hh/tXs0nekE8WrdzMg== X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C From: Shameer Kolothum To: , CC: , , , , , , , , , Subject: [PATCH v3 2/4] hw/arm/smmuv3-accel: Allocate vEVENTQ for accelerated SMMUv3 devices Date: Tue, 27 Jan 2026 10:33:26 +0000 Message-ID: <20260127103328.255382-3-skolothumtho@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260127103328.255382-1-skolothumtho@nvidia.com> References: <20260127103328.255382-1-skolothumtho@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000A345:EE_|LV5PR12MB9828:EE_ X-MS-Office365-Filtering-Correlation-Id: 10d77cd0-920e-4bbd-c3da-08de5d8fa91d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|1800799024|82310400026|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?P6CWcR7id44m0qIoq82kJbzqcpDqzRg2MOmJW66M9/RN4kqnzcNcLMItF8D9?= =?us-ascii?Q?DlfzBkYggcLmLzeVfUvPxswi17PqiY5r3pH9oAKMato7Ybg3gTu/jhDzFJ2y?= =?us-ascii?Q?LCKiZWCsQ7uMAZsVeY41HkjlbEsTgorlSNlNKplmlE0eDYtEXYcCy2BJb5Aq?= =?us-ascii?Q?Bu5XpnrFqihQO3eMw/nLRDGuHytDp02m4wFc//8IK02rLfwJFPoq9VCBwv5t?= =?us-ascii?Q?dap2UgW9Mppn0ZMk6poh/EByhofXd8XV2Um9/5R34vhDehbMzA7JY1I7AlrC?= =?us-ascii?Q?oQDmGBDlHhQmN/hHbOCi5F22ED1/AaS+vpU5MCB64kZJpMMV19YEk7QKpbEH?= =?us-ascii?Q?Bl5Xz7uokY8Hfg+u9ypFpqlundqPgj+1fnYiS++BDKA5gHrFPebHSmf7BtP5?= =?us-ascii?Q?nbtBBkv2ZDRP7vXiKmHadoAKHyCklxyW72ubrrexse6t93Et3CIzUTfIGTuD?= =?us-ascii?Q?EhNYAIagM9YJzpEd+4m4ZwLKVmKkE2j9tkpWcrSDg/Hcxe1siUveibtDB9sk?= =?us-ascii?Q?abjf4KOuvklYUPtI8e/ppfkZWdDeg+TePSsWYkSux/vxRiE2JBgeof3Ihxa/?= =?us-ascii?Q?NY8GCDAs6+k5Ns1T+87VOLSnmcLzA9jCpy0r8mi+PjD1qYqG/A9sSfyDs6vS?= =?us-ascii?Q?eLO4TJnKxmToDpUAT/aVUB5VsPrWdu5jVnlFwfPje2NPdI/IGogtQihrLahF?= =?us-ascii?Q?heRj1/nGh/DolkJuhaMZRXVwPRlbKPNKGyyl18EjTuFJoAg4dmGbOGLBc9m9?= =?us-ascii?Q?PLS4pBBbep+BlEceY2AVHQlg0mropF05py07v+4m61YoOIT6ofR1L76Qvom2?= =?us-ascii?Q?aA0wfJGTAEBo0LUKJYZKHpHF8MZvruZCApf5/1MlFWSJgxTir2CFRL7kjc0x?= =?us-ascii?Q?sgL09wu2CHKVZzWMp6lMECwhtzwbPKTHhS4hKLi9n7zSUwfcwVaTSk1L2M5W?= =?us-ascii?Q?Kdm6VX0bmuxON0WV39Lqap3kgycjKqS+CaK55u6++uA1YnzjVTd7vMFFz05y?= =?us-ascii?Q?cfCNAKKmWFBW8oxsqioL0J38Gs5CR1sJXyJfM31P2mXDIjJKvqAZ436Ou2lT?= =?us-ascii?Q?+YJcyMSaaChG86R1g5MrNX7jrq4N41pf/aJnI0nJ/LTMVzmZtzC+N2HeVYzX?= =?us-ascii?Q?zS0WCmFADVjYOJE+8WLOYTAxssQQA7EEBbej5FZtoe/e5Hd9es/OwTaPlNag?= =?us-ascii?Q?6bP2J9oROM3p/7zmrv5cpK23fdU++D2uzVl/7iKoQn9sRd4a57DmqC13URy6?= =?us-ascii?Q?qd8FfYiu6cNyjrmqR7g00gMCKh/A/kPDTQpPF0EEzrcisrBVPn+HVK7iCG3J?= =?us-ascii?Q?KvvLUddChQY6HkT6XvUQMS1E4ndFgyFfwBqjArwZWZR8sy+BCY4kcL6q974U?= =?us-ascii?Q?h1RaCEeARMm7eH6L5WWryViThvKaQSPLqaXHD0Y+ItgQ0egCLJrkRYcq87j1?= =?us-ascii?Q?PaYyRFGxMxR/MlmRgfL99SDvbwy8vnE3/XT2H2w5hKcTsvnQcC4H/8jpfJZg?= =?us-ascii?Q?WmiI2EkR3zuD+FrZPTpRg4mE8cix24u8q47JtZfb49hyhtDYmlditni/CL4A?= =?us-ascii?Q?mvfIgYiBBUi9WI343R90bUg1DSviV3Fr0lEofQN0eZ/54NGMpSP1nU+qPX2O?= =?us-ascii?Q?bkn9ArXjUiAx3huRcDc8o2bnOkuza6NHKiVLT9HbWG/wCa5U3NLn/KyTBQYU?= =?us-ascii?Q?MOS3Hg=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(36860700013)(1800799024)(82310400026)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jan 2026 10:34:33.0800 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 10d77cd0-920e-4bbd-c3da-08de5d8fa91d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000A345.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV5PR12MB9828 Received-SPF: permerror client-ip=2a01:111:f403:c110::1; envelope-from=skolothumtho@nvidia.com; helo=BN1PR04CU002.outbound.protection.outlook.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FORGED_SPF_HELO=1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001, SPF_NONE=0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @Nvidia.com) X-ZM-MESSAGEID: 1769510313510158500 Content-Type: text/plain; charset="utf-8" From: Nicolin Chen When the guest enables the Event Queue and a vIOMMU is present, allocate a vEVENTQ object so that host-side events related to the vIOMMU can be received and propagated back to the guest. For cold-plugged devices using SMMUv3 acceleration, the vIOMMU is created before the guest boots. In this case, the vEVENTQ is allocated when the guest writes to SMMU_CR0 and sets EVENTQEN =3D 1. If no cold-plugged device exists at boot (i.e. no vIOMMU initially), the vEVENTQ is allocated when a vIOMMU is created, i.e. during the first device hot-plug. Event read and propagation will be added in a later patch. Signed-off-by: Nicolin Chen Tested-by: Nicolin Chen Signed-off-by: Shameer Kolothum Reviewed-by: Eric Auger --- hw/arm/smmuv3-accel.c | 65 +++++++++++++++++++++++++++++++++++++++++-- hw/arm/smmuv3-accel.h | 6 ++++ hw/arm/smmuv3.c | 4 +++ 3 files changed, 73 insertions(+), 2 deletions(-) diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c index f5cd4df336..e8028d4be5 100644 --- a/hw/arm/smmuv3-accel.c +++ b/hw/arm/smmuv3-accel.c @@ -390,6 +390,58 @@ bool smmuv3_accel_issue_inv_cmd(SMMUv3State *bs, void = *cmd, SMMUDevice *sdev, sizeof(Cmd), &entry_num, cmd, errp); } =20 +static void smmuv3_accel_free_veventq(SMMUv3AccelState *accel) +{ + IOMMUFDVeventq *veventq =3D accel->veventq; + + if (!veventq) { + return; + } + iommufd_backend_free_id(accel->viommu->iommufd, veventq->veventq_id); + g_free(veventq); + accel->veventq =3D NULL; +} + +bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp) +{ + SMMUv3AccelState *accel =3D s->s_accel; + IOMMUFDVeventq *veventq; + uint32_t veventq_id; + uint32_t veventq_fd; + + if (!accel->viommu) { + return true; + } + + if (accel->veventq) { + return true; + } + + /* + * Per Arm SMMUv3 specification (IHI0070 G.b, 6.3.26), the Event Queue + * is enabled only after its base and size registers are programmed. + * EVENTQEN is checked before allocating the vEVENTQ. + */ + if (!smmuv3_eventq_enabled(s)) { + return true; + } + + if (!iommufd_backend_alloc_veventq(accel->viommu->iommufd, + accel->viommu->viommu_id, + IOMMU_VEVENTQ_TYPE_ARM_SMMUV3, + 1 << s->eventq.log2size, &veventq_i= d, + &veventq_fd, errp)) { + return false; + } + + veventq =3D g_new(IOMMUFDVeventq, 1); + veventq->veventq_id =3D veventq_id; + veventq->veventq_fd =3D veventq_fd; + veventq->viommu =3D accel->viommu; + accel->veventq =3D veventq; + return true; +} + static bool smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *idev, Error **errp) @@ -415,6 +467,7 @@ smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDevi= ceIOMMUFD *idev, viommu->viommu_id =3D viommu_id; viommu->s2_hwpt_id =3D s2_hwpt_id; viommu->iommufd =3D idev->iommufd; + accel->viommu =3D viommu; =20 /* * Pre-allocate HWPTs for S1 bypass and abort cases. These will be att= ached @@ -434,14 +487,20 @@ smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDe= viceIOMMUFD *idev, goto free_abort_hwpt; } =20 + /* Allocate a vEVENTQ if guest has enabled event queue */ + if (!smmuv3_accel_alloc_veventq(s, errp)) { + goto free_bypass_hwpt; + } + /* Attach a HWPT based on SMMUv3 GBPA.ABORT value */ hwpt_id =3D smmuv3_accel_gbpa_hwpt(s, accel); if (!host_iommu_device_iommufd_attach_hwpt(idev, hwpt_id, errp)) { - goto free_bypass_hwpt; + goto free_veventq; } - accel->viommu =3D viommu; return true; =20 +free_veventq: + smmuv3_accel_free_veventq(accel); free_bypass_hwpt: iommufd_backend_free_id(idev->iommufd, accel->bypass_hwpt_id); free_abort_hwpt: @@ -449,6 +508,7 @@ free_abort_hwpt: free_viommu: iommufd_backend_free_id(idev->iommufd, viommu->viommu_id); g_free(viommu); + accel->viommu =3D NULL; return false; } =20 @@ -549,6 +609,7 @@ static void smmuv3_accel_unset_iommu_device(PCIBus *bus= , void *opaque, trace_smmuv3_accel_unset_iommu_device(devfn, idev->devid); =20 if (QLIST_EMPTY(&accel->device_list)) { + smmuv3_accel_free_veventq(accel); iommufd_backend_free_id(accel->viommu->iommufd, accel->bypass_hwpt= _id); iommufd_backend_free_id(accel->viommu->iommufd, accel->abort_hwpt_= id); iommufd_backend_free_id(accel->viommu->iommufd, diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h index a8a64802ec..92048bb674 100644 --- a/hw/arm/smmuv3-accel.h +++ b/hw/arm/smmuv3-accel.h @@ -22,6 +22,7 @@ */ typedef struct SMMUv3AccelState { IOMMUFDViommu *viommu; + IOMMUFDVeventq *veventq; uint32_t bypass_hwpt_id; uint32_t abort_hwpt_id; QLIST_HEAD(, SMMUv3AccelDevice) device_list; @@ -50,6 +51,7 @@ bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error = **errp); bool smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SMMUDevice *sde= v, Error **errp); void smmuv3_accel_idr_override(SMMUv3State *s); +bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp); void smmuv3_accel_reset(SMMUv3State *s); #else static inline void smmuv3_accel_init(SMMUv3State *s) @@ -80,6 +82,10 @@ smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SM= MUDevice *sdev, static inline void smmuv3_accel_idr_override(SMMUv3State *s) { } +bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp) +{ + return true; +} static inline void smmuv3_accel_reset(SMMUv3State *s) { } diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index c08d58c579..210ac038fe 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -1605,6 +1605,10 @@ static MemTxResult smmu_writel(SMMUv3State *s, hwadd= r offset, s->cr0ack =3D data & ~SMMU_CR0_RESERVED; /* in case the command queue has been enabled */ smmuv3_cmdq_consume(s, &local_err); + /* Allocate vEVENTQ if EventQ is enabled and a vIOMMU is available= */ + if (local_err =3D=3D NULL) { + smmuv3_accel_alloc_veventq(s, &local_err); + } break; case A_CR1: s->cr[1] =3D data; --=20 2.43.0 From nobody Mon Feb 9 03:17:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1 dmarc=pass fromdomain=nvidia.com); dmarc=pass(p=reject dis=none) header.from=nvidia.com ARC-Seal: i=2; a=rsa-sha256; t=1769510298; cv=pass; d=zohomail.com; s=zohoarc; b=RycOOmRYJJY9O7lfOdM+XB32tr8cNz0uvCXL2klPRUOv05tQOitT0+ludlo1mvLt71AhYCFFhMLWgh98iVomWrUor8UrbViVLnoyJh7gQmj7O1xjr62uTQOmrwet0BsrxoJqUTWysnZ0nimYem2mGl2WpRa0rtbS+0aYQ8egDr8= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769510298; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=zZ44aXmBt53mz0Slgk1ui4ihtmzEBO/YNiuncm3EwTQ=; b=mj00gEhNq279+pMFan4JbV7mkX9Ka1UoH4lhjAOHEd80WHTEUYrDQ3HKA9lEUx3Al6112EPgciAqiuEwa1tEV8a1XeSwxnKoozGa/mYFXz2aAT1LFC7gjwwv3ve16UEgDyhF3ARhlPmnHhuw3q2o1yTO0Ux6fuKH7yoI0JafAsE= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1 dmarc=pass fromdomain=nvidia.com); dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769510298217385.41972946178726; Tue, 27 Jan 2026 02:38:18 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vkgRr-0004NV-Lm; Tue, 27 Jan 2026 05:37:27 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vkgQZ-0003DQ-PY; Tue, 27 Jan 2026 05:36:11 -0500 Received: from mail-centralusazlp170110009.outbound.protection.outlook.com ([2a01:111:f403:c111::9] helo=DM5PR21CU001.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vkgQR-00017z-OB; Tue, 27 Jan 2026 05:36:05 -0500 Received: from CH0PR04CA0045.namprd04.prod.outlook.com (2603:10b6:610:77::20) by PH0PR12MB5678.namprd12.prod.outlook.com (2603:10b6:510:14e::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9542.15; Tue, 27 Jan 2026 10:34:36 +0000 Received: from CH1PEPF0000A349.namprd04.prod.outlook.com (2603:10b6:610:77:cafe::1e) by CH0PR04CA0045.outlook.office365.com (2603:10b6:610:77::20) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9542.16 via Frontend Transport; Tue, 27 Jan 2026 10:34:35 +0000 Received: from mail.nvidia.com (216.228.117.161) by CH1PEPF0000A349.mail.protection.outlook.com (10.167.244.9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9564.3 via Frontend Transport; Tue, 27 Jan 2026 10:34:35 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 27 Jan 2026 02:34:24 -0800 Received: from NV-2Y5XW94.nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 27 Jan 2026 02:34:21 -0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=aPgRgcmDLxR9rwksAWzPC+AE5zX2GFabmkHt7TzxHpFsJjWilI5EaaR+eS5KdmiF9gqzyRouWSq1TP/fzQFirCVtnuUskhQxyb1WDR4/P2WXF+IyalcQmP5T7S2AIb+cWGRcGSdQgVdipy0WokuHHxvNcBIfB73veD64pywfy2xqz28E2R8TUw4o2BvZevCQH1EeFLrCGQjbFAlaeMoWWk2GMZfOl+jL1V4/SZwzHaxz9BR15ZpAyl8bhTmzveFRKtjtnY4zKJuLCRO3KolhpgZ83INc9vBHKtcnYynrwlF4OCO4hjyhOdf6HmxP4jcp6WTr7yNTNCDSmByc/6Yj3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=zZ44aXmBt53mz0Slgk1ui4ihtmzEBO/YNiuncm3EwTQ=; b=mb8DaVDhP6AunNgNSc7vIRoKhZknNFWrdRwow3IhOcA5JQgWoPLHs4MoJXYHUPaYiJJ/ClUYhqFkNEz9uGsFyU+vAFbc23THg7xEZb5jW/RuWTG1WdoRq+NHuguNyEDMrI+hUHJBoNbFNWtwzLUDmaOZ6n35v84jQPQN2bREIL2ZQ4SznH6T12uHMyEVYr+MX2QtCo/yw6ROLJhp7jaThPoYZWw/+JwI2RAfaIwv0KV/TSqs8hFP+KE9N6M2XSuKosX3I93E01uQkAhnSfhG8xuztG4/VAAVIUFPMJ+CTZ4kFHDHJbQlgCXAlSIuEdMnTj6OiPs7/TVRTLlqebwFJg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=nongnu.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=zZ44aXmBt53mz0Slgk1ui4ihtmzEBO/YNiuncm3EwTQ=; b=QAnHcpmi35qEpk/5SVLLdzjoTwY5rltYy6ofyvACgArIjr0fElORMJQpQ3YJKgYeKB7MY4r9fp8kTFJ9rkykiotVfe0lKzoQUkuchqOp7Ib+0OH7cWY1OGC/wJlj09XX0yZwTSkrhdacVmu6+kPiNCWq5NyXiLtASZg5tJjQfNiIXaDxYkHOWx0XWpXz5eXCr8EV7zDB3NIamxS24ifNVkieaqaqAFdOEqV++pm0Z87QPvyX4mQMrXOYQpFNGTer6oASIo7HogEX7lW1cow2jXFhqF4mRBOxdYAoVG229HlY1UaNNz9FF9xR9OUdnQepe5lAr4tIAjwWoLqFboiLOQ== X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C From: Shameer Kolothum To: , CC: , , , , , , , , , Subject: [PATCH v3 3/4] hw/arm/smmuv3: Introduce a helper function for event propagation Date: Tue, 27 Jan 2026 10:33:27 +0000 Message-ID: <20260127103328.255382-4-skolothumtho@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260127103328.255382-1-skolothumtho@nvidia.com> References: <20260127103328.255382-1-skolothumtho@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000A349:EE_|PH0PR12MB5678:EE_ X-MS-Office365-Filtering-Correlation-Id: ddb5ad14-9b7c-4c72-75f4-08de5d8faaad X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|1800799024|82310400026|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?PKdPfre7gZ6xUYeFolKz6GpVLqxP28HyetesgARPdAp8jCrG7UDMfkJSFe9R?= =?us-ascii?Q?qOhNNvY/NPWTB6Nm0UyhIDok2k0qxCx5tDptXKgpHpcGWxUbz9rTsCA1h0z6?= =?us-ascii?Q?J4d/P3YY+gm8abrLgKHCrIntu4g70dayMBAkJKd5iggC0IAW2SaaE5BZ1zuC?= =?us-ascii?Q?V0GOr5efzKOd0QCowBB5j5pS+xU6K8/A6/W/jYvRDT1XANxUtMxR873GewXs?= =?us-ascii?Q?JIT8Bz+4I3tivYF9pbd1EcDN07wuJ3odBw2uqfh2+TgGuKSfA+h8BUUC1KQT?= =?us-ascii?Q?G/GsvDRCbwnuzYx4ZuPGdo50vMU2y4TfZWpXXj8KoNaXP8Ee3GK+fsz94L8l?= =?us-ascii?Q?GIPnDCJCaicIOdgFX8Kxv0WNZZyl1XS1NelwFLKsUX2Ra420GqBULkTcvR1S?= =?us-ascii?Q?9UkUPYr0kcxMZFS/9P7s+px9R5stMnx0fEitpxQuZg6wE2lvzd/OpzDHtEBR?= =?us-ascii?Q?OmkviNeGVHfvn1zCXCoimtj8HpMku+3H29789VhR4vuYiBZ0SuEXJEfnQlP7?= =?us-ascii?Q?NSepd6kqixFmH8A20ewDFcJhT6u6THGv1OkJWGFQLL59q8D0YXh1lFR1y+Hy?= =?us-ascii?Q?w7y/uXKurRpGiUEvoD7718+V6GiESaAqmrIf/Eao4SXd52w/MvYyuXBGb/9b?= =?us-ascii?Q?0JH2XOToWsVjFmXpbuhA0An77MArAgpd8WnijBAMhTHPFcC8z0YJnv2Olpgz?= =?us-ascii?Q?nzpFoj5kOfIaCjCdo5lprxbZGH8Wg/maaTyjYqV8Xgy+2C/JAP2++D3ggg59?= =?us-ascii?Q?LX7jSrOTcQ+rto6e9oa/9kusZLwIPHUo4qp5XgQe/e6KHAb1UkGW6VXSoPXb?= =?us-ascii?Q?bAn+f8ZkK6HfGtl6Ac4WMX2sX0hI18PxXAv6y7YqXVWWr8bRgRL9tHJoTUXi?= =?us-ascii?Q?Pf2Cl4v/YlynoUggthrEv5XVBCsvkvyz2f6EvNdLTeqke+QsBDFU+wchS2u0?= =?us-ascii?Q?BXCjSyxSFZ8nLbBDRlJYp/EdHt0hO7cZo4rCFR5kyr9SF52o+H9BFZpcz3LB?= =?us-ascii?Q?deoDw6WQ/2y+S12vMPSN8nQIBa+jwaA1P+ABj0tSxEIHy2cAsDBX7iICoxvP?= =?us-ascii?Q?XNTgTtEywy/2PPXaXiFVlFHG3v0xLZRSvbODW7/YwpZ3UI7fHmJKhI9kiWKU?= =?us-ascii?Q?yNszqE9zQX93NzdH+UQUAl5kYMtrVwR8kiMbxm3xdKvOl7FsLS9ZcuEJIxan?= =?us-ascii?Q?oYePW/u626XWJt2HzPTCdzA/Bw4a3sfPZgwSPpv4KXnqi7LJQz2BZ7pGnV5s?= =?us-ascii?Q?kzXEvOkhbgJABIC99xTTTbqi/qqgaYvnlYY5bvoACPyvqBtFl7WKWAoYykh3?= =?us-ascii?Q?QRHesVynF27bqC5sZ6EyTqQhBZxclTGalqdy9fLj0oUu2vntYkVrBSbXvTnZ?= =?us-ascii?Q?HfldHK8ml4KhcVriwj6wW5TILKNe+IYrCngPQNfTnPRT0ewRcw6l7cMazLDI?= =?us-ascii?Q?gCdMNyehz2Jpr6o/4NG9pdrJ64aQ24qkMsSBG2CXg0uIWpxdpmhgwFMLwmHY?= =?us-ascii?Q?nhuneO6RrBOWx7dSC78MofHnjmjrc8pabcKiJOglMub8ZHbGkhVoRStioC19?= =?us-ascii?Q?ru3scuoRHoKQnqGCctrtaOugB3E+i8dZ779fPVW/6VdvCPoH3BebOEcNCmHc?= =?us-ascii?Q?68GBNLsevQftLoASnBTCpFHnXzcgZSyV4jRmgVJ6AuocmzGFL2Bstk421h18?= =?us-ascii?Q?P1DyxQ=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(36860700013)(1800799024)(82310400026)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jan 2026 10:34:35.6818 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ddb5ad14-9b7c-4c72-75f4-08de5d8faaad X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000A349.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB5678 Received-SPF: permerror client-ip=2a01:111:f403:c111::9; envelope-from=skolothumtho@nvidia.com; helo=DM5PR21CU001.outbound.protection.outlook.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FORGED_SPF_HELO=1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001, SPF_NONE=0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @Nvidia.com) X-ZM-MESSAGEID: 1769510300246154100 Content-Type: text/plain; charset="utf-8" Factor out the code that propagates event records to the guest into a helper function. The accelerated SMMUv3 path can use this to propagate host events in a subsequent patch. Since this helper may be called from outside the SMMUv3 core, take the mutex before accessing the Event Queue. No functional change intended. Reviewed-by: Nicolin Chen Reviewed-by: Eric Auger Tested-by: Nicolin Chen Signed-off-by: Shameer Kolothum --- hw/arm/smmuv3-internal.h | 4 ++++ hw/arm/smmuv3.c | 21 +++++++++++++++------ hw/arm/trace-events | 2 +- 3 files changed, 20 insertions(+), 7 deletions(-) diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h index a6464425ec..b666109ad9 100644 --- a/hw/arm/smmuv3-internal.h +++ b/hw/arm/smmuv3-internal.h @@ -352,7 +352,11 @@ typedef struct SMMUEventInfo { (x)->word[6] =3D (uint32_t)(addr & 0xffffffff); \ } while (0) =20 +#define EVT_GET_TYPE(x) extract32((x)->word[0], 0, 8) +#define EVT_GET_SID(x) ((x)->word[1]) + void smmuv3_record_event(SMMUv3State *s, SMMUEventInfo *event); +void smmuv3_propagate_event(SMMUv3State *s, Evt *evt); int smmu_find_ste(SMMUv3State *s, uint32_t sid, STE *ste, SMMUEventInfo *e= vent); =20 static inline int oas2bits(int oas_field) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 210ac038fe..148af80efd 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -168,10 +168,23 @@ static MemTxResult smmuv3_write_eventq(SMMUv3State *s= , Evt *evt) return MEMTX_OK; } =20 +void smmuv3_propagate_event(SMMUv3State *s, Evt *evt) +{ + MemTxResult r; + + trace_smmuv3_propagate_event(smmu_event_string(EVT_GET_TYPE(evt)), + EVT_GET_SID(evt)); + qemu_mutex_lock(&s->mutex); + r =3D smmuv3_write_eventq(s, evt); + if (r !=3D MEMTX_OK) { + smmuv3_trigger_irq(s, SMMU_IRQ_GERROR, R_GERROR_EVENTQ_ABT_ERR_MAS= K); + } + qemu_mutex_unlock(&s->mutex); +} + void smmuv3_record_event(SMMUv3State *s, SMMUEventInfo *info) { Evt evt =3D {}; - MemTxResult r; =20 if (!smmuv3_eventq_enabled(s)) { return; @@ -251,11 +264,7 @@ void smmuv3_record_event(SMMUv3State *s, SMMUEventInfo= *info) g_assert_not_reached(); } =20 - trace_smmuv3_record_event(smmu_event_string(info->type), info->sid); - r =3D smmuv3_write_eventq(s, &evt); - if (r !=3D MEMTX_OK) { - smmuv3_trigger_irq(s, SMMU_IRQ_GERROR, R_GERROR_EVENTQ_ABT_ERR_MAS= K); - } + smmuv3_propagate_event(s, &evt); info->recorded =3D true; } =20 diff --git a/hw/arm/trace-events b/hw/arm/trace-events index 8135c0c734..3457536fb0 100644 --- a/hw/arm/trace-events +++ b/hw/arm/trace-events @@ -40,7 +40,7 @@ smmuv3_cmdq_opcode(const char *opcode) "<--- %s" smmuv3_cmdq_consume_out(uint32_t prod, uint32_t cons, uint8_t prod_wrap, u= int8_t cons_wrap) "prod:%d, cons:%d, prod_wrap:%d, cons_wrap:%d " smmuv3_cmdq_consume_error(const char *cmd_name, uint8_t cmd_error) "Error = on %s command execution: %d" smmuv3_write_mmio(uint64_t addr, uint64_t val, unsigned size, uint32_t r) = "addr: 0x%"PRIx64" val:0x%"PRIx64" size: 0x%x(%d)" -smmuv3_record_event(const char *type, uint32_t sid) "%s sid=3D0x%x" +smmuv3_propagate_event(const char *type, uint32_t sid) "%s sid=3D0x%x" smmuv3_find_ste(uint16_t sid, uint32_t features, uint16_t sid_split) "sid= =3D0x%x features:0x%x, sid_split:0x%x" smmuv3_find_ste_2lvl(uint64_t strtab_base, uint64_t l1ptr, int l1_ste_offs= et, uint64_t l2ptr, int l2_ste_offset, int max_l2_ste) "strtab_base:0x%"PRI= x64" l1ptr:0x%"PRIx64" l1_off:0x%x, l2ptr:0x%"PRIx64" l2_off:0x%x max_l2_st= e:%d" smmuv3_get_ste(uint64_t addr) "STE addr: 0x%"PRIx64 --=20 2.43.0 From nobody Mon Feb 9 03:17:41 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1 dmarc=pass fromdomain=nvidia.com); dmarc=pass(p=reject dis=none) header.from=nvidia.com ARC-Seal: i=2; a=rsa-sha256; t=1769510344; cv=pass; d=zohomail.com; s=zohoarc; b=ZpsSy+TD/hQZRGKkosBGc5jpFGct+mkn0KWfTDzqST2rrX0krHFyAoIIjCVcPk21tXZam2jeBVUw9M3gJN9SBiDP9CiEgazUxbVmA48DmvXHUDlxiusdX0lCDIuddZ9mUr+CpHvcHg3uRCvjdClc5fOkDv8GpfodO+6xy09DIxQ= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769510344; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ercu/wxWGHZfgiGGSoP9OwgLgh4cvv4omBPnx3s9cj0=; b=UZlGOGxWMKvqCiNwBddHJlPjd2aD1N+b1wvMgZ2Xpebqc6Sf5hB3S0SkieAMhqx3Sb7XZbP8MewIqWTAwyxXsRsTnuGALbhC4NYFJxJs1Kmdao5lHfZggPzL6ZUILOmhQ4wVa9/6zCR4TdmTNWZJ4LVEw6FlAktiH831J3cirUM= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=pass (i=1 dmarc=pass fromdomain=nvidia.com); dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769510344297468.2296258293193; Tue, 27 Jan 2026 02:39:04 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vkgRn-0004C7-7D; Tue, 27 Jan 2026 05:37:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vkgQQ-00039D-Fw; Tue, 27 Jan 2026 05:36:01 -0500 Received: from mail-southcentralusazlp170130001.outbound.protection.outlook.com ([2a01:111:f403:c10c::1] helo=SA9PR02CU001.outbound.protection.outlook.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vkgQM-000181-5w; Tue, 27 Jan 2026 05:35:56 -0500 Received: from DS7PR03CA0054.namprd03.prod.outlook.com (2603:10b6:5:3b5::29) by BN7PPF8FCE094C0.namprd12.prod.outlook.com (2603:10b6:40f:fc02::6d8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9542.15; Tue, 27 Jan 2026 10:34:40 +0000 Received: from DS3PEPF0000C37A.namprd04.prod.outlook.com (2603:10b6:5:3b5:cafe::b6) by DS7PR03CA0054.outlook.office365.com (2603:10b6:5:3b5::29) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9564.7 via Frontend Transport; Tue, 27 Jan 2026 10:34:39 +0000 Received: from mail.nvidia.com (216.228.117.160) by DS3PEPF0000C37A.mail.protection.outlook.com (10.167.23.4) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9564.3 via Frontend Transport; Tue, 27 Jan 2026 10:34:39 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 27 Jan 2026 02:34:27 -0800 Received: from NV-2Y5XW94.nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Tue, 27 Jan 2026 02:34:24 -0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=cvrB/GTHpIguKLAw7DqN0FsRYgWUkGP6qrUC5fXUAOGWH29U50D02mZrxyqC47OUS+9GHM/OkvTHDEh8Qf8jeShD0rPabKLvMbujPBH6wEgwX896Uyz7m/Jb3ZEYYcFq6nJSzx+9ErlTrI+24HvIwv1csnZCBDCY+DTi646gxo0s0KHwrNP6mN/WJR+ziQO+jbfYH48Azxulwll4+90W8FcGoOM454V8JYKNTr27BqvtK4lDJ80tRRFV94dq5zsjzHABTp/Qyj7jgi7asX71txxAy926sy4uvtIAZ8t0Bh9sQuE4+kmDS9V/EOWDmHSegI2a39rtmcvStXeOqpwTcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=ercu/wxWGHZfgiGGSoP9OwgLgh4cvv4omBPnx3s9cj0=; b=w6r95tuqvMc6X/pIeVDX27wiNRSMlJRQxPvjkS+YfCBbsL3MY63hcUQEh5DKvaRhw67zHIvPHB1oTXuR9OyP6lam6OIdvlHTYvmACzs6748FTix0fCZF78kYJYkQI+jREKlxNfrf4uNANswohC7o2hZ8JxhfmDErk7pDVaKg+X2QcxSPO8U0B0kU3BAGVqOzQb83ZVY+bzauLMvLz5TQdEIRYVQvVgYnksggDxHx8CtK5/hLPe1Fh3dT5waXf05qCuQGsbCDY6tKr5ogEl+sjdwyf5OYG/+ygqfDNESm7lG+iFlOc20W4ISAKq/igvp9jIlGNmAkc2dqKRCYdnO4Tg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=nongnu.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ercu/wxWGHZfgiGGSoP9OwgLgh4cvv4omBPnx3s9cj0=; b=ghOry4puVFsmLsk+RS41JbZr74HQsnhpt4TMtxCWjtJMevOVaou59eKQ0do7eNYkQvvt4OYmdLLOuXGpb9tPvu7yS1yTKAX+bmabOJJbV4WqWHDBv+nAg9hP9umkwFtCbVmMip/ilhUR+BL1RqkUl9eFruMJyGxB6Y7nntsCjNMZ9KV6AR+ErjlOfciaGqsSVjLRR/NUd5G1sZs0gh9mI+RZbUyfHtrKa9qb/BO7P4hW2Pl+9U8pQMW/QHWTjcm5IX0f/ChhUrouephNdlTu37KmNZKuYAj6At2U/LmHX8ZPw4Kx6VqaLyffA2PS3foSRKQ/qAg8+dqNi0gZLHFoUg== X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C From: Shameer Kolothum To: , CC: , , , , , , , , , Subject: [PATCH v3 4/4] hw/arm/smmuv3-accel: Read and propagate host vIOMMU events Date: Tue, 27 Jan 2026 10:33:28 +0000 Message-ID: <20260127103328.255382-5-skolothumtho@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260127103328.255382-1-skolothumtho@nvidia.com> References: <20260127103328.255382-1-skolothumtho@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF0000C37A:EE_|BN7PPF8FCE094C0:EE_ X-MS-Office365-Filtering-Correlation-Id: 2d207200-9ccc-40c6-5912-08de5d8facd0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|376014|36860700013|1800799024|82310400026; X-Microsoft-Antispam-Message-Info: =?utf-8?B?ak1pSVhFbk1hRFZ1cGF5ajhic3dYeDdkanc2dHdxS0syRnBlKzBJMTl0V2tS?= =?utf-8?B?QXZtdWxtTTBqWkk0dEp0bzJrK0hhRHB5a2piazBwVGowYmNJMVYvR0JRdHlx?= =?utf-8?B?d0FXQU9HVnNMZ0hGRWdEWDFEMUxjTXErcDV6ZnMyRDVMdGVuTTh3K3prMUI4?= =?utf-8?B?MXNnWnVQaGlPb3NDZmR6WEZ0YkhDa2U2a0RXaEVaUGJ1K1hrdE5XSGxXaEJa?= =?utf-8?B?RFUwWExEL2NVWi9KOGF3aGo4OE9sdGdaTlBlb2V1K2Vmdk9FcXkzSFlETXZZ?= =?utf-8?B?dWltNktVMXZPS01lL21kbEd2d0pvcUd3QngrdjBueXdueHNlRTMyS21DTDVN?= =?utf-8?B?dlA0K1V0K3dXSVZDN1Z5Q2RjdzY2RnZIL2ErL1ZjclBzUDgzVFBCdCt2NDRC?= =?utf-8?B?YXNnOEZmYUdsdjI0ek9SeHcvTmpUK3B5aUZVRlZnSDNMcjQ1eEliRmNId2Rp?= =?utf-8?B?REE3UGR3TzNHR29FamhvMm9YY1pENWRwOWowZkhsM1M3VGh2MDdick0wZzdG?= =?utf-8?B?clk0VkVsUjFGVWVCU2s0b2hQeEFYaHcrZnJlQXBmUXpHSGZ4WnViVUpEbW8y?= =?utf-8?B?U3d6M3lZM0hIR1hNcmZBN3NaeDZVRjdQK004bklVSzQ4M0VNRkp4U01Fa2Rx?= =?utf-8?B?azJuNXFpUXBBSC9DK2FOK1VIT0hvRDh4VnNjSlM3UUQ2T09MR1JhRzJ1Ulpp?= =?utf-8?B?ZGpZMzFqcU1Ea0tNR3dOZC9VRDlhS0djeExnamo2ZHdsY3l0eEJCT0NXYXRx?= =?utf-8?B?eUg3MUJiVVp5QUFSbENsblMyZkE4UmtzRmM1T0p0cUFYUTV4cWhsM1BJWHlH?= =?utf-8?B?bFp2NGtXckVwYXJYejFSUkpXSVVlajRPYVUxRHBFajg4aEZRZE1jVlIvcG5Y?= =?utf-8?B?QXMzVWVxNGUxWEtaYXc4czgwN2taK2UrWmo2ZGtTcDdTNEdHdXoxR3pYbzEz?= =?utf-8?B?NWozYVVtMExCcEJsUzdIR3FXM1pQTk5GenFNY2ZlL2ZraklramtRRkdnVllO?= =?utf-8?B?ZzhiMEc3R0dicTNKT0UwU3VGR1ZHeUF3WTVhcldGTHYxMzhaTExZRU1RMVhB?= =?utf-8?B?OW52ZXczUkJIK0E3a0QwUTB1T2lwT0F4WUxUZGJ3NkJKamc1dU9QZjV5T0VX?= =?utf-8?B?ZnM4ZjBLYXhSQnBhU1dQLzI0NXFmUW9wSGxCV1JVZHZ1bE9tSUNlalA2a25l?= =?utf-8?B?Y0lkUHQwWmR6b1VpTWtIcWlmM1BISWxoYlNINlUvYWlETzRlOUQ5d2MxZXRL?= =?utf-8?B?eDhWMjBVZVZCTFRqa2ozTEx5VEswN0w1dDFTd05DV3F1WHozT1FvZGtyVmNw?= =?utf-8?B?OHFDUk9rOTYzTU9rVE4zU0lIZklYRWs4a1QrK3lQbW91VEhvbldVanRFNGR5?= =?utf-8?B?M0lqVFFlcGZPUzl4UHowanpJTGJqakZWOU9MNXR2VytZUUtjT1haNUtEOG5M?= =?utf-8?B?MTBqL0xhaDNuOGlzTkVUSlk3VkU4Qm0xSUNMeUR3RUdGR3hNanRKZmFydjdp?= =?utf-8?B?YkpJUEcvV1pmcFNCdmNjN1dic24rdEN2WlAyRWh3M2lLa2RmT1JTRlFDcSsw?= =?utf-8?B?TzljYU9VQ1FIT0dkaXpwUW5iZDdTWFZvOFE4UEl3ZTJEK0h5Rno5ZjdNdUIx?= =?utf-8?B?NEttQzNRUTl1L3VmOWwwQ0RTV0J1enpjWWxLYjdVT0R4MlNZY2QwQ1pCeVZn?= =?utf-8?B?ZkdaWmUwdG5aZ2ZVZno3RDVJemNuZHVuZS9jeDVlQmlQb0x6QlZoUmtaclQr?= =?utf-8?B?allmZjA0YlVvYkhCM2hkRmRGdzRIZVFWTUt4K1M4bE84YlJZTDkzU1N1Zldn?= =?utf-8?B?VU9DNnJaOTAybytQQU1WTnVST2o0YkxOemV0aWd6VGY3NVh2QW1uYzhPeGti?= =?utf-8?B?QnhJdXNUNmJvRUkyS0ZrQ1RwZWxKTFpBWXpha2NjTkVUQjlYeG1jK3pwZWgz?= =?utf-8?B?OTNyTGszdHhTNk9UanNQb0NuVDByaEJxS0VpbHNsNTI3TjA1Q2pPU3kxNlgy?= =?utf-8?B?UW9wZ1BhbSt4NkZLMDZIMk1xT1d0Rm1Wd3ExNFFGREhBSWxua1BSeUtyOUpw?= =?utf-8?B?a3l3YTlJYk9nUWF3YlFWWVBJYmkzaklidHQvR1ZVdzlEc0NsNTZQbGNRZEZl?= =?utf-8?B?SzhWZ05pYjBEVHQ4dktVdDJaajRnMGY5WFZKb2xhcGU4Rm1TTHRWbXRtOEJG?= =?utf-8?B?UHVJVmFqcWU3U2piNHB5cm5PUTZFZnFheWU3WUkrd1JZbW9RdHp6QTJSZ0Yw?= =?utf-8?B?RHF2VmtpaVc0RWdXSzhyRXU4dDdRPT0=?= X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(376014)(36860700013)(1800799024)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jan 2026 10:34:39.2741 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2d207200-9ccc-40c6-5912-08de5d8facd0 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF0000C37A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PPF8FCE094C0 Received-SPF: permerror client-ip=2a01:111:f403:c10c::1; envelope-from=skolothumtho@nvidia.com; helo=SA9PR02CU001.outbound.protection.outlook.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FORGED_SPF_HELO=1, SPF_HELO_PASS=-0.001, SPF_NONE=0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @Nvidia.com) X-ZM-MESSAGEID: 1769510344977158500 Install an event handler on the vEVENTQ fd to read and propagate host generated vIOMMU events to the guest. The handler runs in QEMU=E2=80=99s main loop, using a non-blocking fd regis= tered via qemu_set_fd_handler(). Tested-by: Nicolin Chen Signed-off-by: Shameer Kolothum --- hw/arm/smmuv3-accel.c | 60 +++++++++++++++++++++++++++++++++++++++++++ hw/arm/smmuv3-accel.h | 2 ++ 2 files changed, 62 insertions(+) diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c index e8028d4be5..ab57eae575 100644 --- a/hw/arm/smmuv3-accel.c +++ b/hw/arm/smmuv3-accel.c @@ -390,6 +390,60 @@ bool smmuv3_accel_issue_inv_cmd(SMMUv3State *bs, void = *cmd, SMMUDevice *sdev, sizeof(Cmd), &entry_num, cmd, errp); } =20 +static void smmuv3_accel_event_read(void *opaque) +{ + SMMUv3State *s =3D opaque; + SMMUv3AccelState *accel =3D s->s_accel; + struct { + struct iommufd_vevent_header hdr; + struct iommu_vevent_arm_smmuv3 vevent; + } buf; + ssize_t readsz =3D sizeof(buf); + uint32_t last_seq =3D accel->last_event_seq; + ssize_t bytes; + + bytes =3D read(accel->veventq->veventq_fd, &buf, readsz); + if (bytes <=3D 0) { + if (errno =3D=3D EAGAIN || errno =3D=3D EINTR) { + return; + } + error_report("vEVENTQ: read failed (%m)"); + return; + } + + if (bytes < readsz) { + error_report("vEVENTQ: incomplete read (%zd/%zd bytes)", bytes, re= adsz); + return; + } + + if (buf.hdr.flags & IOMMU_VEVENTQ_FLAG_LOST_EVENTS) { + error_report("vEVENTQ has lost events"); + accel->event_start =3D false; + accel->last_event_seq =3D 0; + return; + } + + /* Check sequence in hdr for lost events if any */ + if (accel->event_start) { + uint32_t expected =3D (last_seq =3D=3D INT_MAX) ? 0 : last_seq + 1; + + if (buf.hdr.sequence !=3D expected) { + uint32_t delta; + + if (buf.hdr.sequence >=3D last_seq) { + delta =3D buf.hdr.sequence - last_seq; + } else { + /* Handle wraparound from INT_MAX */ + delta =3D (INT_MAX - last_seq) + buf.hdr.sequence + 1; + } + error_report_once("vEVENTQ: detected lost %u event(s)", delta = - 1); + } + } + accel->last_event_seq =3D buf.hdr.sequence; + accel->event_start =3D true; + smmuv3_propagate_event(s, (Evt *)&buf.vevent); +} + static void smmuv3_accel_free_veventq(SMMUv3AccelState *accel) { IOMMUFDVeventq *veventq =3D accel->veventq; @@ -397,6 +451,8 @@ static void smmuv3_accel_free_veventq(SMMUv3AccelState = *accel) if (!veventq) { return; } + qemu_set_fd_handler(veventq->veventq_fd, NULL, NULL, NULL); + close(veventq->veventq_fd); iommufd_backend_free_id(accel->viommu->iommufd, veventq->veventq_id); g_free(veventq); accel->veventq =3D NULL; @@ -439,6 +495,10 @@ bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error = **errp) veventq->veventq_fd =3D veventq_fd; veventq->viommu =3D accel->viommu; accel->veventq =3D veventq; + + /* Set up event handler for veventq fd */ + fcntl(veventq_fd, F_SETFL, O_NONBLOCK); + qemu_set_fd_handler(veventq_fd, smmuv3_accel_event_read, NULL, s); return true; } =20 diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h index 92048bb674..ba0f40a565 100644 --- a/hw/arm/smmuv3-accel.h +++ b/hw/arm/smmuv3-accel.h @@ -23,6 +23,8 @@ typedef struct SMMUv3AccelState { IOMMUFDViommu *viommu; IOMMUFDVeventq *veventq; + uint32_t last_event_seq; + bool event_start; uint32_t bypass_hwpt_id; uint32_t abort_hwpt_id; QLIST_HEAD(, SMMUv3AccelDevice) device_list; --=20 2.43.0