From nobody Sun Jan 25 12:00:40 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1769080691; cv=none; d=zohomail.com; s=zohoarc; b=MP4KFxVCCvqZXXSHEb0y6Bfsnx+BDuMeEmweA1FjhhY4WeINHtib7EdoTkRakcXqUfySDs8McNjjwptvyQgqQJ6zZezCv4zm6vudFcax4Wo8szpe381c0+vk5e7Vguouw3+QHpCUsTV8BnHnIaovAKkN4iljHPzCtNFi9VAuTaA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1769080691; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=YRU5kxf+QmsbjrTkU501/mrO4Dp0XXAoxukmzKqWE7Y=; b=Zq331fmTEjN6nThCv5ksVuXRW16WODFX+lRcoZ8+XsgUktKdKCdhNefZEKS32Ekfn3baVDpcPYiHM39OoIie/2XGA65gLVGKZaTc085PD9milCUw/SZe3ESnZi2l33zzXVqMWa3hIwYIW+mfUUu9YerWjmj5FZwEN+/KL0YUvL0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1769080691297323.0291522716294; Thu, 22 Jan 2026 03:18:11 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1visgd-0002Wv-Uj; Thu, 22 Jan 2026 06:17:15 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1visgX-0002Vd-AY for qemu-devel@nongnu.org; Thu, 22 Jan 2026 06:17:10 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1visgV-0001TL-9O for qemu-devel@nongnu.org; Thu, 22 Jan 2026 06:17:09 -0500 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-4801bc328easo9266415e9.3 for ; Thu, 22 Jan 2026 03:17:05 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43595609c8asm16582233f8f.34.2026.01.22.03.17.02 for (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 22 Jan 2026 03:17:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1769080624; x=1769685424; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=YRU5kxf+QmsbjrTkU501/mrO4Dp0XXAoxukmzKqWE7Y=; b=my4aNYC75vj0/7DX4+euYNVfE8H422g8Wl2PmxgWCApzb93wunlM1AEkV/PRt+eZ5S Bu33xZVEa6O9C1duneUpo9Ieze/YH0Xl4ojrzCM8P50A7ijHzdnn3lrZjGWgEkccpEU/ EssaTV1HD0+9HKSiKWwJ5v8Y79KEqruXob7m04wyEYbIgxQu28yBnOJlMoCpU1tSVN5I g5mo1vkzb6xy57UGWSDUs2c9lduHDyXSkVsVvxN1abrUd5Bn/BC/dsy2ivBGzGqSNAIc m1Xg1kqfPHLKs59hmL5dPri28qaWr5CmyD7SLfKtAu8GOZF+opY6aJUgaSUTrriX6dqW kfTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1769080624; x=1769685424; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=YRU5kxf+QmsbjrTkU501/mrO4Dp0XXAoxukmzKqWE7Y=; b=BEACgxZOKmp6K4ybUtqI9rGz6IVB0+iO8FDFGg9+Z2vMAn6wxKDpttXmJ24j3rwDwv UHrABKuuN5Ov5cQ44eOJ3oidz95/LeNeCrDOKRJD55YGIaZWYALIM4LqjYAkmsJdA0sa k8WF/KDzb2YmrwHFGUxT5OA9CiuhzI67atWHVkRyQcv9p3WJNC9IkV2pM1Qu/ROcK6dU OxbP8pypsHm02PYGFT3L9rFK3vglZ4nMEBcmUUNBnMKtD2V6qncDachCDTEuVvnyhAU8 9Q7xUmyggSCZGdZX07QJ4bRNzs19MYBnN4CdD7T9hAuzzCxKtoCxiL9dJvxSNCOFtyct F6lg== X-Gm-Message-State: AOJu0Yz7YYhTPWmFB4NwcSUhn7Fuktwz2Kb9Z2e4QK3M/puk0vQfKIuO M1vMxeU2K7ljMQLllT8ZhZn3559VWhWmXHt/HiEzL75XfLa7I0Sy7JJVApcV3hAyMcZ6pp77VV5 4GsexUy4= X-Gm-Gg: AZuq6aKhleWhf3lA9RqrKcCa2JwxzUrJ1u0YN4z1MMSYaCjDqBEwvCOdmAFABIIKWim LH1Bl/cY5ayK4z+1XVDSVJSDUsItpkglrl96MlXEg9NEPhtH15HOUrL50FInfM5ijVEE2BOKPRs diD2MJqXy7D2+Zecp0R6AmMvHpw5IwcnmjECG060JZf8rtA4ZKdBYWwdYHG8mCOnjfBJMdjQZmC CVEn8aHipXfaNYnw6ar+Zer0GloCyGHNl1Z3A3+w9HElHykIjioLUJjEZ1AReqNtz9BSo03JeQ6 tL27fPKMbIxIARNjqKtuZP+pOJV5Bxs1n20kkksXlaxnnFGM+cBfeJHM9qqNj75nLsG7eR1a107 onDGh0bENV8IRc1McidYEedAj8vli5LpVmaMluY4CN7aMmPKS+nd7kIupWGUuFITecjbevzrg8d 5+zTl3e8isNRFXwLV0fsbdDoze/eqZOiHA0JOvWUUfGFwCgFLs9HhVrz0GGTHx X-Received: by 2002:a05:600c:4447:b0:477:a219:cdb7 with SMTP id 5b1f17b1804b1-4801ea2a21fmr287627175e9.0.1769080623373; Thu, 22 Jan 2026 03:17:03 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PULL v2 03/37] target/m68k: Use big-endian variant of cpu_ld/st_data*() Date: Thu, 22 Jan 2026 12:16:36 +0100 Message-ID: <20260122111639.32346-4-philmd@linaro.org> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260122111639.32346-1-philmd@linaro.org> References: <20260122111639.32346-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1769080692551158500 We only build the M68k target using big endianness order, therefore the cpu_ld/st_data*() definitions expand to the big endian declarations. Use the explicit big-endian variants. Mechanical change running: $ tgt=3Dm68k; \ end=3Dbe; \ for op in data mmuidx_ra; do \ for ac in uw sw l q; do \ sed -i -e "s/cpu_ld${ac}_${op}/cpu_ld${ac}_${end}_${op}/" \ $(git grep -l cpu_ target/${tgt}/); \ done; for ac in w l q; do \ sed -i -e "s/cpu_st${ac}_${op}/cpu_st${ac}_${end}_${op}/" \ $(git grep -l cpu_ target/${tgt}/); \ done; done Then adapting indentation in do_stack_frame() to pass checkpatch.pl. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20251126202200.23100-8-philmd@linaro.org> --- target/m68k/fpu_helper.c | 12 +++--- target/m68k/op_helper.c | 91 ++++++++++++++++++++-------------------- 2 files changed, 52 insertions(+), 51 deletions(-) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 56012863c85..f49f841d489 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -510,8 +510,8 @@ static int cpu_ld_floatx80_ra(CPUM68KState *env, uint32= _t addr, FPReg *fp, uint32_t high; uint64_t low; =20 - high =3D cpu_ldl_data_ra(env, addr, ra); - low =3D cpu_ldq_data_ra(env, addr + 4, ra); + high =3D cpu_ldl_be_data_ra(env, addr, ra); + low =3D cpu_ldq_be_data_ra(env, addr + 4, ra); =20 fp->l.upper =3D high >> 16; fp->l.lower =3D low; @@ -522,8 +522,8 @@ static int cpu_ld_floatx80_ra(CPUM68KState *env, uint32= _t addr, FPReg *fp, static int cpu_st_floatx80_ra(CPUM68KState *env, uint32_t addr, FPReg *fp, uintptr_t ra) { - cpu_stl_data_ra(env, addr, fp->l.upper << 16, ra); - cpu_stq_data_ra(env, addr + 4, fp->l.lower, ra); + cpu_stl_be_data_ra(env, addr, fp->l.upper << 16, ra); + cpu_stq_be_data_ra(env, addr + 4, fp->l.lower, ra); =20 return 12; } @@ -533,7 +533,7 @@ static int cpu_ld_float64_ra(CPUM68KState *env, uint32_= t addr, FPReg *fp, { uint64_t val; =20 - val =3D cpu_ldq_data_ra(env, addr, ra); + val =3D cpu_ldq_be_data_ra(env, addr, ra); fp->d =3D float64_to_floatx80(*(float64 *)&val, &env->fp_status); =20 return 8; @@ -545,7 +545,7 @@ static int cpu_st_float64_ra(CPUM68KState *env, uint32_= t addr, FPReg *fp, float64 val; =20 val =3D floatx80_to_float64(fp->d, &env->fp_status); - cpu_stq_data_ra(env, addr, *(uint64_t *)&val, ra); + cpu_stq_be_data_ra(env, addr, *(uint64_t *)&val, ra); =20 return 8; } diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index f7df83c850c..8148a8852e7 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -32,8 +32,8 @@ static void cf_rte(CPUM68KState *env) uint32_t fmt; =20 sp =3D env->aregs[7]; - fmt =3D cpu_ldl_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0); - env->pc =3D cpu_ldl_mmuidx_ra(env, sp + 4, MMU_KERNEL_IDX, 0); + fmt =3D cpu_ldl_be_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0); + env->pc =3D cpu_ldl_be_mmuidx_ra(env, sp + 4, MMU_KERNEL_IDX, 0); sp |=3D (fmt >> 28) & 3; env->aregs[7] =3D sp + 8; =20 @@ -48,13 +48,13 @@ static void m68k_rte(CPUM68KState *env) =20 sp =3D env->aregs[7]; throwaway: - sr =3D cpu_lduw_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0); + sr =3D cpu_lduw_be_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0); sp +=3D 2; - env->pc =3D cpu_ldl_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0); + env->pc =3D cpu_ldl_be_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0); sp +=3D 4; if (m68k_feature(env, M68K_FEATURE_EXCEPTION_FORMAT_VEC)) { /* all except 68000 */ - fmt =3D cpu_lduw_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0); + fmt =3D cpu_lduw_be_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0); sp +=3D 2; switch (fmt >> 12) { case 0: @@ -250,12 +250,12 @@ static void cf_interrupt_all(CPUM68KState *env, int i= s_hw) /* ??? This could cause MMU faults. */ sp &=3D ~3; sp -=3D 4; - cpu_stl_mmuidx_ra(env, sp, retaddr, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, sp, retaddr, MMU_KERNEL_IDX, 0); sp -=3D 4; - cpu_stl_mmuidx_ra(env, sp, fmt, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, sp, fmt, MMU_KERNEL_IDX, 0); env->aregs[7] =3D sp; /* Jump to vector. */ - env->pc =3D cpu_ldl_mmuidx_ra(env, env->vbr + vector, MMU_KERNEL_IDX, = 0); + env->pc =3D cpu_ldl_be_mmuidx_ra(env, env->vbr + vector, MMU_KERNEL_ID= X, 0); =20 do_plugin_vcpu_interrupt_cb(cs, retaddr); } @@ -270,24 +270,25 @@ static inline void do_stack_frame(CPUM68KState *env, = uint32_t *sp, switch (format) { case 4: *sp -=3D 4; - cpu_stl_mmuidx_ra(env, *sp, env->pc, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, *sp, env->pc, MMU_KERNEL_IDX, 0); *sp -=3D 4; - cpu_stl_mmuidx_ra(env, *sp, addr, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, *sp, addr, MMU_KERNEL_IDX, 0); break; case 3: case 2: *sp -=3D 4; - cpu_stl_mmuidx_ra(env, *sp, addr, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, *sp, addr, MMU_KERNEL_IDX, 0); break; } *sp -=3D 2; - cpu_stw_mmuidx_ra(env, *sp, (format << 12) + (cs->exception_index = << 2), - MMU_KERNEL_IDX, 0); + cpu_stw_be_mmuidx_ra(env, *sp, + (format << 12) + (cs->exception_index << 2), + MMU_KERNEL_IDX, 0); } *sp -=3D 4; - cpu_stl_mmuidx_ra(env, *sp, retaddr, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, *sp, retaddr, MMU_KERNEL_IDX, 0); *sp -=3D 2; - cpu_stw_mmuidx_ra(env, *sp, sr, MMU_KERNEL_IDX, 0); + cpu_stw_be_mmuidx_ra(env, *sp, sr, MMU_KERNEL_IDX, 0); } =20 static void m68k_interrupt_all(CPUM68KState *env, int is_hw) @@ -346,49 +347,49 @@ static void m68k_interrupt_all(CPUM68KState *env, int= is_hw) env->mmu.fault =3D true; /* push data 3 */ sp -=3D 4; - cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* push data 2 */ sp -=3D 4; - cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* push data 1 */ sp -=3D 4; - cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* write back 1 / push data 0 */ sp -=3D 4; - cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* write back 1 address */ sp -=3D 4; - cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* write back 2 data */ sp -=3D 4; - cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* write back 2 address */ sp -=3D 4; - cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* write back 3 data */ sp -=3D 4; - cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* write back 3 address */ sp -=3D 4; - cpu_stl_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0); /* fault address */ sp -=3D 4; - cpu_stl_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0); /* write back 1 status */ sp -=3D 2; - cpu_stw_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + cpu_stw_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* write back 2 status */ sp -=3D 2; - cpu_stw_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + cpu_stw_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* write back 3 status */ sp -=3D 2; - cpu_stw_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + cpu_stw_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); /* special status word */ sp -=3D 2; - cpu_stw_mmuidx_ra(env, sp, env->mmu.ssw, MMU_KERNEL_IDX, 0); + cpu_stw_be_mmuidx_ra(env, sp, env->mmu.ssw, MMU_KERNEL_IDX, 0); /* effective address */ sp -=3D 4; - cpu_stl_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0); + cpu_stl_be_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0); =20 do_stack_frame(env, &sp, 7, oldsr, 0, env->pc); env->mmu.fault =3D false; @@ -436,7 +437,7 @@ static void m68k_interrupt_all(CPUM68KState *env, int i= s_hw) =20 env->aregs[7] =3D sp; /* Jump to vector. */ - env->pc =3D cpu_ldl_mmuidx_ra(env, env->vbr + vector, MMU_KERNEL_IDX, = 0); + env->pc =3D cpu_ldl_be_mmuidx_ra(env, env->vbr + vector, MMU_KERNEL_ID= X, 0); =20 do_plugin_vcpu_interrupt_cb(cs, last_pc); } @@ -784,11 +785,11 @@ void HELPER(cas2w)(CPUM68KState *env, uint32_t regs, = uint32_t a1, uint32_t a2) int16_t l1, l2; uintptr_t ra =3D GETPC(); =20 - l1 =3D cpu_lduw_data_ra(env, a1, ra); - l2 =3D cpu_lduw_data_ra(env, a2, ra); + l1 =3D cpu_lduw_be_data_ra(env, a1, ra); + l2 =3D cpu_lduw_be_data_ra(env, a2, ra); if (l1 =3D=3D c1 && l2 =3D=3D c2) { - cpu_stw_data_ra(env, a1, u1, ra); - cpu_stw_data_ra(env, a2, u2, ra); + cpu_stw_be_data_ra(env, a1, u1, ra); + cpu_stw_be_data_ra(env, a2, u2, ra); } =20 if (c1 !=3D l1) { @@ -840,11 +841,11 @@ static void do_cas2l(CPUM68KState *env, uint32_t regs= , uint32_t a1, uint32_t a2, } } else { /* We're executing in a serial context -- no need to be atomic. */ - l1 =3D cpu_ldl_data_ra(env, a1, ra); - l2 =3D cpu_ldl_data_ra(env, a2, ra); + l1 =3D cpu_ldl_be_data_ra(env, a1, ra); + l2 =3D cpu_ldl_be_data_ra(env, a2, ra); if (l1 =3D=3D c1 && l2 =3D=3D c2) { - cpu_stl_data_ra(env, a1, u1, ra); - cpu_stl_data_ra(env, a2, u2, ra); + cpu_stl_be_data_ra(env, a1, u1, ra); + cpu_stl_be_data_ra(env, a2, u2, ra); } } =20 @@ -946,12 +947,12 @@ static uint64_t bf_load(CPUM68KState *env, uint32_t a= ddr, int blen, case 0: return cpu_ldub_data_ra(env, addr, ra); case 1: - return cpu_lduw_data_ra(env, addr, ra); + return cpu_lduw_be_data_ra(env, addr, ra); case 2: case 3: - return cpu_ldl_data_ra(env, addr, ra); + return cpu_ldl_be_data_ra(env, addr, ra); case 4: - return cpu_ldq_data_ra(env, addr, ra); + return cpu_ldq_be_data_ra(env, addr, ra); default: g_assert_not_reached(); } @@ -965,14 +966,14 @@ static void bf_store(CPUM68KState *env, uint32_t addr= , int blen, cpu_stb_data_ra(env, addr, data, ra); break; case 1: - cpu_stw_data_ra(env, addr, data, ra); + cpu_stw_be_data_ra(env, addr, data, ra); break; case 2: case 3: - cpu_stl_data_ra(env, addr, data, ra); + cpu_stl_be_data_ra(env, addr, data, ra); break; case 4: - cpu_stq_data_ra(env, addr, data, ra); + cpu_stq_be_data_ra(env, addr, data, ra); break; default: g_assert_not_reached(); --=20 2.52.0