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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260121-pca9535-v1-1-164640e622ff@stwcx.xyz> References: <20260121-pca9535-v1-0-164640e622ff@stwcx.xyz> In-Reply-To: <20260121-pca9535-v1-0-164640e622ff@stwcx.xyz> To: qemu-devel@nongnu.org Cc: Glenn Miles , qemu-ppc@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?C=C3=A9dric_Le_Goater?= , Peter Maydell , Steven Lee , Troy Lee , Jamin Lin , Andrew Jeffery , Joel Stanley , Patrick Williams X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=9974; i=patrick@stwcx.xyz; h=from:subject:message-id; bh=Zl4SOHWrTNyavSb9kRByEBgChA4XqNepGW6eS6nvoo0=; b=owEBbQKS/ZANAwAIAasDR8wtAMEZAcsmYgBpcRgyXemcZy2aIqW/DJqdR84wT2khVs5ybUFtQ dWZ1I6lOcaJAjMEAAEIAB0WIQQEYP2KLgsT1w1uokGrA0fMLQDBGQUCaXEYMgAKCRCrA0fMLQDB GVYCD/4hZqdrx3PbAQ+wpL+R34igu3C/nNLqDeOqb/Muuf6wtQjlgQpIE+WvgpItjpHWwhTOEHa JbfBlethLmRxFosCQizCFQpNSfyGmJeRhs2crC3ejGAPzOmet6cWtEFi5OIAo2HdV4rVtJ3juqC ZYcqXjeD3c3gIx937C8EfmCz5/3uRAw+uuAt/VsKlypLw2ss63au5P/0b976h7A0tEOrdYvCJt0 ZjsxO7/npJ+5EjVGOilUcn5jHtTwemDPMqMjXLCHwOrvojxe+OCHCUwdFtaVo1Zwph8DgCIOaOT xLYXcjngCzS6iI7G+YVm0L3nwCE1TyMFdYy1AXRJzteFdafV2jaoZ+1gCx0ruDVGk4dVhBYbges aTCbu3Mr7hs1V+MJ0+2O6on7mXUFKuBZsA6JaxddD7hLVgF06sz6SyJqG8phUpRZCcCUjdv1tbf JaxyLe0Qq21q1P3BsmT1Uh2PJy612avxxUf1HyP/iHuhOBVO3ruLIv/B6lN/jKi45wMYzJhz5iP oTjNLJLactiBl8ubgEIc6zTz55V9rFQaGMAFepV7YQebPF14XUNlt7wN7WZPohnWMl2H7kAgtLi bfTL/OB6zZ3hYMf72sEwVl1AUIZwb40NQM5YCcVMFt8JbXWrDZU5vnNPXaw8gIFj5bsB/xyyG2P ZwZpe+Mwn6rFBqA== X-Developer-Key: i=patrick@stwcx.xyz; a=openpgp; fpr=0460FD8A2E0B13D70D6EA241AB0347CC2D00C119 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=103.168.172.145; envelope-from=patrick@stwcx.xyz; helo=fout-a2-smtp.messagingengine.com X-Spam_score_int: -2 X-Spam_score: -0.3 X-Spam_bar: / X-Spam_report: (-0.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FROM_SUSPICIOUS_NTLD=0.499, PDS_OTHER_BAD_TLD=1.999, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @stwcx.xyz) X-ZM-MESSAGEID: 1769019501272154100 Extend the 16-bit PCA9552 model to support non-LED devices such as the PCA9535[1]. [1]: https://www.ti.com/lit/ds/symlink/pca9535.pdf Signed-off-by: Patrick Williams Reviewed-by: Glenn Miles --- hw/gpio/pca9552.c | 176 ++++++++++++++++++++++++++++---------= ---- include/hw/gpio/pca9552.h | 1 + include/hw/gpio/pca9552_regs.h | 10 +++ 3 files changed, 133 insertions(+), 54 deletions(-) diff --git a/hw/gpio/pca9552.c b/hw/gpio/pca9552.c index dd3c795e49..dd3f1536b6 100644 --- a/hw/gpio/pca9552.c +++ b/hw/gpio/pca9552.c @@ -31,6 +31,7 @@ struct PCA955xClass { =20 uint8_t pin_count; uint8_t max_reg; + bool has_led_support; }; typedef struct PCA955xClass PCA955xClass; =20 @@ -113,32 +114,59 @@ static void pca955x_update_pin_input(PCA955xState *s) for (i =3D 0; i < k->pin_count; i++) { uint8_t input_reg =3D PCA9552_INPUT0 + (i / 8); uint8_t bit_mask =3D 1 << (i % 8); - uint8_t config =3D pca955x_pin_get_config(s, i); uint8_t old_value =3D s->regs[input_reg] & bit_mask; uint8_t new_value; =20 - switch (config) { - case PCA9552_LED_ON: - /* Pin is set to 0V to turn on LED */ - s->regs[input_reg] &=3D ~bit_mask; - break; - case PCA9552_LED_OFF: - /* - * Pin is set to Hi-Z to turn off LED and - * pullup sets it to a logical 1 unless - * external device drives it low. - */ - if (s->ext_state[i] =3D=3D PCA9552_PIN_LOW) { + if (k->has_led_support) { + /* PCA9552: LED control behavior */ + uint8_t config =3D pca955x_pin_get_config(s, i); + + switch (config) { + case PCA9552_LED_ON: + /* Pin is set to 0V to turn on LED */ s->regs[input_reg] &=3D ~bit_mask; + break; + case PCA9552_LED_OFF: + /* + * Pin is set to Hi-Z to turn off LED and + * pullup sets it to a logical 1 unless + * external device drives it low. + */ + if (s->ext_state[i] =3D=3D PCA9552_PIN_LOW) { + s->regs[input_reg] &=3D ~bit_mask; + } else { + s->regs[input_reg] |=3D bit_mask; + } + break; + case PCA9552_LED_PWM0: + case PCA9552_LED_PWM1: + /* TODO */ + default: + break; + } + } else { + /* PCA9535: Simple GPIO behavior */ + uint8_t config_reg =3D PCA9535_CONFIG0 + (i / 8); + uint8_t output_reg =3D PCA9535_OUTPUT0 + (i / 8); + uint8_t polarity_reg =3D PCA9535_POLARITY0 + (i / 8); + + /* Check if pin is configured as input */ + if (s->regs[config_reg] & bit_mask) { + /* Input mode - reflect external state */ + if (s->ext_state[i] =3D=3D PCA9552_PIN_LOW) { + s->regs[input_reg] &=3D ~bit_mask; + } else { + s->regs[input_reg] |=3D bit_mask; + } } else { - s->regs[input_reg] |=3D bit_mask; + /* Output mode - reflect output register value */ + uint8_t output_bit =3D s->regs[output_reg] & bit_mask; + uint8_t polarity_bit =3D s->regs[polarity_reg] & bit_mask; + + /* Apply polarity inversion if set */ + s->regs[input_reg] =3D (s->regs[input_reg] & ~bit_mask) | + ((output_bit ^ polarity_bit) & bit_mas= k); } - break; - case PCA9552_LED_PWM0: - case PCA9552_LED_PWM1: - /* TODO */ - default: - break; } =20 /* update irq state only if pin state changed */ @@ -151,52 +179,52 @@ static void pca955x_update_pin_input(PCA955xState *s) =20 static uint8_t pca955x_read(PCA955xState *s, uint8_t reg) { - switch (reg) { - case PCA9552_INPUT0: - case PCA9552_INPUT1: - case PCA9552_PSC0: - case PCA9552_PWM0: - case PCA9552_PSC1: - case PCA9552_PWM1: - case PCA9552_LS0: - case PCA9552_LS1: - case PCA9552_LS2: - case PCA9552_LS3: - return s->regs[reg]; - default: + PCA955xClass *k =3D PCA955X_GET_CLASS(s); + + if (reg > k->max_reg) { qemu_log_mask(LOG_GUEST_ERROR, "%s: unexpected read to register %d= \n", __func__, reg); return 0xFF; } + + return s->regs[reg]; } =20 static void pca955x_write(PCA955xState *s, uint8_t reg, uint8_t data) { + PCA955xClass *k =3D PCA955X_GET_CLASS(s); uint16_t pins_status; =20 - switch (reg) { - case PCA9552_PSC0: - case PCA9552_PWM0: - case PCA9552_PSC1: - case PCA9552_PWM1: - s->regs[reg] =3D data; - break; - - case PCA9552_LS0: - case PCA9552_LS1: - case PCA9552_LS2: - case PCA9552_LS3: - pins_status =3D pca955x_pins_get_status(s); - s->regs[reg] =3D data; - pca955x_update_pin_input(s); - pca955x_display_pins_status(s, pins_status); - break; - - case PCA9552_INPUT0: - case PCA9552_INPUT1: - default: + if (reg > k->max_reg) { qemu_log_mask(LOG_GUEST_ERROR, "%s: unexpected write to register %= d\n", __func__, reg); + return; + } + + /* Handle read-only registers */ + if (reg =3D=3D PCA9552_INPUT0 || reg =3D=3D PCA9552_INPUT1) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: unexpected write to read-only register %d\n", + __func__, reg); + return; + } + + pins_status =3D pca955x_pins_get_status(s); + s->regs[reg] =3D data; + + /* Update GPIO state if this register affects outputs */ + if (k->has_led_support) { + /* PCA9552: Update on LED selector register writes */ + if (reg >=3D PCA9552_LS0 && reg <=3D PCA9552_LS3) { + pca955x_update_pin_input(s); + pca955x_display_pins_status(s, pins_status); + } + } else { + /* PCA9535: Update on OUTPUT, POLARITY, or CONFIG register writes = */ + if (reg >=3D PCA9535_OUTPUT0 && reg <=3D PCA9535_CONFIG1) { + pca955x_update_pin_input(s); + pca955x_display_pins_status(s, pins_status); + } } } =20 @@ -379,6 +407,26 @@ static void pca9552_reset(DeviceState *dev) s->len =3D 0; } =20 +static void pca9535_reset(DeviceState *dev) +{ + PCA955xState *s =3D PCA955X(dev); + + s->regs[PCA9535_INPUT0] =3D 0xFF; /* All inputs high (pull-ups) */ + s->regs[PCA9535_INPUT1] =3D 0xFF; /* All inputs high (pull-ups) */ + s->regs[PCA9535_OUTPUT0] =3D 0xFF; /* All outputs high */ + s->regs[PCA9535_OUTPUT1] =3D 0xFF; /* All outputs high */ + s->regs[PCA9535_POLARITY0] =3D 0x00; /* No polarity inversion */ + s->regs[PCA9535_POLARITY1] =3D 0x00; /* No polarity inversion */ + s->regs[PCA9535_CONFIG0] =3D 0xFF; /* All pins as inputs */ + s->regs[PCA9535_CONFIG1] =3D 0xFF; /* All pins as inputs */ + + memset(s->ext_state, PCA9552_PIN_HIZ, PCA955X_PIN_COUNT_MAX); + pca955x_update_pin_input(s); + + s->pointer =3D 0xFF; + s->len =3D 0; +} + static void pca955x_initfn(Object *obj) { PCA955xClass *k =3D PCA955X_GET_CLASS(obj); @@ -463,6 +511,19 @@ static void pca9552_class_init(ObjectClass *oc, const = void *data) dc->vmsd =3D &pca9552_vmstate; pc->max_reg =3D PCA9552_LS3; pc->pin_count =3D 16; + pc->has_led_support =3D true; +} + +static void pca9535_class_init(ObjectClass *oc, const void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(oc); + PCA955xClass *pc =3D PCA955X_CLASS(oc); + + device_class_set_legacy_reset(dc, pca9535_reset); + dc->vmsd =3D &pca9552_vmstate; + pc->max_reg =3D PCA9535_CONFIG1; + pc->pin_count =3D 16; + pc->has_led_support =3D false; } =20 static const TypeInfo pca9552_info =3D { @@ -471,10 +532,17 @@ static const TypeInfo pca9552_info =3D { .class_init =3D pca9552_class_init, }; =20 +static const TypeInfo pca9535_info =3D { + .name =3D TYPE_PCA9535, + .parent =3D TYPE_PCA955X, + .class_init =3D pca9535_class_init, +}; + static void pca955x_register_types(void) { type_register_static(&pca955x_info); type_register_static(&pca9552_info); + type_register_static(&pca9535_info); } =20 type_init(pca955x_register_types) diff --git a/include/hw/gpio/pca9552.h b/include/hw/gpio/pca9552.h index c36525f0c3..43b175235d 100644 --- a/include/hw/gpio/pca9552.h +++ b/include/hw/gpio/pca9552.h @@ -14,6 +14,7 @@ =20 #define TYPE_PCA9552 "pca9552" #define TYPE_PCA955X "pca955x" +#define TYPE_PCA9535 "pca9535" typedef struct PCA955xState PCA955xState; DECLARE_INSTANCE_CHECKER(PCA955xState, PCA955X, TYPE_PCA955X) diff --git a/include/hw/gpio/pca9552_regs.h b/include/hw/gpio/pca9552_regs.h index d8051cfbd6..5a6bb03396 100644 --- a/include/hw/gpio/pca9552_regs.h +++ b/include/hw/gpio/pca9552_regs.h @@ -29,4 +29,14 @@ */ #define PCA9552_AUTOINC (1 << 4) =20 +/* PCA9535 Registers (same addresses, different semantics) */ +#define PCA9535_INPUT0 0 /* read only input register 0 */ +#define PCA9535_INPUT1 1 /* read only input register 1 */ +#define PCA9535_OUTPUT0 2 /* read/write output register 0 */ +#define PCA9535_OUTPUT1 3 /* read/write output register 1 */ +#define PCA9535_POLARITY0 4 /* read/write polarity inversion register 0 = */ +#define PCA9535_POLARITY1 5 /* read/write polarity inversion register 1 = */ +#define PCA9535_CONFIG0 6 /* read/write configuration register 0 */ +#define PCA9535_CONFIG1 7 /* read/write configuration register 1 */ + #endif --=20 2.51.2 From nobody Mon Feb 9 21:16:19 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260121-pca9535-v1-2-164640e622ff@stwcx.xyz> References: <20260121-pca9535-v1-0-164640e622ff@stwcx.xyz> In-Reply-To: <20260121-pca9535-v1-0-164640e622ff@stwcx.xyz> To: qemu-devel@nongnu.org Cc: Glenn Miles , qemu-ppc@nongnu.org, qemu-arm@nongnu.org, =?utf-8?q?C=C3=A9dric_Le_Goater?= , Peter Maydell , Steven Lee , Troy Lee , Jamin Lin , Andrew Jeffery , Joel Stanley , Patrick Williams X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1475; i=patrick@stwcx.xyz; h=from:subject:message-id; bh=MLT6OB2X8S5dkaMqs+SY/xPIl09Y2hCJfnP/u4HCPJY=; b=owEBbQKS/ZANAwAIAasDR8wtAMEZAcsmYgBpcRgyUuNBTf6s52zLCxmM8omLdXWOc11AUD4pT 4BaGmntt/KJAjMEAAEIAB0WIQQEYP2KLgsT1w1uokGrA0fMLQDBGQUCaXEYMgAKCRCrA0fMLQDB GVQ7D/9EVWpzU47eFwfYCg66+14OFseA9jHn0PG5UQUoaSlF1+IGl17V6F43bdxIHdKYFGVfL9m 9GxsYHUULWsdoN8XhLxhEIUAC4xIn0mKktbRFAFmYBeV93CmItWOWkzPNDiuGUToMT4lo5KCds1 nz8zCFBVfnoltdIwXWM9wD7V1KQu2YBUIOwl6frcWS5dphufEoPqtlmsDwijTapb+ssUEPtl9ih cF3umM6HBR59s5N2AEWmOWrqKP96y5iUzn+uiNcC3h4xTol99e0Ds6aJnXzVpNNrnS6tukX5tM3 Gd/wjbnixiKLVZxsvEjqy683yxlx+D+QPFFrsQ7vtlFvq2yjTTbuVAs5jrV8QrUQiInpbX9Ma1+ ZHLE/PJWr7Kyqq9XOaZu9vtGwSSWkLM1ZJy8EA+/3QM5p9vQsY2Q/NrNuLKUrPJ07394AvMYYgI xp50qAjYpqRXF22aIxlhtiJTaCc5zpZp2TFGTKYqoLSfVF2IAm7JgimN6FFNQc5qDuuaA370vHO 00xl1jBhpNe33KclQBWbxKqyJTbDYaDHFfbNWTExQviboqNNMCOiUqMXjfmr7RhJmMizU52t7XS B2gj0yKsE9OWkUGMrMvnYkolS0OsDuiy9nIglbAd051FwW3kMdbRfDY3ZJiPmkoNfP39kGHSnGR KHpowPuE3yDC7Ug== X-Developer-Key: i=patrick@stwcx.xyz; a=openpgp; fpr=0460FD8A2E0B13D70D6EA241AB0347CC2D00C119 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=103.168.172.145; envelope-from=patrick@stwcx.xyz; helo=fout-a2-smtp.messagingengine.com X-Spam_score_int: -2 X-Spam_score: -0.3 X-Spam_bar: / X-Spam_report: (-0.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FROM_SUSPICIOUS_NTLD=0.499, PDS_OTHER_BAD_TLD=1.999, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @stwcx.xyz) X-ZM-MESSAGEID: 1769019542025154100 A few entries in the catalina model were using the PCA9552 chip because it was "close enough" in function. Since there is a PCA9535 model now, switch to use it. Signed-off-by: Patrick Williams Reviewed-by: C=C3=A9dric Le Goater --- hw/arm/aspeed_ast2600_catalina.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/aspeed_ast2600_catalina.c b/hw/arm/aspeed_ast2600_catal= ina.c index 4edb30bb16..65495a524e 100644 --- a/hw/arm/aspeed_ast2600_catalina.c +++ b/hw/arm/aspeed_ast2600_catalina.c @@ -480,7 +480,7 @@ static void catalina_bmc_i2c_init(AspeedMachineState *b= mc) /* i2c0mux1ch1 */ /* io_expander7 - pca9535@20 */ i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 1), - TYPE_PCA9552, 0x20); + TYPE_PCA9535, 0x20); /* eeprom@50 */ at24c_eeprom_init_rom(pca954x_i2c_get_bus(i2c_mux, 1), 0x50, 8 * KiB, gb200io_eeprom, gb200io_eeprom_len); @@ -497,7 +497,7 @@ static void catalina_bmc_i2c_init(AspeedMachineState *b= mc) /* i2c0mux4ch1 */ /* io_expander8 - pca9535@21 */ i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 1), - TYPE_PCA9552, 0x21); + TYPE_PCA9535, 0x21); /* eeprom@50 */ at24c_eeprom_init_rom(pca954x_i2c_get_bus(i2c_mux, 1), 0x50, 8 * KiB, gb200io_eeprom, gb200io_eeprom_len); --=20 2.51.2