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Sun, 18 Jan 2026 14:05:40 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Pierrick Bouvier Subject: [PULL 34/54] include/tcg: Drop TCG_TARGET_REG_BITS tests Date: Mon, 19 Jan 2026 09:03:54 +1100 Message-ID: <20260118220414.8177-35-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260118220414.8177-1-richard.henderson@linaro.org> References: <20260118220414.8177-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1768774004189158500 Content-Type: text/plain; charset="utf-8" Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/tcg/tcg-op.h | 9 +++------ include/tcg/tcg-opc.h | 5 +---- include/tcg/tcg.h | 27 ++------------------------- 3 files changed, 6 insertions(+), 35 deletions(-) diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h index 232733cb71..ee379994e7 100644 --- a/include/tcg/tcg-op.h +++ b/include/tcg/tcg-op.h @@ -31,8 +31,7 @@ #if TARGET_INSN_START_EXTRA_WORDS =3D=3D 0 static inline void tcg_gen_insn_start(target_ulong pc) { - TCGOp *op =3D tcg_emit_op(INDEX_op_insn_start, - INSN_START_WORDS * 64 / TCG_TARGET_REG_BITS); + TCGOp *op =3D tcg_emit_op(INDEX_op_insn_start, INSN_START_WORDS); tcg_set_insn_start_param(op, 0, pc); tcg_set_insn_start_param(op, 1, 0); tcg_set_insn_start_param(op, 2, 0); @@ -40,8 +39,7 @@ static inline void tcg_gen_insn_start(target_ulong pc) #elif TARGET_INSN_START_EXTRA_WORDS =3D=3D 1 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1) { - TCGOp *op =3D tcg_emit_op(INDEX_op_insn_start, - INSN_START_WORDS * 64 / TCG_TARGET_REG_BITS); + TCGOp *op =3D tcg_emit_op(INDEX_op_insn_start, INSN_START_WORDS); tcg_set_insn_start_param(op, 0, pc); tcg_set_insn_start_param(op, 1, a1); tcg_set_insn_start_param(op, 2, 0); @@ -50,8 +48,7 @@ static inline void tcg_gen_insn_start(target_ulong pc, ta= rget_ulong a1) static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1, target_ulong a2) { - TCGOp *op =3D tcg_emit_op(INDEX_op_insn_start, - INSN_START_WORDS * 64 / TCG_TARGET_REG_BITS); + TCGOp *op =3D tcg_emit_op(INDEX_op_insn_start, INSN_START_WORDS); tcg_set_insn_start_param(op, 0, pc); tcg_set_insn_start_param(op, 1, a1); tcg_set_insn_start_param(op, 2, a2); diff --git a/include/tcg/tcg-opc.h b/include/tcg/tcg-opc.h index 28806057c5..61f1c28858 100644 --- a/include/tcg/tcg-opc.h +++ b/include/tcg/tcg-opc.h @@ -109,9 +109,7 @@ DEF(extu_i32_i64, 1, 1, 0, 0) DEF(extrl_i64_i32, 1, 1, 0, 0) DEF(extrh_i64_i32, 1, 1, 0, 0) =20 -#define DATA64_ARGS (TCG_TARGET_REG_BITS =3D=3D 64 ? 1 : 2) - -DEF(insn_start, 0, 0, DATA64_ARGS * INSN_START_WORDS, TCG_OPF_NOT_PRESENT) +DEF(insn_start, 0, 0, INSN_START_WORDS, TCG_OPF_NOT_PRESENT) =20 DEF(exit_tb, 0, 0, 1, TCG_OPF_BB_EXIT | TCG_OPF_BB_END | TCG_OPF_NOT_PRESE= NT) DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_EXIT | TCG_OPF_BB_END | TCG_OPF_NOT_PRESE= NT) @@ -184,5 +182,4 @@ DEF(last_generic, 0, 0, 0, TCG_OPF_NOT_PRESENT) =20 #include "tcg-target-opc.h.inc" =20 -#undef DATA64_ARGS #undef DEF diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 067150c542..60942ce05c 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -43,19 +43,10 @@ #define CPU_TEMP_BUF_NLONGS 128 #define TCG_STATIC_FRAME_SIZE (CPU_TEMP_BUF_NLONGS * sizeof(long)) =20 -#if TCG_TARGET_REG_BITS =3D=3D 32 -typedef int32_t tcg_target_long; -typedef uint32_t tcg_target_ulong; -#define TCG_PRIlx PRIx32 -#define TCG_PRIld PRId32 -#elif TCG_TARGET_REG_BITS =3D=3D 64 typedef int64_t tcg_target_long; typedef uint64_t tcg_target_ulong; #define TCG_PRIlx PRIx64 #define TCG_PRIld PRId64 -#else -#error unsupported -#endif =20 #if TCG_TARGET_NB_REGS <=3D 32 typedef uint32_t TCGRegSet; @@ -147,11 +138,7 @@ typedef enum TCGType { #define TCG_TYPE_COUNT (TCG_TYPE_V256 + 1) =20 /* An alias for the size of the host register. */ -#if TCG_TARGET_REG_BITS =3D=3D 32 - TCG_TYPE_REG =3D TCG_TYPE_I32, -#else TCG_TYPE_REG =3D TCG_TYPE_I64, -#endif =20 /* An alias for the size of the native pointer. */ #if UINTPTR_MAX =3D=3D UINT32_MAX @@ -605,23 +592,13 @@ static inline void tcg_set_insn_param(TCGOp *op, unsi= gned arg, TCGArg v) static inline uint64_t tcg_get_insn_start_param(TCGOp *op, unsigned arg) { tcg_debug_assert(arg < INSN_START_WORDS); - if (TCG_TARGET_REG_BITS =3D=3D 64) { - return tcg_get_insn_param(op, arg); - } else { - return deposit64(tcg_get_insn_param(op, arg * 2), 32, 32, - tcg_get_insn_param(op, arg * 2 + 1)); - } + return tcg_get_insn_param(op, arg); } =20 static inline void tcg_set_insn_start_param(TCGOp *op, unsigned arg, uint6= 4_t v) { tcg_debug_assert(arg < INSN_START_WORDS); - if (TCG_TARGET_REG_BITS =3D=3D 64) { - tcg_set_insn_param(op, arg, v); - } else { - tcg_set_insn_param(op, arg * 2, v); - tcg_set_insn_param(op, arg * 2 + 1, v >> 32); - } + tcg_set_insn_param(op, arg, v); } =20 /* The last op that was emitted. */ --=20 2.43.0