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charset="utf-8" Separate the implementation of the blit and the src and dst setup. This maintains the public interface of ati_2d_blt while allowing for flexibility in how the blit is performed. The ati_2d_blt function becomes the function that sets up the src and dst for a VRAM blit and then calls ati_2d_do_blt. A later patch will set up the src and dst for a HOST_DATA blit before calling ati_2d_do_blt. Signed-off-by: Chad Jablonski --- hw/display/ati_2d.c | 59 +++++++++++++++++++++++++-------------------- 1 file changed, 33 insertions(+), 26 deletions(-) diff --git a/hw/display/ati_2d.c b/hw/display/ati_2d.c index 38390f2da8..691e0f0702 100644 --- a/hw/display/ati_2d.c +++ b/hw/display/ati_2d.c @@ -80,38 +80,19 @@ static void setup_2d_blt_dst(const ATIVGAState *s, ATIB= ltDst *dst) } } =20 -void ati_2d_blt(ATIVGAState *s) +static void ati_2d_do_blt(ATIVGAState *s, const ATIBltSrc *src, ATIBltDst = *dst) { /* FIXME it is probably more complex than this and may need to be */ /* rewritten but for now as a start just to get some output: */ DisplaySurface *ds =3D qemu_console_surface(s->vga.con); uint8_t *end =3D s->vga.vram_ptr + s->vga.vram_size; int dst_stride_words, src_stride_words; - ATIBltDst _dst; /* TEMP: avoid churn in future patches */ - ATIBltDst *dst =3D &_dst; - ATIBltSrc _src; /* TEMP: avoid churn in future patches */ - ATIBltSrc *src =3D &_src; =20 DPRINTF("%p %u ds: %p %d %d rop: %x\n", s->vga.vram_ptr, s->vga.vbe_start_addr, surface_data(ds), surface_stride(ds), surface_bits_per_pixel(ds), (s->regs.dp_mix & GMC_ROP3_MASK) >> 16); =20 - setup_2d_blt_dst(s, dst); - - src->x =3D (dst->left_to_right ? - s->regs.src_x : - s->regs.src_x + 1 - dst->rect.width); - src->y =3D (dst->top_to_bottom ? - s->regs.src_y : - s->regs.src_y + 1 - dst->rect.height); - src->stride =3D s->regs.src_pitch; - src->bits =3D s->vga.vram_ptr + s->regs.src_offset; - if (s->dev_id =3D=3D PCI_DEVICE_ID_ATI_RAGE128_PF) { - src->bits +=3D s->regs.crtc_offset & 0x07ffffff; - src->stride *=3D dst->bpp; - } - if (!dst->bpp) { qemu_log_mask(LOG_GUEST_ERROR, "Invalid bpp\n"); return; @@ -147,12 +128,6 @@ void ati_2d_blt(ATIVGAState *s) qemu_log_mask(LOG_GUEST_ERROR, "Zero source pitch\n"); return; } - if (src->x > 0x3fff || src->y > 0x3fff || src->bits >=3D end - || src->bits + src->x - + (src->y + dst->rect.height) * src->stride >=3D end) { - qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n"); - return; - } =20 DPRINTF("pixman_blt(%p, %p, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d= )\n", src->bits, dst->bits, @@ -274,3 +249,35 @@ void ati_2d_blt(ATIVGAState *s) dst->rect.height * surface_stride(ds)); } } + +void ati_2d_blt(ATIVGAState *s) +{ + uint8_t *end =3D s->vga.vram_ptr + s->vga.vram_size; + ATIBltDst dst; + ATIBltSrc src; + + setup_2d_blt_dst(s, &dst); + + /* Setup src to point at VRAM */ + src.x =3D (dst.left_to_right ? + s->regs.src_x : + s->regs.src_x + 1 - dst.rect.width); + src.y =3D (dst.top_to_bottom ? + s->regs.src_y : + s->regs.src_y + 1 - dst.rect.height); + src.stride =3D s->regs.src_pitch; + src.bits =3D s->vga.vram_ptr + s->regs.src_offset; + if (s->dev_id =3D=3D PCI_DEVICE_ID_ATI_RAGE128_PF) { + src.bits +=3D s->regs.crtc_offset & 0x07ffffff; + src.stride *=3D dst.bpp; + } + + if (src.x > 0x3fff || src.y > 0x3fff || src.bits >=3D end + || src.bits + src.x + + (src.y + dst.rect.height) * src.stride >=3D end) { + qemu_log_mask(LOG_UNIMP, "blt src outside vram not implemented\n"); + return; + } + + ati_2d_do_blt(s, &src, &dst); +} --=20 2.51.2