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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1768297103; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5ngXbfZKk15+ACRyo+DnfXhdDtH8HlbsllMkfeSzSIU=; b=gZL2s6AyDoSgYGe0WuzeZS0/XUtGrzwQ8MrgpIHocIRxx0haY8CNFxNW2K4kLG1AtdIuF0 dhJ32t27IjTc5NJI+l9Tjlg7jBflS2hdS/oJhOX9mJ8wRuQYzWKAmvxkTfb3H2oGIg9NWw eSc5YCBmsGcORIBMYOrqSdDMvvj/pxk= X-MC-Unique: DFFv6Ls5OOaWCHiQJgIlrQ-1 X-Mimecast-MFC-AGG-ID: DFFv6Ls5OOaWCHiQJgIlrQ_1768297101 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-devel@nongnu.org Cc: Alex Williamson , Farhan Ali , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Subject: [PULL 35/41] util/vfio-helper: Fix endianness in PCI config read/write functions Date: Tue, 13 Jan 2026 10:36:31 +0100 Message-ID: <20260113093637.1549214-36-clg@redhat.com> In-Reply-To: <20260113093637.1549214-1-clg@redhat.com> References: <20260113093637.1549214-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1768297173840158500 From: Farhan Ali The VFIO pread/pwrite functions use little-endian data format. Currently, t= he qemu_vfio_pci_read_config() and qemu_vfio_pci_write_config() don't correctly convert from CPU native endian format to little-endian (and vice versa) when using the pread/pwrite functions. Fix this by limiting read/write to 32 bits and handling endian conversion in qemu_vfio_pci_read_config() and qemu_vfio_pci_write_config(). Signed-off-by: Farhan Ali Reviewed-by: C=C3=A9dric Le Goater Link: https://lore.kernel.org/qemu-devel/20260105222029.2423-1-alifm@linux.= ibm.com [ clg: Fixed typo in subject ] Signed-off-by: C=C3=A9dric Le Goater --- util/vfio-helpers.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/util/vfio-helpers.c b/util/vfio-helpers.c index c6195161637a16b4f26dc82f0297e43281a717f7..aab0bf9d485d41b7dc41a1e4644= 9060777cca5e2 100644 --- a/util/vfio-helpers.c +++ b/util/vfio-helpers.c @@ -233,31 +233,36 @@ int qemu_vfio_pci_init_irq(QEMUVFIOState *s, EventNot= ifier *e, return 0; } =20 -static int qemu_vfio_pci_read_config(QEMUVFIOState *s, void *buf, +static int qemu_vfio_pci_read_config(QEMUVFIOState *s, uint32_t *buf, int size, int ofs) { int ret; + uint32_t val_le; =20 trace_qemu_vfio_pci_read_config(buf, ofs, size, s->config_region_info.offset, s->config_region_info.size); assert(QEMU_IS_ALIGNED(s->config_region_info.offset + ofs, size)); ret =3D RETRY_ON_EINTR( - pread(s->device, buf, size, s->config_region_info.offset + ofs) + pread(s->device, &val_le, size, s->config_region_info.offset + ofs) ); + + *buf =3D le32_to_cpu(val_le); return ret =3D=3D size ? 0 : -errno; } =20 -static int qemu_vfio_pci_write_config(QEMUVFIOState *s, void *buf, int siz= e, int ofs) +static int qemu_vfio_pci_write_config(QEMUVFIOState *s, uint32_t *buf, int= size, int ofs) { int ret; + uint32_t val_le; =20 + val_le =3D cpu_to_le32(*buf); trace_qemu_vfio_pci_write_config(buf, ofs, size, s->config_region_info.offset, s->config_region_info.size); assert(QEMU_IS_ALIGNED(s->config_region_info.offset + ofs, size)); ret =3D RETRY_ON_EINTR( - pwrite(s->device, buf, size, s->config_region_info.offset + ofs) + pwrite(s->device, &val_le, size, s->config_region_info.offset + of= s) ); return ret =3D=3D size ? 0 : -errno; } @@ -296,7 +301,7 @@ static int qemu_vfio_init_pci(QEMUVFIOState *s, const c= har *device, { int ret; int i; - uint16_t pci_cmd; + uint32_t pci_cmd; struct vfio_group_status group_status =3D { .argsz =3D sizeof(group_st= atus) }; struct vfio_iommu_type1_info *iommu_info =3D NULL; size_t iommu_info_size =3D sizeof(*iommu_info); --=20 2.52.0