From nobody Tue Feb 10 00:02:04 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1768201927143643.5205911129891; Sun, 11 Jan 2026 23:12:07 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3H-0007qu-OI; Mon, 12 Jan 2026 02:09:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vfC3E-0007ne-IA for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:20 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3B-0004ps-Fd for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:20 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxAfEYnmRphMYHAA--.25341S3; Mon, 12 Jan 2026 15:09:12 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJBxacERnmRpEqgaAA--.41358S3; Mon, 12 Jan 2026 15:09:12 +0800 (CST) From: Bibo Mao To: qemu-devel@nongnu.org Cc: Song Gao Subject: [PULL 01/10] target/loongarch: Add PMU migration support in KVM mode Date: Mon, 12 Jan 2026 15:08:55 +0800 Message-Id: <20260112070904.3230440-2-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260112070904.3230440-1-maobibo@loongson.cn> References: <20260112070904.3230440-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJBxacERnmRpEqgaAA--.41358S3 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1768201929234158500 Content-Type: text/plain; charset="utf-8" PMU is supported in KVM mode. When VM is migrated, PMU register should be migrated also, otherwise PMU will be disabled after migration. Here add PMU register save and restore interface and PMU register state migration is added also. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- target/loongarch/cpu-csr.h | 4 +++ target/loongarch/cpu.h | 4 +++ target/loongarch/kvm/kvm.c | 54 +++++++++++++++++++++++++++++++++++++- target/loongarch/machine.c | 21 +++++++++++++++ 4 files changed, 82 insertions(+), 1 deletion(-) diff --git a/target/loongarch/cpu-csr.h b/target/loongarch/cpu-csr.h index 7755592926..d860417af2 100644 --- a/target/loongarch/cpu-csr.h +++ b/target/loongarch/cpu-csr.h @@ -207,6 +207,10 @@ FIELD(CSR_DMW_32, PSEG, 25, 3) FIELD(CSR_DMW_32, VSEG, 29, 3) FIELD(CSR_DMW_64, VSEG, 60, 4) =20 +/* Performance Counter registers */ +#define LOONGARCH_CSR_PERFCTRL(N) (0x200 + 2 * N) +#define LOONGARCH_CSR_PERFCNTR(N) (0x201 + 2 * N) + /* Debug CSRs */ #define LOONGARCH_CSR_DBG 0x500 /* debug config */ FIELD(CSR_DBG, DST, 0, 1) diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index 92af68ea7f..0485cdbda0 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -223,6 +223,7 @@ extern const char * const fregnames[32]; #define IRQ_IPI 12 #define INT_DMSI 14 =20 +#define MAX_PERF_EVENTS 16 #define LOONGARCH_STLB 2048 /* 2048 STLB */ #define LOONGARCH_MTLB 64 /* 64 MTLB */ #define LOONGARCH_TLB_MAX (LOONGARCH_STLB + LOONGARCH_MTLB) @@ -357,6 +358,8 @@ typedef struct CPUArchState { uint64_t CSR_MERRSAVE; uint64_t CSR_CTAG; uint64_t CSR_DMW[4]; + uint64_t CSR_PERFCTRL[MAX_PERF_EVENTS]; + uint64_t CSR_PERFCNTR[MAX_PERF_EVENTS]; uint64_t CSR_DBG; uint64_t CSR_DERA; uint64_t CSR_DSAVE; @@ -367,6 +370,7 @@ typedef struct CPUArchState { struct { uint64_t guest_addr; } stealtime; + uint32_t perf_event_num; =20 #ifdef CONFIG_TCG float_status fp_status; diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c index ef3359ced9..9d844c4905 100644 --- a/target/loongarch/kvm/kvm.c +++ b/target/loongarch/kvm/kvm.c @@ -155,6 +155,46 @@ static int kvm_loongarch_put_regs_core(CPUState *cs) return ret; } =20 +static int kvm_loongarch_put_pmu(CPUState *cs) +{ + int i, ret =3D 0; + CPULoongArchState *env =3D cpu_env(cs); + LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); + + if (cpu->pmu !=3D ON_OFF_AUTO_ON) { + return 0; + } + + for (i =3D 0; i < env->perf_event_num; i++) { + ret |=3D kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PERFCTRL(= i)), + &env->CSR_PERFCTRL[i]); + ret |=3D kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PERFCNTR(= i)), + &env->CSR_PERFCNTR[i]); + } + + return ret; +} + +static int kvm_loongarch_get_pmu(CPUState *cs) +{ + int i, ret =3D 0; + CPULoongArchState *env =3D cpu_env(cs); + LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); + + if (cpu->pmu !=3D ON_OFF_AUTO_ON) { + return 0; + } + + for (i =3D 0; i < env->perf_event_num; i++) { + ret |=3D kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PERFCTRL(= i)), + &env->CSR_PERFCTRL[i]); + ret |=3D kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PERFCNTR(= i)), + &env->CSR_PERFCNTR[i]); + } + + return ret; +} + static int kvm_loongarch_get_csr(CPUState *cs) { int ret =3D 0; @@ -316,6 +356,8 @@ static int kvm_loongarch_get_csr(CPUState *cs) ret |=3D kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_DMW(3)), &env->CSR_DMW[3]); =20 + ret |=3D kvm_loongarch_get_pmu(cs); + ret |=3D kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TVAL), &env->CSR_TVAL); =20 @@ -488,6 +530,9 @@ static int kvm_loongarch_put_csr(CPUState *cs, KvmPutSt= ate level) =20 ret |=3D kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_DMW(3)), &env->CSR_DMW[3]); + + ret |=3D kvm_loongarch_put_pmu(cs); + /* * timer cfg must be put at last since it is used to enable * guest timer @@ -1027,8 +1072,15 @@ static int kvm_cpu_check_pmu(CPUState *cs, Error **e= rrp) } =20 if (kvm_supported) { + /* + * TODO: Will add supported perf event number query interface + * from host, set perf event number with 4 by default + */ + cpu->pmu =3D ON_OFF_AUTO_ON; + env->perf_event_num =3D 4; env->cpucfg[6] =3D FIELD_DP32(env->cpucfg[6], CPUCFG6, PMP, 1); - env->cpucfg[6] =3D FIELD_DP32(env->cpucfg[6], CPUCFG6, PMNUM, 3); + env->cpucfg[6] =3D FIELD_DP32(env->cpucfg[6], CPUCFG6, PMNUM, + env->perf_event_num - 1); env->cpucfg[6] =3D FIELD_DP32(env->cpucfg[6], CPUCFG6, PMBITS, 63); env->cpucfg[6] =3D FIELD_DP32(env->cpucfg[6], CPUCFG6, UPM, 1); } diff --git a/target/loongarch/machine.c b/target/loongarch/machine.c index 0366a50763..28b9079d04 100644 --- a/target/loongarch/machine.c +++ b/target/loongarch/machine.c @@ -153,6 +153,26 @@ static const VMStateDescription vmstate_lbt =3D { }, }; =20 +static bool pmu_needed(void *opaque) +{ + LoongArchCPU *cpu =3D opaque; + + return cpu->pmu =3D=3D ON_OFF_AUTO_ON; +} + +static const VMStateDescription vmstate_pmu =3D { + .name =3D "cpu/pmu", + .version_id =3D 0, + .minimum_version_id =3D 0, + .needed =3D pmu_needed, + .fields =3D (const VMStateField[]) { + VMSTATE_UINT32(env.perf_event_num, LoongArchCPU), + VMSTATE_UINT64_ARRAY(env.CSR_PERFCTRL, LoongArchCPU, MAX_PERF_EVEN= TS), + VMSTATE_UINT64_ARRAY(env.CSR_PERFCNTR, LoongArchCPU, MAX_PERF_EVEN= TS), + VMSTATE_END_OF_LIST() + }, +}; + #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) static bool tlb_needed(void *opaque) { @@ -266,6 +286,7 @@ const VMStateDescription vmstate_loongarch_cpu =3D { #endif &vmstate_lbt, &vmstate_msgint, + &vmstate_pmu, NULL } }; --=20 2.52.0 From nobody Tue Feb 10 00:02:04 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1768201926937674.2939980969982; Sun, 11 Jan 2026 23:12:06 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3H-0007p6-1j; Mon, 12 Jan 2026 02:09:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vfC3E-0007n8-3s for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:20 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3B-0004pr-EG for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:19 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxPMMZnmRphcYHAA--.24842S3; Mon, 12 Jan 2026 15:09:13 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJBxacERnmRpEqgaAA--.41358S4; Mon, 12 Jan 2026 15:09:12 +0800 (CST) From: Bibo Mao To: qemu-devel@nongnu.org Cc: Song Gao Subject: [PULL 02/10] target/loongarch: Call function loongarch_la464_init_csr() after realized Date: Mon, 12 Jan 2026 15:08:56 +0800 Message-Id: <20260112070904.3230440-3-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260112070904.3230440-1-maobibo@loongson.cn> References: <20260112070904.3230440-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJBxacERnmRpEqgaAA--.41358S4 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" When CPU is realized, it will check capability of host and set guest features, such as PMU CSR register number used by VM etc. Here move function call with loongarch_la464_init_csr() after CPU is realized. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- target/loongarch/cpu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index e01e044239..67ad9c3b79 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -106,11 +106,11 @@ bool loongarch_cpu_has_work(CPUState *cs) } #endif /* !CONFIG_USER_ONLY */ =20 -static void loongarch_la464_init_csr(Object *obj) +static void loongarch_la464_init_csr(DeviceState *dev) { #ifndef CONFIG_USER_ONLY static bool initialized; - LoongArchCPU *cpu =3D LOONGARCH_CPU(obj); + LoongArchCPU *cpu =3D LOONGARCH_CPU(dev); CPULoongArchState *env =3D &cpu->env; int i, num; =20 @@ -369,7 +369,6 @@ static void loongarch_la464_initfn(Object *obj) =20 cpu->msgint =3D ON_OFF_AUTO_OFF; cpu->ptw =3D ON_OFF_AUTO_OFF; - loongarch_la464_init_csr(obj); loongarch_cpu_post_init(obj); } =20 @@ -524,6 +523,7 @@ static void loongarch_cpu_realizefn(DeviceState *dev, E= rror **errp) =20 qemu_init_vcpu(cs); cpu_reset(cs); + loongarch_la464_init_csr(dev); =20 lacc->parent_realize(dev, errp); } --=20 2.52.0 From nobody Tue Feb 10 00:02:04 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1768201926796818.9653571579083; Sun, 11 Jan 2026 23:12:06 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3H-0007qQ-6a; Mon, 12 Jan 2026 02:09:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vfC3E-0007nP-CQ for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:20 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3B-0004pv-Eu for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:20 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8Axz8MZnmRphsYHAA--.25365S3; Mon, 12 Jan 2026 15:09:13 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJBxacERnmRpEqgaAA--.41358S5; Mon, 12 Jan 2026 15:09:13 +0800 (CST) From: Bibo Mao To: qemu-devel@nongnu.org Cc: Song Gao Subject: [PULL 03/10] target/loongarch: Add PMU register dump support in KVM Date: Mon, 12 Jan 2026 15:08:57 +0800 Message-Id: <20260112070904.3230440-4-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260112070904.3230440-1-maobibo@loongson.cn> References: <20260112070904.3230440-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJBxacERnmRpEqgaAA--.41358S5 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, UPPERCASE_50_75=0.008 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1768201929181158500 Content-Type: text/plain; charset="utf-8" PMU is supported in KVM mode. With info registers command, PMU CSR registers should be dumped also. And it is not necessary in TCG mode. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- target/loongarch/cpu.c | 5 +++++ target/loongarch/csr.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 37 insertions(+) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 67ad9c3b79..b653948526 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -129,6 +129,11 @@ static void loongarch_la464_init_csr(DeviceState *dev) set_csr_flag(LOONGARCH_CSR_MERRERA, CSRFL_UNUSED); set_csr_flag(LOONGARCH_CSR_MERRSAVE, CSRFL_UNUSED); set_csr_flag(LOONGARCH_CSR_CTAG, CSRFL_UNUSED); + + for (i =3D env->perf_event_num; i < MAX_PERF_EVENTS; i++) { + set_csr_flag(LOONGARCH_CSR_PERFCTRL(i), CSRFL_UNUSED); + set_csr_flag(LOONGARCH_CSR_PERFCNTR(i), CSRFL_UNUSED); + } } #endif } diff --git a/target/loongarch/csr.c b/target/loongarch/csr.c index f973780bba..332a1396cc 100644 --- a/target/loongarch/csr.c +++ b/target/loongarch/csr.c @@ -94,6 +94,38 @@ static CSRInfo csr_info[] =3D { CSR_OFF_ARRAY(DMW, 1), CSR_OFF_ARRAY(DMW, 2), CSR_OFF_ARRAY(DMW, 3), + CSR_OFF_ARRAY(PERFCTRL, 0), + CSR_OFF_ARRAY(PERFCNTR, 0), + CSR_OFF_ARRAY(PERFCTRL, 1), + CSR_OFF_ARRAY(PERFCNTR, 1), + CSR_OFF_ARRAY(PERFCTRL, 2), + CSR_OFF_ARRAY(PERFCNTR, 2), + CSR_OFF_ARRAY(PERFCTRL, 3), + CSR_OFF_ARRAY(PERFCNTR, 3), + CSR_OFF_ARRAY(PERFCTRL, 4), + CSR_OFF_ARRAY(PERFCNTR, 4), + CSR_OFF_ARRAY(PERFCTRL, 5), + CSR_OFF_ARRAY(PERFCNTR, 5), + CSR_OFF_ARRAY(PERFCTRL, 6), + CSR_OFF_ARRAY(PERFCNTR, 6), + CSR_OFF_ARRAY(PERFCTRL, 7), + CSR_OFF_ARRAY(PERFCNTR, 7), + CSR_OFF_ARRAY(PERFCTRL, 8), + CSR_OFF_ARRAY(PERFCNTR, 8), + CSR_OFF_ARRAY(PERFCTRL, 9), + CSR_OFF_ARRAY(PERFCNTR, 9), + CSR_OFF_ARRAY(PERFCTRL, 10), + CSR_OFF_ARRAY(PERFCNTR, 10), + CSR_OFF_ARRAY(PERFCTRL, 11), + CSR_OFF_ARRAY(PERFCNTR, 11), + CSR_OFF_ARRAY(PERFCTRL, 12), + CSR_OFF_ARRAY(PERFCNTR, 12), + CSR_OFF_ARRAY(PERFCTRL, 13), + CSR_OFF_ARRAY(PERFCNTR, 13), + CSR_OFF_ARRAY(PERFCTRL, 14), + CSR_OFF_ARRAY(PERFCNTR, 14), + CSR_OFF_ARRAY(PERFCTRL, 15), + CSR_OFF_ARRAY(PERFCNTR, 15), CSR_OFF(DBG), CSR_OFF(DERA), CSR_OFF(DSAVE), --=20 2.52.0 From nobody Tue Feb 10 00:02:04 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1768201925848569.0302305030458; Sun, 11 Jan 2026 23:12:05 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3I-0007rp-Gx; Mon, 12 Jan 2026 02:09:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vfC3F-0007oE-5d for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:21 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3B-0004q1-HS for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:20 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8Dx98EanmRph8YHAA--.12503S3; Mon, 12 Jan 2026 15:09:14 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJBxacERnmRpEqgaAA--.41358S6; Mon, 12 Jan 2026 15:09:13 +0800 (CST) From: Bibo Mao To: qemu-devel@nongnu.org Cc: Song Gao Subject: [PULL 04/10] hw/loongarch/virt: Add field ram_end in LoongArchVirtMachineState Date: Mon, 12 Jan 2026 15:08:58 +0800 Message-Id: <20260112070904.3230440-5-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260112070904.3230440-1-maobibo@loongson.cn> References: <20260112070904.3230440-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJBxacERnmRpEqgaAA--.41358S6 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" DRAM region is dynamically set and the last valid physical address region with LoongArch Virt Machine. To record the last valid physical address, field ram_end is added in structure LoongArchVirtMachineState. In future end address of DRAM cannot exceed base addres of PCIE 64-bit MMIO region. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- hw/loongarch/virt.c | 2 ++ include/hw/loongarch/virt.h | 1 + 2 files changed, 3 insertions(+) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 6efa15da47..9d189e5a77 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -849,8 +849,10 @@ static void virt_init(MachineState *machine) exit(EXIT_FAILURE); } machine_memory_devices_init(machine, base, device_mem_size); + base +=3D device_mem_size; } =20 + lvms->ram_end =3D base; /* load the BIOS image. */ virt_firmware_init(lvms); =20 diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h index 8a04dd8314..d7e94428f0 100644 --- a/include/hw/loongarch/virt.h +++ b/include/hw/loongarch/virt.h @@ -125,6 +125,7 @@ struct LoongArchVirtMachineState { uint64_t misc_feature; uint64_t misc_status; DeviceState *dintc; + hwaddr ram_end; }; =20 #define TYPE_LOONGARCH_VIRT_MACHINE MACHINE_TYPE_NAME("virt") --=20 2.52.0 From nobody Tue Feb 10 00:02:04 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1768201771708268.7599026124168; Sun, 11 Jan 2026 23:09:31 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3I-0007rA-0H; Mon, 12 Jan 2026 02:09:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vfC3F-0007oV-Dh for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:21 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3C-0004qK-6Q for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:21 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8CxacIbnmRpiMYHAA--.24623S3; Mon, 12 Jan 2026 15:09:15 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJBxacERnmRpEqgaAA--.41358S7; Mon, 12 Jan 2026 15:09:14 +0800 (CST) From: Bibo Mao To: qemu-devel@nongnu.org Cc: Song Gao Subject: [PULL 05/10] hw/loongarch/virt: Add field gpex in LoongArchVirtMachineState Date: Mon, 12 Jan 2026 15:08:59 +0800 Message-Id: <20260112070904.3230440-6-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260112070904.3230440-1-maobibo@loongson.cn> References: <20260112070904.3230440-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJBxacERnmRpEqgaAA--.41358S7 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1768201775595158500 Content-Type: text/plain; charset="utf-8" Add field gpex in structure LoongArchVirtMachineState, type of field gpex is structure GPEXConfig and it is to record configuration information about GPEX host bridge. And remove field pci_bus in structure LoongArchVirtMachineState since the information is in field gpex already. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- hw/loongarch/virt-acpi-build.c | 13 +------------ hw/loongarch/virt.c | 9 ++++++++- include/hw/loongarch/virt.h | 3 ++- 3 files changed, 11 insertions(+), 14 deletions(-) diff --git a/hw/loongarch/virt-acpi-build.c b/hw/loongarch/virt-acpi-build.c index 8ff9ebdcd9..012e0c23b8 100644 --- a/hw/loongarch/virt-acpi-build.c +++ b/hw/loongarch/virt-acpi-build.c @@ -383,18 +383,7 @@ build_la_ged_aml(Aml *dsdt, MachineState *machine) =20 static void build_pci_device_aml(Aml *scope, LoongArchVirtMachineState *lv= ms) { - struct GPEXConfig cfg =3D { - .mmio64.base =3D VIRT_PCI_MEM_BASE, - .mmio64.size =3D VIRT_PCI_MEM_SIZE, - .pio.base =3D VIRT_PCI_IO_BASE, - .pio.size =3D VIRT_PCI_IO_SIZE, - .ecam.base =3D VIRT_PCI_CFG_BASE, - .ecam.size =3D VIRT_PCI_CFG_SIZE, - .irq =3D VIRT_GSI_BASE + VIRT_DEVICE_IRQS, - .bus =3D lvms->pci_bus, - }; - - acpi_dsdt_add_gpex(scope, &cfg); + acpi_dsdt_add_gpex(scope, &lvms->gpex); } =20 static void build_flash_aml(Aml *scope, LoongArchVirtMachineState *lvms) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 9d189e5a77..b00393565f 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -298,7 +298,14 @@ static void virt_devices_init(DeviceState *pch_pic, d =3D SYS_BUS_DEVICE(gpex_dev); sysbus_realize_and_unref(d, &error_fatal); pci_bus =3D PCI_HOST_BRIDGE(gpex_dev)->bus; - lvms->pci_bus =3D pci_bus; + lvms->gpex.mmio64.base =3D VIRT_PCI_MEM_BASE; + lvms->gpex.mmio64.size =3D VIRT_PCI_MEM_SIZE; + lvms->gpex.pio.base =3D VIRT_PCI_IO_BASE; + lvms->gpex.pio.size =3D VIRT_PCI_IO_SIZE; + lvms->gpex.ecam.base =3D VIRT_PCI_CFG_BASE; + lvms->gpex.ecam.size =3D VIRT_PCI_CFG_SIZE; + lvms->gpex.irq =3D VIRT_GSI_BASE + VIRT_DEVICE_IRQS; + lvms->gpex.bus =3D pci_bus; =20 /* Map only part size_ecam bytes of ECAM space */ ecam_alias =3D g_new0(MemoryRegion, 1); diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h index d7e94428f0..cdc03f4c87 100644 --- a/include/hw/loongarch/virt.h +++ b/include/hw/loongarch/virt.h @@ -12,6 +12,7 @@ #include "qemu/queue.h" #include "hw/block/flash.h" #include "hw/loongarch/boot.h" +#include "hw/pci-host/gpex.h" =20 /* IOCSR region */ #define VERSION_REG 0x0 @@ -112,7 +113,6 @@ struct LoongArchVirtMachineState { DeviceState *acpi_ged; int fdt_size; DeviceState *platform_bus_dev; - PCIBus *pci_bus; PFlashCFI01 *flash[2]; MemoryRegion system_iocsr; MemoryRegion iocsr_mem; @@ -126,6 +126,7 @@ struct LoongArchVirtMachineState { uint64_t misc_status; DeviceState *dintc; hwaddr ram_end; + struct GPEXConfig gpex; }; =20 #define TYPE_LOONGARCH_VIRT_MACHINE MACHINE_TYPE_NAME("virt") --=20 2.52.0 From nobody Tue Feb 10 00:02:04 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1768201806328175.30554169210814; Sun, 11 Jan 2026 23:10:06 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3J-0007sk-6w; Mon, 12 Jan 2026 02:09:25 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vfC3F-0007p1-Vo for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:21 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3E-0004qY-13 for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:21 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8AxCMIdnmRpicYHAA--.12538S3; Mon, 12 Jan 2026 15:09:17 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJCx98AdnmRpJKgaAA--.41401S2; Mon, 12 Jan 2026 15:09:17 +0800 (CST) From: Bibo Mao To: qemu-devel@nongnu.org Cc: Song Gao Subject: [PULL 06/10] hw/loongarch/virt: Get irq number from gpex config info Date: Mon, 12 Jan 2026 15:09:00 +0800 Message-Id: <20260112070904.3230440-7-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260112070904.3230440-1-maobibo@loongson.cn> References: <20260112070904.3230440-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJCx98AdnmRpJKgaAA--.41401S2 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1768201809527158500 Content-Type: text/plain; charset="utf-8" The base irq number of GPEX PCIE host bridge can comes from gpex::irq. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- hw/loongarch/virt.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index b00393565f..8a1842c492 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -292,7 +292,7 @@ static void virt_devices_init(DeviceState *pch_pic, PCIBus *pci_bus; MemoryRegion *ecam_alias, *ecam_reg, *pio_alias, *pio_reg; MemoryRegion *mmio_alias, *mmio_reg; - int i; + int i, irq; =20 gpex_dev =3D qdev_new(TYPE_GPEX_HOST); d =3D SYS_BUS_DEVICE(gpex_dev); @@ -332,9 +332,9 @@ static void virt_devices_init(DeviceState *pch_pic, pio_alias); =20 for (i =3D 0; i < PCI_NUM_PINS; i++) { - sysbus_connect_irq(d, i, - qdev_get_gpio_in(pch_pic, 16 + i)); - gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i); + irq =3D lvms->gpex.irq + i - VIRT_GSI_BASE; + sysbus_connect_irq(d, i, qdev_get_gpio_in(pch_pic, irq)); + gpex_set_irq_num(GPEX_HOST(gpex_dev), i, irq); } =20 /* @@ -343,7 +343,7 @@ static void virt_devices_init(DeviceState *pch_pic, */ for (i =3D VIRT_UART_COUNT; i-- > 0;) { hwaddr base =3D VIRT_UART_BASE + i * VIRT_UART_SIZE; - int irq =3D VIRT_UART_IRQ + i - VIRT_GSI_BASE; + irq =3D VIRT_UART_IRQ + i - VIRT_GSI_BASE; serial_mm_init(get_system_memory(), base, 0, qdev_get_gpio_in(pch_pic, irq), 115200, serial_hd(i), DEVICE_LITTLE_ENDIAN); --=20 2.52.0 From nobody Tue Feb 10 00:02:04 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1768201875861240.82863560720136; Sun, 11 Jan 2026 23:11:15 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3U-00083Z-Iq; Mon, 12 Jan 2026 02:09:36 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vfC3S-00082a-VM for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:34 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3R-0004rW-02 for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:34 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8Axy8IenmRpisYHAA--.24556S3; Mon, 12 Jan 2026 15:09:18 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJCx98AdnmRpJKgaAA--.41401S3; Mon, 12 Jan 2026 15:09:17 +0800 (CST) From: Bibo Mao To: qemu-devel@nongnu.org Cc: Song Gao Subject: [PULL 07/10] hw/loongarch/virt: Get PCI info from gpex config info Date: Mon, 12 Jan 2026 15:09:01 +0800 Message-Id: <20260112070904.3230440-8-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260112070904.3230440-1-maobibo@loongson.cn> References: <20260112070904.3230440-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJCx98AdnmRpJKgaAA--.41401S3 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1768201876800158500 Content-Type: text/plain; charset="utf-8" PCIE host bridge configuration information such as MMIO/Conf/IO base and size can come from gpex config info. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- hw/loongarch/virt-acpi-build.c | 4 ++-- hw/loongarch/virt-fdt-build.c | 14 +++++++------- hw/loongarch/virt.c | 16 +++++++++------- 3 files changed, 18 insertions(+), 16 deletions(-) diff --git a/hw/loongarch/virt-acpi-build.c b/hw/loongarch/virt-acpi-build.c index 012e0c23b8..54ac94e17d 100644 --- a/hw/loongarch/virt-acpi-build.c +++ b/hw/loongarch/virt-acpi-build.c @@ -565,8 +565,8 @@ static void acpi_build(AcpiBuildTables *tables, Machine= State *machine) acpi_add_table(table_offsets, tables_blob); { AcpiMcfgInfo mcfg =3D { - .base =3D VIRT_PCI_CFG_BASE, - .size =3D VIRT_PCI_CFG_SIZE, + .base =3D lvms->gpex.ecam.base, + .size =3D lvms->gpex.ecam.size, }; build_mcfg(tables_blob, tables->linker, &mcfg, lvms->oem_id, lvms->oem_table_id); diff --git a/hw/loongarch/virt-fdt-build.c b/hw/loongarch/virt-fdt-build.c index 115080d80e..da73b042ee 100644 --- a/hw/loongarch/virt-fdt-build.c +++ b/hw/loongarch/virt-fdt-build.c @@ -366,12 +366,12 @@ static void fdt_add_pcie_node(const LoongArchVirtMach= ineState *lvms, uint32_t *pch_msi_phandle) { char *nodename; - hwaddr base_mmio =3D VIRT_PCI_MEM_BASE; - hwaddr size_mmio =3D VIRT_PCI_MEM_SIZE; - hwaddr base_pio =3D VIRT_PCI_IO_BASE; - hwaddr size_pio =3D VIRT_PCI_IO_SIZE; - hwaddr base_pcie =3D VIRT_PCI_CFG_BASE; - hwaddr size_pcie =3D VIRT_PCI_CFG_SIZE; + hwaddr base_mmio =3D lvms->gpex.mmio64.base; + hwaddr size_mmio =3D lvms->gpex.mmio64.size; + hwaddr base_pio =3D lvms->gpex.pio.base; + hwaddr size_pio =3D lvms->gpex.pio.size; + hwaddr base_pcie =3D lvms->gpex.ecam.base; + hwaddr size_pcie =3D lvms->gpex.ecam.size; hwaddr base =3D base_pcie; const MachineState *ms =3D MACHINE(lvms); =20 @@ -384,7 +384,7 @@ static void fdt_add_pcie_node(const LoongArchVirtMachin= eState *lvms, qemu_fdt_setprop_cell(ms->fdt, nodename, "#size-cells", 2); qemu_fdt_setprop_cell(ms->fdt, nodename, "linux,pci-domain", 0); qemu_fdt_setprop_cells(ms->fdt, nodename, "bus-range", 0, - PCIE_MMCFG_BUS(VIRT_PCI_CFG_SIZE - 1)); + PCIE_MMCFG_BUS(size_pcie - 1)); qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base_pcie, 2, size_pcie); diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 8a1842c492..203a13a963 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -292,6 +292,7 @@ static void virt_devices_init(DeviceState *pch_pic, PCIBus *pci_bus; MemoryRegion *ecam_alias, *ecam_reg, *pio_alias, *pio_reg; MemoryRegion *mmio_alias, *mmio_reg; + hwaddr mmio_base, mmio_size; int i, irq; =20 gpex_dev =3D qdev_new(TYPE_GPEX_HOST); @@ -306,29 +307,30 @@ static void virt_devices_init(DeviceState *pch_pic, lvms->gpex.ecam.size =3D VIRT_PCI_CFG_SIZE; lvms->gpex.irq =3D VIRT_GSI_BASE + VIRT_DEVICE_IRQS; lvms->gpex.bus =3D pci_bus; + mmio_base =3D lvms->gpex.mmio64.base; + mmio_size =3D lvms->gpex.mmio64.size; =20 /* Map only part size_ecam bytes of ECAM space */ ecam_alias =3D g_new0(MemoryRegion, 1); ecam_reg =3D sysbus_mmio_get_region(d, 0); memory_region_init_alias(ecam_alias, OBJECT(gpex_dev), "pcie-ecam", - ecam_reg, 0, VIRT_PCI_CFG_SIZE); - memory_region_add_subregion(get_system_memory(), VIRT_PCI_CFG_BASE, + ecam_reg, 0, lvms->gpex.ecam.size); + memory_region_add_subregion(get_system_memory(), lvms->gpex.ecam.base, ecam_alias); =20 /* Map PCI mem space */ mmio_alias =3D g_new0(MemoryRegion, 1); mmio_reg =3D sysbus_mmio_get_region(d, 1); memory_region_init_alias(mmio_alias, OBJECT(gpex_dev), "pcie-mmio", - mmio_reg, VIRT_PCI_MEM_BASE, VIRT_PCI_MEM_SIZ= E); - memory_region_add_subregion(get_system_memory(), VIRT_PCI_MEM_BASE, - mmio_alias); + mmio_reg, mmio_base, mmio_size); + memory_region_add_subregion(get_system_memory(), mmio_base, mmio_alias= ); =20 /* Map PCI IO port space. */ pio_alias =3D g_new0(MemoryRegion, 1); pio_reg =3D sysbus_mmio_get_region(d, 2); memory_region_init_alias(pio_alias, OBJECT(gpex_dev), "pcie-io", pio_r= eg, - VIRT_PCI_IO_OFFSET, VIRT_PCI_IO_SIZE); - memory_region_add_subregion(get_system_memory(), VIRT_PCI_IO_BASE, + VIRT_PCI_IO_OFFSET, lvms->gpex.pio.size); + memory_region_add_subregion(get_system_memory(), lvms->gpex.pio.base, pio_alias); =20 for (i =3D 0; i < PCI_NUM_PINS; i++) { --=20 2.52.0 From nobody Tue Feb 10 00:02:04 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1768201931640281.5697594525876; Sun, 11 Jan 2026 23:12:11 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3I-0007sO-Vf; Mon, 12 Jan 2026 02:09:25 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vfC3G-0007qG-OS for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:22 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3E-0004qk-Q2 for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:22 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8BxnsMenmRpi8YHAA--.25274S3; Mon, 12 Jan 2026 15:09:18 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJCx98AdnmRpJKgaAA--.41401S4; Mon, 12 Jan 2026 15:09:18 +0800 (CST) From: Bibo Mao To: qemu-devel@nongnu.org Cc: Song Gao Subject: [PULL 08/10] hw/loongarch/virt: Add property highmem_mmio with virt machine Date: Mon, 12 Jan 2026 15:09:02 +0800 Message-Id: <20260112070904.3230440-9-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260112070904.3230440-1-maobibo@loongson.cn> References: <20260112070904.3230440-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJCx98AdnmRpJKgaAA--.41401S4 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" On LoongArch Virt Machine, MMIO region with GPEX host bridge is 0x40000000 -- 0x7FFFFFFF. The total size is 1G bytes and it is enough for emulated virtio devices basically. However on some conditions such as hostmem is added with virtio-gpu device, the command line is -device virtio-gpu-gl,hostmem=3D4G. The PCIE MMIO region is not enough, 64-bit high MMIO region is required. Here add property highmem_mmio with virt machine, however it brings out incompatible issue. Here the default value is false. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- hw/loongarch/virt.c | 21 +++++++++++++++++++++ include/hw/loongarch/virt.h | 1 + 2 files changed, 22 insertions(+) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 203a13a963..1e29f93a1f 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -89,6 +89,20 @@ static void virt_set_veiointc(Object *obj, Visitor *v, c= onst char *name, visit_type_OnOffAuto(v, name, &lvms->veiointc, errp); } =20 +static bool virt_get_highmem_mmio(Object *obj, Error **errp) +{ + LoongArchVirtMachineState *lvms =3D LOONGARCH_VIRT_MACHINE(obj); + + return lvms->highmem_mmio; +} + +static void virt_set_highmem_mmio(Object *obj, bool value, Error **errp) +{ + LoongArchVirtMachineState *lvms =3D LOONGARCH_VIRT_MACHINE(obj); + + lvms->highmem_mmio =3D value; +} + static PFlashCFI01 *virt_flash_create1(LoongArchVirtMachineState *lvms, const char *name, const char *alias_prop_name) @@ -1380,6 +1394,13 @@ static void virt_class_init(ObjectClass *oc, const v= oid *data) "Override the default value of f= ield OEM Table ID " "in ACPI table header." "The string may be up to 8 bytes= in size"); + + object_class_property_add_bool(oc, "highmem-mmio", + virt_get_highmem_mmio, + virt_set_highmem_mmio); + object_class_property_set_description(oc, "highmem-mmio", + "Set on/off to enable/disable hi= gh " + "memory region for PCI MMIO"); } =20 static const TypeInfo virt_machine_types[] =3D { diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h index cdc03f4c87..d39a9bbf5d 100644 --- a/include/hw/loongarch/virt.h +++ b/include/hw/loongarch/virt.h @@ -127,6 +127,7 @@ struct LoongArchVirtMachineState { DeviceState *dintc; hwaddr ram_end; struct GPEXConfig gpex; + bool highmem_mmio; }; =20 #define TYPE_LOONGARCH_VIRT_MACHINE MACHINE_TYPE_NAME("virt") --=20 2.52.0 From nobody Tue Feb 10 00:02:04 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1768201918725869.2693618860034; Sun, 11 Jan 2026 23:11:58 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3K-0007u0-3v; Mon, 12 Jan 2026 02:09:26 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vfC3I-0007sR-SE for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:24 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3G-0004rD-HS for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:24 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8CxVvAfnmRpjMYHAA--.25590S3; Mon, 12 Jan 2026 15:09:19 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJCx98AdnmRpJKgaAA--.41401S5; Mon, 12 Jan 2026 15:09:18 +0800 (CST) From: Bibo Mao To: qemu-devel@nongnu.org Cc: Song Gao Subject: [PULL 09/10] hw/loongarch/virt: Add high MMIO support with GPEX host Date: Mon, 12 Jan 2026 15:09:03 +0800 Message-Id: <20260112070904.3230440-10-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260112070904.3230440-1-maobibo@loongson.cn> References: <20260112070904.3230440-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJCx98AdnmRpJKgaAA--.41401S5 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1768201921584158500 Content-Type: text/plain; charset="utf-8" With high MMIO supported, its base address comes from high end of physical address space. Also add high MMIO support with GPEX host bridge. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- hw/loongarch/virt-fdt-build.c | 33 +++++++++++---- hw/loongarch/virt.c | 76 ++++++++++++++++++++++++++++++++++- 2 files changed, 100 insertions(+), 9 deletions(-) diff --git a/hw/loongarch/virt-fdt-build.c b/hw/loongarch/virt-fdt-build.c index da73b042ee..4afefc8266 100644 --- a/hw/loongarch/virt-fdt-build.c +++ b/hw/loongarch/virt-fdt-build.c @@ -366,8 +366,8 @@ static void fdt_add_pcie_node(const LoongArchVirtMachin= eState *lvms, uint32_t *pch_msi_phandle) { char *nodename; - hwaddr base_mmio =3D lvms->gpex.mmio64.base; - hwaddr size_mmio =3D lvms->gpex.mmio64.size; + hwaddr base_mmio, base_mmio_high; + hwaddr size_mmio, size_mmio_high; hwaddr base_pio =3D lvms->gpex.pio.base; hwaddr size_pio =3D lvms->gpex.pio.size; hwaddr base_pcie =3D lvms->gpex.ecam.base; @@ -388,11 +388,30 @@ static void fdt_add_pcie_node(const LoongArchVirtMach= ineState *lvms, qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base_pcie, 2, size_pcie); - qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "ranges", - 1, FDT_PCI_RANGE_IOPORT, 2, VIRT_PCI_IO_O= FFSET, - 2, base_pio, 2, size_pio, - 1, FDT_PCI_RANGE_MMIO, 2, base_mmio, - 2, base_mmio, 2, size_mmio); + if (lvms->highmem_mmio) { + base_mmio_high =3D lvms->gpex.mmio64.base; + size_mmio_high =3D lvms->gpex.mmio64.size; + base_mmio =3D lvms->gpex.mmio32.base; + size_mmio =3D lvms->gpex.mmio32.size; + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "ranges", + 1, FDT_PCI_RANGE_IOPORT, + 2, VIRT_PCI_IO_OFFSET, + 2, base_pio, 2, size_pio, + 1, FDT_PCI_RANGE_MMIO, 2, base_mmio, + 2, base_mmio, 2, size_mmio, + 1, FDT_PCI_RANGE_MMIO_64BIT, + 2, base_mmio_high, + 2, base_mmio_high, 2, size_mmio_high); + } else { + base_mmio =3D lvms->gpex.mmio64.base; + size_mmio =3D lvms->gpex.mmio64.size; + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "ranges", + 1, FDT_PCI_RANGE_IOPORT, + 2, VIRT_PCI_IO_OFFSET, + 2, base_pio, 2, size_pio, + 1, FDT_PCI_RANGE_MMIO, 2, base_mmio, + 2, base_mmio, 2, size_mmio); + } qemu_fdt_setprop_cells(ms->fdt, nodename, "msi-map", 0, *pch_msi_phandle, 0, 0x10000); fdt_add_pcie_irq_map_node(lvms, nodename, pch_pic_phandle); diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 1e29f93a1f..78e9dd66d1 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -72,6 +72,9 @@ static void virt_set_dmsi(Object *obj, Visitor *v, const = char *name, } } =20 +#define DEFAULT_HIGH_PCIE_MMIO_SIZE_GB 64 +#define DEFAULT_HIGH_PCIE_MMIO_SIZE (DEFAULT_HIGH_PCIE_MMIO_SIZE_GB * GiB) + static void virt_get_veiointc(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { @@ -297,6 +300,54 @@ static DeviceState *create_platform_bus(DeviceState *p= ch_pic) return dev; } =20 +static void virt_set_highmmio(LoongArchVirtMachineState *lvms) +{ + LoongArchCPU *cpu =3D LOONGARCH_CPU(first_cpu); + CPULoongArchState *env =3D &cpu->env; + struct GPEXConfig *gpex; + int vaddr_bits, phys_bits; + + vaddr_bits =3D FIELD_EX32(env->cpucfg[1], CPUCFG1, VALEN) + 1; + phys_bits =3D FIELD_EX32(env->cpucfg[1], CPUCFG1, PALEN) + 1; + if (phys_bits <=3D 32) { + return; + } + + gpex =3D &lvms->gpex; + if (gpex->mmio64.size =3D=3D 0) { + gpex->mmio64.size =3D DEFAULT_HIGH_PCIE_MMIO_SIZE; + } + + /* + * UEFI BIOS uses 1:1 identified mapping PCI high mmio space, and + * virtual address space is low end through PGDL page table. + * + * Max physical address bit cannot exceed vaddr_bits - 1 + */ + if (phys_bits > (vaddr_bits - 1)) { + phys_bits =3D vaddr_bits - 1; + } + + /* + * GPEX base address starts from end of physical address + */ + gpex->mmio64.base =3D BIT_ULL(phys_bits) - BIT_ULL(phys_bits - 3); + if (gpex->mmio64.base + gpex->mmio64.size > BIT_ULL(phys_bits)) { + error_report("GPEX region base %" PRIu64 " size %" PRIu64 + " exceeds %d physical bits", + gpex->mmio64.base, gpex->mmio64.size, + phys_bits); + exit(EXIT_FAILURE); + } + + if (lvms->ram_end > gpex->mmio64.base) { + error_report("DRAM end address %" PRIu64 + " exceeds GPEX region base %" PRIu64, + lvms->ram_end, gpex->mmio64.base); + exit(EXIT_FAILURE); + } +} + static void virt_devices_init(DeviceState *pch_pic, LoongArchVirtMachineState *lvms) { @@ -313,8 +364,6 @@ static void virt_devices_init(DeviceState *pch_pic, d =3D SYS_BUS_DEVICE(gpex_dev); sysbus_realize_and_unref(d, &error_fatal); pci_bus =3D PCI_HOST_BRIDGE(gpex_dev)->bus; - lvms->gpex.mmio64.base =3D VIRT_PCI_MEM_BASE; - lvms->gpex.mmio64.size =3D VIRT_PCI_MEM_SIZE; lvms->gpex.pio.base =3D VIRT_PCI_IO_BASE; lvms->gpex.pio.size =3D VIRT_PCI_IO_SIZE; lvms->gpex.ecam.base =3D VIRT_PCI_CFG_BASE; @@ -323,6 +372,18 @@ static void virt_devices_init(DeviceState *pch_pic, lvms->gpex.bus =3D pci_bus; mmio_base =3D lvms->gpex.mmio64.base; mmio_size =3D lvms->gpex.mmio64.size; + if (lvms->highmem_mmio) { + virt_set_highmmio(lvms); + lvms->gpex.mmio32.base =3D VIRT_PCI_MEM_BASE; + lvms->gpex.mmio32.size =3D VIRT_PCI_MEM_SIZE; + mmio_base =3D lvms->gpex.mmio32.base; + mmio_size =3D lvms->gpex.mmio32.size; + } else { + lvms->gpex.mmio64.base =3D VIRT_PCI_MEM_BASE; + lvms->gpex.mmio64.size =3D VIRT_PCI_MEM_SIZE; + mmio_base =3D lvms->gpex.mmio64.base; + mmio_size =3D lvms->gpex.mmio64.size; + } =20 /* Map only part size_ecam bytes of ECAM space */ ecam_alias =3D g_new0(MemoryRegion, 1); @@ -338,6 +399,17 @@ static void virt_devices_init(DeviceState *pch_pic, memory_region_init_alias(mmio_alias, OBJECT(gpex_dev), "pcie-mmio", mmio_reg, mmio_base, mmio_size); memory_region_add_subregion(get_system_memory(), mmio_base, mmio_alias= ); + if (lvms->highmem_mmio) { + /* Map high MMIO space */ + mmio_alias =3D g_new0(MemoryRegion, 1); + mmio_base =3D lvms->gpex.mmio64.base; + mmio_size =3D lvms->gpex.mmio64.size; + memory_region_init_alias(mmio_alias, OBJECT(gpex_dev), + "pcie-mmio-high", mmio_reg, + mmio_base, mmio_size); + memory_region_add_subregion(get_system_memory(), mmio_base, + mmio_alias); + } =20 /* Map PCI IO port space. */ pio_alias =3D g_new0(MemoryRegion, 1); --=20 2.52.0 From nobody Tue Feb 10 00:02:04 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1768201779184772.9033270131813; Sun, 11 Jan 2026 23:09:39 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3L-0007uh-MR; Mon, 12 Jan 2026 02:09:27 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vfC3I-0007rn-DG for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:24 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vfC3G-0004rP-I3 for qemu-devel@nongnu.org; Mon, 12 Jan 2026 02:09:24 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxvsMfnmRpjcYHAA--.25366S3; Mon, 12 Jan 2026 15:09:19 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJCx98AdnmRpJKgaAA--.41401S6; Mon, 12 Jan 2026 15:09:19 +0800 (CST) From: Bibo Mao To: qemu-devel@nongnu.org Cc: Song Gao Subject: [PULL 10/10] hw/loongarch/virt: Add property highmem-mmio-size with virt machine Date: Mon, 12 Jan 2026 15:09:04 +0800 Message-Id: <20260112070904.3230440-11-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260112070904.3230440-1-maobibo@loongson.cn> References: <20260112070904.3230440-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJCx98AdnmRpJKgaAA--.41401S6 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1768201780680158500 Content-Type: text/plain; charset="utf-8" The default high mmio size of GPEX PCIE host controller is 64G bytes on virt machine. If it does not meet requirements with some pass-throught HW devices in future, it can be adjust dynamically, here adds property highmem-mmio-size to set high mmio size. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- hw/loongarch/virt.c | 45 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 78e9dd66d1..2580ab37b6 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -7,6 +7,7 @@ #include "qemu/osdep.h" #include "qemu/units.h" #include "qemu/datadir.h" +#include "qemu/cutils.h" #include "qapi/error.h" #include "exec/target_page.h" #include "hw/core/boards.h" @@ -106,6 +107,43 @@ static void virt_set_highmem_mmio(Object *obj, bool va= lue, Error **errp) lvms->highmem_mmio =3D value; } =20 +static void virt_get_highmem_mmio_size(Object *obj, Visitor *v, + const char *name, void *opaque, + Error **errp) +{ + LoongArchVirtMachineState *lvms =3D LOONGARCH_VIRT_MACHINE(obj); + uint64_t size =3D lvms->gpex.mmio64.size; + + visit_type_size(v, name, &size, errp); +} + +static void virt_set_highmem_mmio_size(Object *obj, Visitor *v, + const char *name, void *opaque, + Error **errp) +{ + LoongArchVirtMachineState *lvms =3D LOONGARCH_VIRT_MACHINE(obj); + uint64_t size; + + if (!visit_type_size(v, name, &size, errp)) { + return; + } + + if (!is_power_of_2(size)) { + error_setg(errp, "highmem-mmio-size is not a power of 2"); + return; + } + + if (size < DEFAULT_HIGH_PCIE_MMIO_SIZE) { + char *sz =3D size_to_str(DEFAULT_HIGH_PCIE_MMIO_SIZE); + error_setg(errp, "highmem-mmio-size cannot be set to a lower value= " + "than the default (%s)", sz); + g_free(sz); + return; + } + + lvms->gpex.mmio64.size =3D size; +} + static PFlashCFI01 *virt_flash_create1(LoongArchVirtMachineState *lvms, const char *name, const char *alias_prop_name) @@ -1473,6 +1511,13 @@ static void virt_class_init(ObjectClass *oc, const v= oid *data) object_class_property_set_description(oc, "highmem-mmio", "Set on/off to enable/disable hi= gh " "memory region for PCI MMIO"); + object_class_property_add(oc, "highmem-mmio-size", "size", + virt_get_highmem_mmio_size, + virt_set_highmem_mmio_size, + NULL, NULL); + object_class_property_set_description(oc, "highmem-mmio-size", + "Set the high memory region size= " + "for PCI MMIO"); } =20 static const TypeInfo virt_machine_types[] =3D { --=20 2.52.0