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Tsirkin" Subject: [PATCH v7 07/36] hw/pci/pci: Add optional supports_address_space() callback Date: Sun, 11 Jan 2026 19:52:53 +0000 Message-ID: <20260111195508.106943-8-skolothumtho@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260111195508.106943-1-skolothumtho@nvidia.com> References: <20260111195508.106943-1-skolothumtho@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636A:EE_|DS7PR12MB5957:EE_ X-MS-Office365-Filtering-Correlation-Id: 340d758a-1396-4a21-505f-08de514b8122 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|376014|7416014|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?7jtTCVJorQ8d0ACEpda3X/iAgZdPiUmSxeZJlvoYsFLRra/j72nj0AtPLy3T?= =?us-ascii?Q?pKbi+v3xVP4FUOScadkpcHY+srukZfJuF+eRdhomSLCfkCUgfVon4bGhgWnl?= =?us-ascii?Q?tjbDOmuXQIXRMz5o4UzGAixGv7xXtz0DUKtR6LiHolPqWIGLSXvKle3MYRog?= =?us-ascii?Q?vWw4D48Dv+/IYsiaPkx3GkQs74diTYDlsUViEHR31p/tRZmnZIiG2G4aJC1m?= =?us-ascii?Q?by5RWf2pxV5TW34QpiLzgp+PHih02685/MERtKXJxURRnTUDQj6RJ3KpG1wa?= =?us-ascii?Q?xIIJTLjB21UTj8ikiLbvsTjtXSKKeO+b9SI9/GJy7XPEye45WUEmRvINAMl5?= =?us-ascii?Q?fWNKcX4bLadIyF23jFh6MO2SQEQGAEF3Yioe+lk9Ui0DKypzGm803Vn1HP1X?= =?us-ascii?Q?sB8221RqqLcszzvXfMzTzIOCycEznazOzy2l9f9BEYba1suUGE3qFvlF2pDt?= =?us-ascii?Q?H5tBByWnx+Qb7+mnNlJfhJA5VTki9PPO1bHH9EvzuEHj/3aNrDjYt7PvKzWr?= =?us-ascii?Q?+/ssdpawz7wum0jfGJL+4DnC9kfTo/MG/SS3bRkamnc30C2oNJjCJSCL/j+F?= =?us-ascii?Q?S9grQTEaHY2GIfG59E89f2r3gIXR0AbcQG7bPuYrx6Ps+TavTMzGxg7ZdJXq?= =?us-ascii?Q?Wt0njZxOxpxoqK6DHyt42KB6EMxfc8VurUYu+arW8N2fcWCgXNyMZqsC8eum?= =?us-ascii?Q?jLeUhMRHb9iN0ZKiRPI0Jaa/zEVy/T/4h6gWYwI2KNxG3PtxsyYzW7EvnDvf?= =?us-ascii?Q?8QiJVwIcnHTjEFi/bF+YLEeReuFn1wh4J1Vbzw1twNVWGbgtCYpLtFOBZOdH?= =?us-ascii?Q?piFQ3M0CkuWdWWsGgdF9E2YMoo2sfQ4i7qQnXptR17MOSF61K9+T8ChbS1ox?= =?us-ascii?Q?3KucKEpLMtnc1qIOHAKXGI9Nx+WChmOm4uBz8kCt6v0IkLMPpJK8MBEwQwVG?= =?us-ascii?Q?ku5avjoAhbdYCEaYvzm7eQAtai3MaX50oH/hANkBl9XkZ/IhcpR0lcncnMTX?= =?us-ascii?Q?ZgrejsFygRq+rQ8DMiDykNlhGmO7meKS8grxIxsVaZ8xEcDkkgYOhMeNWOTR?= =?us-ascii?Q?PeuXRSVE0uP4iZI/mVwbLAhOhZ0rknkYSX6zcRHuHBF3+E+N5uQv7LGAFGJ1?= =?us-ascii?Q?pm48OutbYEodcnsK62/rXgs0K+DX9bAwBqP4J/FT25XcVKTZd17wgxGoapKA?= =?us-ascii?Q?24/2VmGRpUaX+ZL1Pwj7rbe5zIoZHLRuWfobBXPAqM9aB8qdO6Bz40YS+caU?= =?us-ascii?Q?iX1876n6sJMmY9NEbotUlG5XrzfxBNPH0QGoRhQgvAn8UtMFbcmhAMFTVij+?= =?us-ascii?Q?ADjp8qLCxJj6bfbMcqCxEflVrE9JOepEsJpF986wwwar1CCcc5UM9tzq46de?= =?us-ascii?Q?WvikltG7mNA2hDNcHSrtW6cVY7Hs4lfHF3H4nGOUCxmjuv8LkruBHR6JsciS?= =?us-ascii?Q?jn2isnXxKI1xq4T2r1yv5FtNK7JatQHaWEf7a7ltAQwKRmubCy1GImkJWzZD?= =?us-ascii?Q?84BEmvuyW6/14Sfig7zuU99D5wwWJntDMcqWlcq7z+NEoRL8YdzrSn8OTBBv?= =?us-ascii?Q?tyLL0GYKodvh9GZ3P/o=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(82310400026)(376014)(7416014)(36860700013)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Jan 2026 19:56:26.2673 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 340d758a-1396-4a21-505f-08de514b8122 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636A.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5957 Received-SPF: permerror client-ip=2a01:111:f403:c10d::1; envelope-from=skolothumtho@nvidia.com; helo=SN4PR2101CU001.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FORGED_SPF_HELO=0.001, SPF_HELO_PASS=-0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @Nvidia.com) X-ZM-MESSAGEID: 1768161426391158500 Content-Type: text/plain; charset="utf-8" Introduce an optional supports_address_space() callback in PCIIOMMUOps to allow a vIOMMU implementation to reject devices that should not be attached to it. Currently, get_address_space() is the first and mandatory callback into the vIOMMU layer, which always returns an address space. For certain setups, su= ch as hardware accelerated vIOMMUs (e.g. ARM SMMUv3 with accel=3Don), attaching emulated endpoint devices is undesirable as it may impact the behavior or performance of VFIO passthrough devices, for example, by triggering unnecessary invalidations on the host IOMMU. The new callback allows a vIOMMU to check and reject unsupported devices early during PCI device registration. Cc: Michael S. Tsirkin Reviewed-by: Jonathan Cameron Reviewed-by: Eric Auger Reviewed-by: Nicolin Chen Signed-off-by: Shameer Kolothum --- hw/pci/pci.c | 20 ++++++++++++++++++++ include/hw/pci/pci.h | 19 +++++++++++++++++++ 2 files changed, 39 insertions(+) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index a852694cc9..95b29a690e 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -135,6 +135,21 @@ static void pci_set_master(PCIDevice *d, bool enable) d->is_master =3D enable; /* cache the status */ } =20 +static bool +pci_device_supports_iommu_address_space(PCIDevice *dev, Error **errp) +{ + PCIBus *bus; + PCIBus *iommu_bus; + int devfn; + + pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn); + if (iommu_bus && iommu_bus->iommu_ops->supports_address_space) { + return iommu_bus->iommu_ops->supports_address_space(bus, + iommu_bus->iommu_opaque, devfn, errp); + } + return true; +} + static void pci_init_bus_master(PCIDevice *pci_dev) { AddressSpace *dma_as =3D pci_device_iommu_address_space(pci_dev); @@ -1424,6 +1439,11 @@ static PCIDevice *do_pci_register_device(PCIDevice *= pci_dev, pci_dev->config_write =3D config_write; bus->devices[devfn] =3D pci_dev; pci_dev->version_id =3D 2; /* Current pci device vmstate version */ + if (!pci_device_supports_iommu_address_space(pci_dev, errp)) { + do_pci_unregister_device(pci_dev); + bus->devices[devfn] =3D NULL; + return NULL; + } if (phase_check(PHASE_MACHINE_READY)) { pci_init_bus_master(pci_dev); } diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 868817cc05..efe9547185 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -417,6 +417,25 @@ typedef struct IOMMUPRINotifier { * framework for a set of devices on a PCI bus. */ typedef struct PCIIOMMUOps { + /** + * @supports_address_space: Optional pre-check to determine whether a = PCI + * device can be associated with an IOMMU. If this callback returns tr= ue, + * the IOMMU accepts the device association and get_address_space() ca= n be + * called to obtain the address_space to be used. + * + * @bus: the #PCIBus being accessed. + * + * @opaque: the data passed to pci_setup_iommu(). + * + * @devfn: device and function number. + * + * @errp: pass an Error out only when return false + * + * Returns: true if the device can be associated with an IOMMU, false + * otherwise with errp set. + */ + bool (*supports_address_space)(PCIBus *bus, void *opaque, int devfn, + Error **errp); /** * @get_address_space: get the address space for a set of devices * on a PCI bus. --=20 2.43.0