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charset="utf-8" My attempt at implementing HOST_DATA blits resulted in a lot of duplicated logic (pointed out by BALATON). This separates the src and dst blit configuration from the actual mechanics of the blit. ati_2d_blt accepts an ATIBlitSrc and ATIBlitDst. What remains in ati_2d_blt= is the logic for writing to VRAM both in the pixman and fallback cases. ati_2d_blt_from_memory becomes the public interface for memory-based blits. All existing calls to ati_2d_blt are replaced with it. It is responsible for setting up the src and dst for memory blits and then calling the blitter. It could be that the setup_2d_blt_src and/or setup_2d_blt_dst end up inlined here also but for the time being keeping that separation has been helpful. I think the differences will become much more clear with the HOST_DATA implementation. Without getting too much into HOST_DATA implementation its blits work differently. They progressively flush an accumulator and do color expansion instead of blitting an entire rectangular region. This refactor will allow the future HOST_DATA implementation to flush and expand and then pass the resulting bits along in the src to ati_2d_blt. ati_2d_blt doesn't need to care about the actual source. I realize this is a large change. If this looks like a good direction my pl= an would be to present this in either a standalone series or part of the existing HOST_DATA series. Either way this would obviously be some work so = I'm presenting the final result here as an RFC first. Signed-off-by: Chad Jablonski --- hw/display/ati.c | 8 +- hw/display/ati_2d.c | 310 +++++++++++++++++++++++++----------------- hw/display/ati_int.h | 2 +- hw/display/ati_regs.h | 1 + 4 files changed, 189 insertions(+), 132 deletions(-) diff --git a/hw/display/ati.c b/hw/display/ati.c index e9c3ad2cd1..8f2f9cba95 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -805,7 +805,7 @@ static void ati_mm_write(void *opaque, hwaddr addr, break; case DST_WIDTH: s->regs.dst_width =3D data & 0x3fff; - ati_2d_blt(s); + ati_2d_blt_from_memory(s); break; case DST_HEIGHT: s->regs.dst_height =3D data & 0x3fff; @@ -855,7 +855,7 @@ static void ati_mm_write(void *opaque, hwaddr addr, case DST_HEIGHT_WIDTH: s->regs.dst_width =3D data & 0x3fff; s->regs.dst_height =3D (data >> 16) & 0x3fff; - ati_2d_blt(s); + ati_2d_blt_from_memory(s); break; case DP_GUI_MASTER_CNTL: s->regs.dp_gui_master_cntl =3D data & 0xf800000f; @@ -866,7 +866,7 @@ static void ati_mm_write(void *opaque, hwaddr addr, case DST_WIDTH_X: s->regs.dst_x =3D data & 0x3fff; s->regs.dst_width =3D (data >> 16) & 0x3fff; - ati_2d_blt(s); + ati_2d_blt_from_memory(s); break; case SRC_X_Y: s->regs.src_y =3D data & 0x3fff; @@ -879,7 +879,7 @@ static void ati_mm_write(void *opaque, hwaddr addr, case DST_WIDTH_HEIGHT: s->regs.dst_height =3D data & 0x3fff; s->regs.dst_width =3D (data >> 16) & 0x3fff; - ati_2d_blt(s); + ati_2d_blt_from_memory(s); break; case DST_HEIGHT_Y: s->regs.dst_y =3D data & 0x3fff; diff --git a/hw/display/ati_2d.c b/hw/display/ati_2d.c index 309bb5ccb6..1296bf822e 100644 --- a/hw/display/ati_2d.c +++ b/hw/display/ati_2d.c @@ -13,6 +13,7 @@ #include "qemu/log.h" #include "ui/pixel_ops.h" #include "ui/console.h" +#include "ui/rect.h" =20 /* * NOTE: @@ -24,6 +25,24 @@ * possible. */ =20 +typedef struct { + int x; + int y; + int stride; + bool valid; + uint8_t *bits; +} ATIBlitSrc; + +typedef struct { + QemuRect rect; + int bpp; + int stride; + bool top_to_bottom; + bool left_to_right; + bool valid; + uint8_t *bits; +} ATIBlitDst; + static int ati_bpp_from_datatype(ATIVGAState *s) { switch (s->regs.dp_datatype & 0xf) { @@ -45,107 +64,152 @@ static int ati_bpp_from_datatype(ATIVGAState *s) =20 #define DEFAULT_CNTL (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_CN= TL) =20 -void ati_2d_blt(ATIVGAState *s) +static ATIBlitDst setup_2d_blt_dst(ATIVGAState *s) { - /* FIXME it is probably more complex than this and may need to be */ - /* rewritten but for now as a start just to get some output: */ - DisplaySurface *ds =3D qemu_console_surface(s->vga.con); - DPRINTF("%p %u ds: %p %d %d rop: %x\n", s->vga.vram_ptr, - s->vga.vbe_start_addr, surface_data(ds), surface_stride(ds), - surface_bits_per_pixel(ds), - (s->regs.dp_mix & GMC_ROP3_MASK) >> 16); - unsigned dst_x =3D (s->regs.dp_cntl & DST_X_LEFT_TO_RIGHT ? - s->regs.dst_x : s->regs.dst_x + 1 - s->regs.dst_widt= h); - unsigned dst_y =3D (s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM ? - s->regs.dst_y : s->regs.dst_y + 1 - s->regs.dst_heig= ht); - int bpp =3D ati_bpp_from_datatype(s); - if (!bpp) { + ATIBlitDst dst =3D { + .valid =3D false, + .bpp =3D ati_bpp_from_datatype(s), + .stride =3D DEFAULT_CNTL ? s->regs.dst_pitch : s->regs.default_pit= ch, + .left_to_right =3D s->regs.dp_cntl & DST_X_LEFT_TO_RIGHT, + .top_to_bottom =3D s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM, + .bits =3D s->vga.vram_ptr + (DEFAULT_CNTL ? + s->regs.dst_offset : s->regs.default_offset), + }; + uint8_t *end =3D s->vga.vram_ptr + s->vga.vram_size; + unsigned dst_x =3D (dst.left_to_right ? + s->regs.dst_x : s->regs.dst_x + 1 - s->regs.dst_width= ); + unsigned dst_y =3D (dst.top_to_bottom ? + s->regs.dst_y : s->regs.dst_y + 1 - s->regs.dst_heigh= t); + qemu_rect_init(&dst.rect, dst_x, dst_y, + s->regs.dst_width, s->regs.dst_height); + + if (!dst.bpp) { qemu_log_mask(LOG_GUEST_ERROR, "Invalid bpp\n"); - return; + return dst; } - int dst_stride =3D DEFAULT_CNTL ? s->regs.dst_pitch : s->regs.default_= pitch; - if (!dst_stride) { + if (!dst.stride) { qemu_log_mask(LOG_GUEST_ERROR, "Zero dest pitch\n"); - return; + return dst; } - uint8_t *dst_bits =3D s->vga.vram_ptr + (DEFAULT_CNTL ? - s->regs.dst_offset : s->regs.default_offset); - if (s->dev_id =3D=3D PCI_DEVICE_ID_ATI_RAGE128_PF) { - dst_bits +=3D s->regs.crtc_offset & 0x07ffffff; - dst_stride *=3D bpp; + dst.bits +=3D s->regs.crtc_offset & 0x07ffffff; + dst.stride *=3D dst.bpp; + } + if (dst.rect.x > 0x3fff || dst.rect.y > 0x3fff || dst.bits >=3D end + || dst.bits + dst.rect.x + + (dst.rect.y + dst.rect.height) * dst.stride >=3D end) { + qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n"); + return dst; } + + dst.valid =3D true; + + return dst; +} + +static ATIBlitSrc setup_2d_blt_src(ATIVGAState *s, const ATIBlitDst *dst) +{ + ATIBlitSrc src =3D { + .valid =3D false, + .x =3D (dst->left_to_right ? + s->regs.src_x : s->regs.src_x + 1 - dst->rect.width), + .y =3D (dst->top_to_bottom ? + s->regs.src_y : s->regs.src_y + 1 - dst->rect.height), + .stride =3D DEFAULT_CNTL ? s->regs.src_pitch : s->regs.default_pit= ch, + .bits =3D s->vga.vram_ptr + (DEFAULT_CNTL ? + s->regs.src_offset : s->regs.default_offset), + }; uint8_t *end =3D s->vga.vram_ptr + s->vga.vram_size; - if (dst_x > 0x3fff || dst_y > 0x3fff || dst_bits >=3D end - || dst_bits + dst_x - + (dst_y + s->regs.dst_height) * dst_stride >=3D end) { + + if (!src.stride) { + qemu_log_mask(LOG_GUEST_ERROR, "Zero source pitch\n"); + return src; + } + + if (s->dev_id =3D=3D PCI_DEVICE_ID_ATI_RAGE128_PF) { + src.bits +=3D s->regs.crtc_offset & 0x07ffffff; + src.stride *=3D dst->bpp; + } + + if (src.x > 0x3fff || src.y > 0x3fff || src.bits >=3D end + || src.bits + src.x + + (src.y + dst->rect.height) * src.stride >=3D end) { qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n"); - return; + return src; } + + src.valid =3D true; + + return src; +} + +static void ati_set_dirty(ATIVGAState *s, const ATIBlitDst *dst) +{ + DisplaySurface *ds =3D qemu_console_surface(s->vga.con); + if (dst->bits >=3D s->vga.vram_ptr + s->vga.vbe_start_addr && + dst->bits < s->vga.vram_ptr + s->vga.vbe_start_addr + + s->vga.vbe_regs[VBE_DISPI_INDEX_YRES] * s->vga.vbe_line_offset) { + memory_region_set_dirty(&s->vga.vram, s->vga.vbe_start_addr + + s->regs.dst_offset + + dst->rect.y * surface_stride(ds), + dst->rect.height * surface_stride(ds)); + } +} + +static void ati_2d_blt(ATIVGAState *s, ATIBlitSrc src, ATIBlitDst dst) +{ + /* FIXME it is probably more complex than this and may need to be */ + /* rewritten but for now as a start just to get some output: */ + uint32_t rop3 =3D s->regs.dp_mix & GMC_ROP3_MASK; + bool use_pixman =3D s->use_pixman & BIT(1); + int dst_stride_words =3D dst.stride / sizeof(uint32_t); + int src_stride_words =3D src.stride / sizeof(uint32_t); + + DPRINTF("%p %u ds: %p %d %d rop: %x\n", s->vga.vram_ptr, + s->vga.vbe_start_addr, surface_data(ds), surface_stride(ds), + surface_bits_per_pixel(ds), rop3 >> 16); DPRINTF("%d %d %d, %d %d %d, (%d,%d) -> (%d,%d) %dx%d %c %c\n", s->regs.src_offset, s->regs.dst_offset, s->regs.default_offset, s->regs.src_pitch, s->regs.dst_pitch, s->regs.default_pitch, - s->regs.src_x, s->regs.src_y, dst_x, dst_y, - s->regs.dst_width, s->regs.dst_height, - (s->regs.dp_cntl & DST_X_LEFT_TO_RIGHT ? '>' : '<'), - (s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM ? 'v' : '^')); - switch (s->regs.dp_mix & GMC_ROP3_MASK) { + s->regs.src_x, s->regs.src_y, + dst.rect.x, dst.rect.y, dst.rect.width, dst.rect.height, + (dst.left_to_right ? '>' : '<'), + (dst.top_to_bottom ? 'v' : '^')); + + switch (rop3) { case ROP3_SRCCOPY: { bool fallback =3D false; - unsigned src_x =3D (s->regs.dp_cntl & DST_X_LEFT_TO_RIGHT ? - s->regs.src_x : s->regs.src_x + 1 - s->regs.dst_wid= th); - unsigned src_y =3D (s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM ? - s->regs.src_y : s->regs.src_y + 1 - s->regs.dst_hei= ght); - int src_stride =3D DEFAULT_CNTL ? - s->regs.src_pitch : s->regs.default_pitch; - if (!src_stride) { - qemu_log_mask(LOG_GUEST_ERROR, "Zero source pitch\n"); - return; - } - uint8_t *src_bits =3D s->vga.vram_ptr + (DEFAULT_CNTL ? - s->regs.src_offset : s->regs.default_offset); =20 - if (s->dev_id =3D=3D PCI_DEVICE_ID_ATI_RAGE128_PF) { - src_bits +=3D s->regs.crtc_offset & 0x07ffffff; - src_stride *=3D bpp; - } - if (src_x > 0x3fff || src_y > 0x3fff || src_bits >=3D end - || src_bits + src_x - + (src_y + s->regs.dst_height) * src_stride >=3D end) { - qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n"); - return; - } - - src_stride /=3D sizeof(uint32_t); - dst_stride /=3D sizeof(uint32_t); DPRINTF("pixman_blt(%p, %p, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d= )\n", - src_bits, dst_bits, src_stride, dst_stride, bpp, bpp, - src_x, src_y, dst_x, dst_y, - s->regs.dst_width, s->regs.dst_height); + src.bits, dst.bits, src_stride_words, dst_stride_words, + dst.bpp, dst.bpp, src.x, src.y, + dst.rect.x, dst.rect.y, + dst.rect.width, dst.rect.height); #ifdef CONFIG_PIXMAN - if ((s->use_pixman & BIT(1)) && - s->regs.dp_cntl & DST_X_LEFT_TO_RIGHT && - s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM) { - fallback =3D !pixman_blt((uint32_t *)src_bits, (uint32_t *)dst= _bits, - src_stride, dst_stride, bpp, bpp, - src_x, src_y, dst_x, dst_y, - s->regs.dst_width, s->regs.dst_height); - } else if (s->use_pixman & BIT(1)) { + if (use_pixman && + dst.left_to_right && dst.top_to_bottom) { + fallback =3D !pixman_blt((uint32_t *)src.bits, (uint32_t *)dst= .bits, + src_stride_words, dst_stride_words, + dst.bpp, dst.bpp, + src.x, src.y, dst.rect.x, dst.rect.y, + dst.rect.width, dst.rect.height); + } else if (use_pixman) { /* FIXME: We only really need a temporary if src and dst overl= ap */ - int llb =3D s->regs.dst_width * (bpp / 8); + int llb =3D dst.rect.width * (dst.bpp / 8); int tmp_stride =3D DIV_ROUND_UP(llb, sizeof(uint32_t)); uint32_t *tmp =3D g_malloc(tmp_stride * sizeof(uint32_t) * - s->regs.dst_height); - fallback =3D !pixman_blt((uint32_t *)src_bits, tmp, - src_stride, tmp_stride, bpp, bpp, - src_x, src_y, 0, 0, - s->regs.dst_width, s->regs.dst_height); + dst.rect.height); + fallback =3D !pixman_blt((uint32_t *)src.bits, tmp, + src_stride_words, tmp_stride, dst.bpp, = dst.bpp, + src.x, src.y, 0, 0, + dst.rect.width, dst.rect.height); if (!fallback) { - fallback =3D !pixman_blt(tmp, (uint32_t *)dst_bits, - tmp_stride, dst_stride, bpp, bpp, - 0, 0, dst_x, dst_y, - s->regs.dst_width, s->regs.dst_heig= ht); + fallback =3D !pixman_blt(tmp, (uint32_t *)dst.bits, + tmp_stride, dst_stride_words, + dst.bpp, dst.bpp, + 0, 0, dst.rect.x, dst.rect.y, + dst.rect.width, dst.rect.height); } g_free(tmp); } else @@ -154,35 +218,25 @@ void ati_2d_blt(ATIVGAState *s) fallback =3D true; } if (fallback) { - unsigned int y, i, j, bypp =3D bpp / 8; - unsigned int src_pitch =3D src_stride * sizeof(uint32_t); - unsigned int dst_pitch =3D dst_stride * sizeof(uint32_t); - - for (y =3D 0; y < s->regs.dst_height; y++) { - i =3D dst_x * bypp; - j =3D src_x * bypp; - if (s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM) { - i +=3D (dst_y + y) * dst_pitch; - j +=3D (src_y + y) * src_pitch; + unsigned int y, i, j, bypp =3D dst.bpp / 8; + for (y =3D 0; y < dst.rect.height; y++) { + i =3D dst.rect.x * bypp; + j =3D src.x * bypp; + if (dst.top_to_bottom) { + i +=3D (dst.rect.y + y) * dst.stride; + j +=3D (src.y + y) * src.stride; } else { - i +=3D (dst_y + s->regs.dst_height - 1 - y) * dst_pitc= h; - j +=3D (src_y + s->regs.dst_height - 1 - y) * src_pitc= h; + i +=3D (dst.rect.y + dst.rect.height - 1 - y) * dst.st= ride; + j +=3D (src.y + dst.rect.height - 1 - y) * src.stride; } - memmove(&dst_bits[i], &src_bits[j], s->regs.dst_width * by= pp); + memmove(&dst.bits[i], &src.bits[j], dst.rect.width * bypp); } } - if (dst_bits >=3D s->vga.vram_ptr + s->vga.vbe_start_addr && - dst_bits < s->vga.vram_ptr + s->vga.vbe_start_addr + - s->vga.vbe_regs[VBE_DISPI_INDEX_YRES] * s->vga.vbe_line_offset= ) { - memory_region_set_dirty(&s->vga.vram, s->vga.vbe_start_addr + - s->regs.dst_offset + - dst_y * surface_stride(ds), - s->regs.dst_height * surface_stride(ds= )); - } - s->regs.dst_x =3D (s->regs.dp_cntl & DST_X_LEFT_TO_RIGHT ? - dst_x + s->regs.dst_width : dst_x); - s->regs.dst_y =3D (s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM ? - dst_y + s->regs.dst_height : dst_y); + ati_set_dirty(s, &dst); + s->regs.dst_x =3D (dst.left_to_right ? + dst.rect.x + dst.rect.width : dst.rect.x); + s->regs.dst_y =3D (dst.top_to_bottom ? + dst.rect.y + dst.rect.height : dst.rect.y); break; } case ROP3_PATCOPY: @@ -191,7 +245,7 @@ void ati_2d_blt(ATIVGAState *s) { uint32_t filler =3D 0; =20 - switch (s->regs.dp_mix & GMC_ROP3_MASK) { + switch (rop3) { case ROP3_PATCOPY: filler =3D s->regs.dp_brush_frgd_clr; break; @@ -205,40 +259,42 @@ void ati_2d_blt(ATIVGAState *s) break; } =20 - dst_stride /=3D sizeof(uint32_t); DPRINTF("pixman_fill(%p, %d, %d, %d, %d, %d, %d, %x)\n", - dst_bits, dst_stride, bpp, dst_x, dst_y, - s->regs.dst_width, s->regs.dst_height, filler); + dst.bits, dst_stride_words, dst.bpp, dst.rect.x, dst.rect.= y, + dst.rect.width, dst.rect.height, filler); #ifdef CONFIG_PIXMAN - if (!(s->use_pixman & BIT(0)) || - !pixman_fill((uint32_t *)dst_bits, dst_stride, bpp, dst_x, dst= _y, - s->regs.dst_width, s->regs.dst_height, filler)) + if (!use_pixman || + !pixman_fill((uint32_t *)dst.bits, dst_stride_words, dst.bpp, + dst.rect.x, dst.rect.y, + dst.rect.width, dst.rect.height, filler)) #endif { /* fallback when pixman failed or we don't want to call it */ - unsigned int x, y, i, bypp =3D bpp / 8; - unsigned int dst_pitch =3D dst_stride * sizeof(uint32_t); - for (y =3D 0; y < s->regs.dst_height; y++) { - i =3D dst_x * bypp + (dst_y + y) * dst_pitch; - for (x =3D 0; x < s->regs.dst_width; x++, i +=3D bypp) { - stn_he_p(&dst_bits[i], bypp, filler); + unsigned int x, y, i, bypp =3D dst.bpp / 8; + for (y =3D 0; y < dst.rect.height; y++) { + i =3D dst.rect.x * bypp + (dst.rect.y + y) * dst.stride; + for (x =3D 0; x < dst.rect.width; x++, i +=3D bypp) { + stn_he_p(&dst.bits[i], bypp, filler); } } } - if (dst_bits >=3D s->vga.vram_ptr + s->vga.vbe_start_addr && - dst_bits < s->vga.vram_ptr + s->vga.vbe_start_addr + - s->vga.vbe_regs[VBE_DISPI_INDEX_YRES] * s->vga.vbe_line_offset= ) { - memory_region_set_dirty(&s->vga.vram, s->vga.vbe_start_addr + - s->regs.dst_offset + - dst_y * surface_stride(ds), - s->regs.dst_height * surface_stride(ds= )); - } - s->regs.dst_y =3D (s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM ? - dst_y + s->regs.dst_height : dst_y); + ati_set_dirty(s, &dst); + s->regs.dst_y =3D (dst.top_to_bottom ? + dst.rect.y + dst.rect.height : dst.rect.y); break; } default: qemu_log_mask(LOG_UNIMP, "Unimplemented ati_2d blt op %x\n", - (s->regs.dp_mix & GMC_ROP3_MASK) >> 16); + rop3 >> 16); + } +} + +void ati_2d_blt_from_memory(ATIVGAState *s) +{ + if ((s->regs.dp_mix & DP_SRC_SOURCE) !=3D DP_SRC_RECT) { + return; } + ATIBlitDst dst =3D setup_2d_blt_dst(s); + ATIBlitSrc src =3D setup_2d_blt_src(s, &dst); + ati_2d_blt(s, src, dst); } diff --git a/hw/display/ati_int.h b/hw/display/ati_int.h index f5a47b82b0..0a3013d657 100644 --- a/hw/display/ati_int.h +++ b/hw/display/ati_int.h @@ -104,6 +104,6 @@ struct ATIVGAState { =20 const char *ati_reg_name(int num); =20 -void ati_2d_blt(ATIVGAState *s); +void ati_2d_blt_from_memory(ATIVGAState *s); =20 #endif /* ATI_INT_H */ diff --git a/hw/display/ati_regs.h b/hw/display/ati_regs.h index d7127748ff..2b86dcdf46 100644 --- a/hw/display/ati_regs.h +++ b/hw/display/ati_regs.h @@ -434,6 +434,7 @@ #define DST_POLY_EDGE 0x00040000 =20 /* DP_MIX bit constants */ +#define DP_SRC_SOURCE 0x00000700 #define DP_SRC_RECT 0x00000200 #define DP_SRC_HOST 0x00000300 #define DP_SRC_HOST_BYTEALIGN 0x00000400 --=20 2.51.2