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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-432bd5df91fsm7184522f8f.23.2026.01.06.15.19.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 06 Jan 2026 15:19:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1767741561; x=1768346361; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5MSw6pM1Isj343x+S0mtnkdkQ6xtf+8KOtUuCijJ/iM=; b=PzNDPchUgvW134bzM3ckY+qeoHrqdn/y5ajzMreWVujfLLDWwmnLsUyNICcFrSbXyV YSfI6sIcIEkGqnnvplNEC3PzdSB15WwYxGbYgTj5J3uUvR30VuRFd1WDuvAaAddUSWQQ 9GXBVoo8QxGOspsRR62JrmQY69IIKbrTmI1foGIJALXEk8svnFOEID+2G97+PX5uqZXr 53mAq/rmmbeWVOLHOP4dJGJfPSwDnFwSLOh9Gon4ChxZReKDxYnRfTkE2io2+ByYeu+V +y/UTogdPVu4Otm9bxlgVWXGfoTVwa7FDrF2iyPM2zcLVk0+IiwWcb1siua4VjoAL5Pv I+mw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1767741561; x=1768346361; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=5MSw6pM1Isj343x+S0mtnkdkQ6xtf+8KOtUuCijJ/iM=; b=DvHgbUf8q1n/rj6xbOJUM32MZ3nCedXH1lqDX0fWyRuQSVRcwNFxBDzscaJBZHwKhD fxp9t+l5A2FyfEL3ODMBkjfLVYECKEZ98NM6fBJ6Dh+1NiFFfNqCOe+jhyM0/IldIqFk TVLGhJHRyFr2P9rE8xIs2rmmUFewa1BAP/f64t+PvLG8X1gby9AT4M6UShlvahPkSkFD JIdiy2X77xU1ehQOC/pH5YScyBGpsoZ55O8ZknMNQ77cLMkZqGIt/OrWlgWjY/oayNjH bPbOxOyTGNgef6QKMzmqzRa1aHI/JQRXEsrScaXnWRhD1YzLJt9MHMvYdV8mU1WAwjxm OctQ== X-Gm-Message-State: AOJu0YxWMJ5xd8O2FG5udvgCARAa3a6Esu/pQ6prEqMUMnNLB+URWOlU 87p0WtoyrG6lolkXRBX+wpIlTlLIUM/0BFvCcl5Gj1GlIW02Dukp25GheT608IlrMyEWNPwVidr 7e27r5qVDuw== X-Gm-Gg: AY/fxX44yVGQ3lRz0vP/XNI3s5hxu3hUjWZnEmO8Z58ECuZF6HxD9mhEGvYU965KKpp nGkuHYOu1vwZI9oQojqyqumpcp+v/buCF7YVLEvIEsysNZbUElj5pOqF3TvFs6u3zkjNJBJ7BIW TEkbEETWGC9T0VqiKKh4u42esQYsLxkR+isVXId0vffadw5BPSe517M+DwBTevBn2PUXHPwYi7B M5OTkeIzCq/T1rB2YCiQKcupXYH1s0oC2fuYi6ag7YPdm7/VV9WWcazp2NuBNNd5ST/aFwTRG7+ oRF01qmCQed9ZyQvjd3M/XEzoPMcIJG3bfYDq7RHpEDCC8eJwp80PHGQsYRqUOE6i3lUHbwAiox G63mutAVk20eYAB/UXDDBgFQ4vXMeX0G5ltIGu6O+H1xrNPCeFjf/oNJHy2awDNxvdxkBX4xqNh P5QMLCzCkX6++5CJdVNl34XWP7RR55h8nnJ1GuvmrXv6O0Z/21Naq7mLk24hrD X-Google-Smtp-Source: AGHT+IFhOTFzCPaSSO0jICAUELJTem7A365yBYeKRFZ6R0EZuKOxmdBZJj7PGcudVsIGaP1SPOx2kA== X-Received: by 2002:a05:6000:2dc6:b0:431:1d4:3a8a with SMTP id ffacd0b85a97d-432c3628301mr754519f8f.7.1767741560904; Tue, 06 Jan 2026 15:19:20 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Richard Henderson , qemu-ppc@nongnu.org, Pierrick Bouvier , qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-arm@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Zhao Liu Subject: [PATCH 1/5] target/i386: Restrict WatchPoint API to TCG Date: Wed, 7 Jan 2026 00:19:03 +0100 Message-ID: <20260106231908.16756-2-philmd@linaro.org> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260106231908.16756-1-philmd@linaro.org> References: <20260106231908.16756-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::444; envelope-from=philmd@linaro.org; helo=mail-wr1-x444.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1767741613704158500 Watchpoints are specific to the TCG accelerator. Restrict the cpu_watchpoint_remove_all() call. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier Reviewed-by: Zhao Liu --- target/i386/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 37803cd7249..9831e2bc210 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -9184,7 +9184,9 @@ static void x86_cpu_reset_hold(Object *obj, ResetType= type) env->dr[6] =3D DR6_FIXED_1; env->dr[7] =3D DR7_FIXED_1; cpu_breakpoint_remove_all(cs, BP_CPU); - cpu_watchpoint_remove_all(cs, BP_CPU); + if (tcg_enabled()) { + cpu_watchpoint_remove_all(cs, BP_CPU); + } =20 cr4 =3D 0; xcr0 =3D XSTATE_FP_MASK; --=20 2.52.0 From nobody Sat Feb 7 08:55:06 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1767741651; cv=none; d=zohomail.com; s=zohoarc; b=aTPVzmAaLMLTujCzuvUdDuBQ0t14mNHjYV9P9Ste4anqtZGsQm6dix11nDHME7euLPJWVnB7wGQ1IkapNzhccqG6PIeMoMWz7vCYqtKroKzlkheFZZoyLeXK5S4iBX7QKdKeMlwoydY/B/VFErztwVLggYS/xTA9ZOqEElZpaHg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767741651; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=pD7Mewu4hIr0e5mQRsO3Q7vuGfas+TRDeUMaumdJ2i8=; b=PCLs9bshdNOtNRzzuA4c3KmPZE00sJ6VYZZxPCssc9SfthS/YsR4YdGeb3YYf2i9DzFqNkB8b3UGUgnGXCnZVS+REL1d14gGuIlvo3T4OHQP4QmEQJnPyXGoKRwItgJmLYApauiTEg/d12DlUgf4SxJUVF4O7aG1l1a+aXW0Rf0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1767741651602341.1824993794046; Tue, 6 Jan 2026 15:20:51 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vdGL2-0005Mb-8Q; Tue, 06 Jan 2026 18:19:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdGKq-0005DS-Dh for qemu-devel@nongnu.org; Tue, 06 Jan 2026 18:19:33 -0500 Received: from mail-wm1-x341.google.com ([2a00:1450:4864:20::341]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1vdGKn-0001E4-LK for qemu-devel@nongnu.org; Tue, 06 Jan 2026 18:19:32 -0500 Received: by mail-wm1-x341.google.com with SMTP id 5b1f17b1804b1-47774d3536dso2601655e9.0 for ; Tue, 06 Jan 2026 15:19:29 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Since the Data Address Watchpoint helpers are only called from translated code, move them to a new 'watchpoint.c' file, specific to TCG. Thus restricting the WatchPoint API to TCG. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Chinmay Rath Reviewed-by: Pierrick Bouvier --- target/ppc/cpu.c | 81 +---------------------------------- target/ppc/watchpoint.c | 93 +++++++++++++++++++++++++++++++++++++++++ target/ppc/meson.build | 1 + 3 files changed, 96 insertions(+), 79 deletions(-) create mode 100644 target/ppc/watchpoint.c diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c index 4d8faaddee2..9cb3f00aa88 100644 --- a/target/ppc/cpu.c +++ b/target/ppc/cpu.c @@ -131,85 +131,8 @@ void ppc_store_ciabr(CPUPPCState *env, target_ulong va= l) ppc_update_ciabr(env); } =20 -void ppc_update_daw(CPUPPCState *env, int rid) -{ - CPUState *cs =3D env_cpu(env); - int spr_dawr =3D rid ? SPR_DAWR1 : SPR_DAWR0; - int spr_dawrx =3D rid ? SPR_DAWRX1 : SPR_DAWRX0; - target_ulong deaw =3D env->spr[spr_dawr] & PPC_BITMASK(0, 60); - uint32_t dawrx =3D env->spr[spr_dawrx]; - int mrd =3D extract32(dawrx, PPC_BIT_NR(48), 54 - 48); - bool dw =3D extract32(dawrx, PPC_BIT_NR(57), 1); - bool dr =3D extract32(dawrx, PPC_BIT_NR(58), 1); - bool hv =3D extract32(dawrx, PPC_BIT_NR(61), 1); - bool sv =3D extract32(dawrx, PPC_BIT_NR(62), 1); - bool pr =3D extract32(dawrx, PPC_BIT_NR(62), 1); - vaddr len; - int flags; - - if (env->dawr_watchpoint[rid]) { - cpu_watchpoint_remove_by_ref(cs, env->dawr_watchpoint[rid]); - env->dawr_watchpoint[rid] =3D NULL; - } - - if (!dr && !dw) { - return; - } - - if (!hv && !sv && !pr) { - return; - } - - len =3D (mrd + 1) * 8; - flags =3D BP_CPU | BP_STOP_BEFORE_ACCESS; - if (dr) { - flags |=3D BP_MEM_READ; - } - if (dw) { - flags |=3D BP_MEM_WRITE; - } - - cpu_watchpoint_insert(cs, deaw, len, flags, &env->dawr_watchpoint[rid]= ); -} - -void ppc_store_dawr0(CPUPPCState *env, target_ulong val) -{ - env->spr[SPR_DAWR0] =3D val; - ppc_update_daw(env, 0); -} - -static void ppc_store_dawrx(CPUPPCState *env, uint32_t val, int rid) -{ - int hrammc =3D extract32(val, PPC_BIT_NR(56), 1); - - if (hrammc) { - /* This might be done with a second watchpoint at the xor of DEAW[= 0] */ - qemu_log_mask(LOG_UNIMP, "%s: DAWRX%d[HRAMMC] is unimplemented\n", - __func__, rid); - } - - env->spr[rid ? SPR_DAWRX1 : SPR_DAWRX0] =3D val; - ppc_update_daw(env, rid); -} - -void ppc_store_dawrx0(CPUPPCState *env, uint32_t val) -{ - ppc_store_dawrx(env, val, 0); -} - -void ppc_store_dawr1(CPUPPCState *env, target_ulong val) -{ - env->spr[SPR_DAWR1] =3D val; - ppc_update_daw(env, 1); -} - -void ppc_store_dawrx1(CPUPPCState *env, uint32_t val) -{ - ppc_store_dawrx(env, val, 1); -} - -#endif -#endif +#endif /* TARGET_PPC64 */ +#endif /* !CONFIG_USER_ONLY */ =20 static inline void fpscr_set_rounding_mode(CPUPPCState *env) { diff --git a/target/ppc/watchpoint.c b/target/ppc/watchpoint.c new file mode 100644 index 00000000000..c71dd4550b7 --- /dev/null +++ b/target/ppc/watchpoint.c @@ -0,0 +1,93 @@ +/* + * PowerPC watchpoint routines for QEMU + * + * Copyright (c) 2017 Nikunj A Dadhania, IBM Corporation. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "exec/log.h" +#include "accel/tcg/watchpoint.h" +#include "target/ppc/cpu.h" + +#if defined(TARGET_PPC64) + +void ppc_update_daw(CPUPPCState *env, int rid) +{ + CPUState *cs =3D env_cpu(env); + int spr_dawr =3D rid ? SPR_DAWR1 : SPR_DAWR0; + int spr_dawrx =3D rid ? SPR_DAWRX1 : SPR_DAWRX0; + target_ulong deaw =3D env->spr[spr_dawr] & PPC_BITMASK(0, 60); + uint32_t dawrx =3D env->spr[spr_dawrx]; + int mrd =3D extract32(dawrx, PPC_BIT_NR(48), 54 - 48); + bool dw =3D extract32(dawrx, PPC_BIT_NR(57), 1); + bool dr =3D extract32(dawrx, PPC_BIT_NR(58), 1); + bool hv =3D extract32(dawrx, PPC_BIT_NR(61), 1); + bool sv =3D extract32(dawrx, PPC_BIT_NR(62), 1); + bool pr =3D extract32(dawrx, PPC_BIT_NR(62), 1); + vaddr len; + int flags; + + if (env->dawr_watchpoint[rid]) { + cpu_watchpoint_remove_by_ref(cs, env->dawr_watchpoint[rid]); + env->dawr_watchpoint[rid] =3D NULL; + } + + if (!dr && !dw) { + return; + } + + if (!hv && !sv && !pr) { + return; + } + + len =3D (mrd + 1) * 8; + flags =3D BP_CPU | BP_STOP_BEFORE_ACCESS; + if (dr) { + flags |=3D BP_MEM_READ; + } + if (dw) { + flags |=3D BP_MEM_WRITE; + } + + cpu_watchpoint_insert(cs, deaw, len, flags, &env->dawr_watchpoint[rid]= ); +} + +void ppc_store_dawr0(CPUPPCState *env, target_ulong val) +{ + env->spr[SPR_DAWR0] =3D val; + ppc_update_daw(env, 0); +} + +static void ppc_store_dawrx(CPUPPCState *env, uint32_t val, int rid) +{ + int hrammc =3D extract32(val, PPC_BIT_NR(56), 1); + + if (hrammc) { + /* This might be done with a second watchpoint at the xor of DEAW[= 0] */ + qemu_log_mask(LOG_UNIMP, "%s: DAWRX%d[HRAMMC] is unimplemented\n", + __func__, rid); + } + + env->spr[rid ? SPR_DAWRX1 : SPR_DAWRX0] =3D val; + ppc_update_daw(env, rid); +} + +void ppc_store_dawrx0(CPUPPCState *env, uint32_t val) +{ + ppc_store_dawrx(env, val, 0); +} + +void ppc_store_dawr1(CPUPPCState *env, target_ulong val) +{ + env->spr[SPR_DAWR1] =3D val; + ppc_update_daw(env, 1); +} + +void ppc_store_dawrx1(CPUPPCState *env, uint32_t val) +{ + ppc_store_dawrx(env, val, 1); +} + +#endif diff --git a/target/ppc/meson.build b/target/ppc/meson.build index 8eed1fa40ca..d354c3240a2 100644 --- a/target/ppc/meson.build +++ b/target/ppc/meson.build @@ -43,6 +43,7 @@ ppc_system_ss.add(files( 'ppc-qmp-cmds.c', )) ppc_system_ss.add(when: 'CONFIG_TCG', if_true: files( + 'watchpoint.c', 'mmu_helper.c', ), if_false: files( 'tcg-stub.c', --=20 2.52.0 From nobody Sat Feb 7 08:55:06 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1767741649; cv=none; d=zohomail.com; s=zohoarc; b=luCAx1NITXYJklZYRBETja14bR5AScu6CIb2rOTzju6LzFn0e+Pf8GKtEHzyIjFUMEUUlnPf4uPe65nlr4R/HHPE4G0r94wxVjhy4o7FFjDjJnLPjZ8HecQzEJS+4xBbt7DqBTsmIh4k0rlqHB2QDkIhojY0pQ90B1LIvBjmjRU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767741649; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=oG31mHt5hAIZAFs8E2PvTGlNRu+jO6SBveBnHl2PbaQ=; b=XHinQwfBnuGiJlJXdyKzvuGDVpr8RwFnKs626yo1kt8lcM3lTFZhONfCWhPRXqmomU9LNq+GPzeG3g0R3GTvTTIrhi+L7wGDIG46+qH4Oo4eslIUme+1rzor8zyjFpcInxZcSYm58xvBHLs0RnSJ6HO5TrNNwfRnJo/Xa1wpCHE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1767741649474474.1733649027444; Tue, 6 Jan 2026 15:20:49 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vdGL6-0005UK-7y; Tue, 06 Jan 2026 18:19:48 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdGL4-0005PG-46 for qemu-devel@nongnu.org; Tue, 06 Jan 2026 18:19:46 -0500 Received: from mail-wm1-x341.google.com ([2a00:1450:4864:20::341]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1vdGL1-0001ID-2L for qemu-devel@nongnu.org; Tue, 06 Jan 2026 18:19:45 -0500 Received: by mail-wm1-x341.google.com with SMTP id 5b1f17b1804b1-477a219dbcaso12265075e9.3 for ; Tue, 06 Jan 2026 15:19:36 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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Move it to a TCG specific file to avoid compiling dead code on KVM. This restricts the WatchPoint API calls to TCG. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier --- target/s390x/s390x-internal.h | 1 - target/s390x/tcg/tcg_s390x.h | 4 +++ target/s390x/cpu.c | 30 ++++++++++---------- target/s390x/helper.c | 38 ------------------------- target/s390x/tcg/debug.c | 53 +++++++++++++++++++++++++++++++++++ target/s390x/tcg/meson.build | 3 ++ 6 files changed, 75 insertions(+), 54 deletions(-) create mode 100644 target/s390x/tcg/debug.c diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index 9691366ec91..c4cd17d4d7d 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -317,7 +317,6 @@ void s390_cpu_gdb_init(CPUState *cs); void s390_cpu_dump_state(CPUState *cpu, FILE *f, int flags); void do_restart_interrupt(CPUS390XState *env); #ifndef CONFIG_USER_ONLY -void s390_cpu_recompute_watchpoints(CPUState *cs); void s390x_tod_timer(void *opaque); void s390x_cpu_timer(void *opaque); void s390_handle_wait(S390CPU *cpu); diff --git a/target/s390x/tcg/tcg_s390x.h b/target/s390x/tcg/tcg_s390x.h index 78558912f99..33f26f26c0f 100644 --- a/target/s390x/tcg/tcg_s390x.h +++ b/target/s390x/tcg/tcg_s390x.h @@ -21,4 +21,8 @@ G_NORETURN void tcg_s390_data_exception(CPUS390XState *en= v, uint32_t dxc, G_NORETURN void tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc, uintptr_t ra); =20 +#ifndef CONFIG_USER_ONLY +void s390_cpu_recompute_watchpoints(CPUState *cs); +#endif + #endif /* TCG_S390X_H */ diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 6c4198eb1b1..f68b288e364 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -40,6 +40,7 @@ #include "system/reset.h" #endif #include "hw/s390x/cpu-topology.h" +#include "tcg/tcg_s390x.h" =20 #define CR0_RESET 0xE0UL #define CR14_RESET 0xC2000000UL; @@ -74,26 +75,25 @@ void s390_cpu_set_psw(CPUS390XState *env, uint64_t mask= , uint64_t addr) env->psw.mask =3D mask; =20 /* KVM will handle all WAITs and trigger a WAIT exit on disabled_wait = */ - if (!tcg_enabled()) { - return; - } - env->cc_op =3D (mask >> 44) & 3; + if (tcg_enabled()) { + env->cc_op =3D (mask >> 44) & 3; =20 #ifndef CONFIG_USER_ONLY - if (is_early_exception_psw(mask, addr)) { - env->int_pgm_ilen =3D 0; - trigger_pgm_exception(env, PGM_SPECIFICATION); - return; - } + if (is_early_exception_psw(mask, addr)) { + env->int_pgm_ilen =3D 0; + trigger_pgm_exception(env, PGM_SPECIFICATION); + return; + } =20 - if ((old_mask ^ mask) & PSW_MASK_PER) { - s390_cpu_recompute_watchpoints(env_cpu(env)); - } + if ((old_mask ^ mask) & PSW_MASK_PER) { + s390_cpu_recompute_watchpoints(env_cpu(env)); + } =20 - if (mask & PSW_MASK_WAIT) { - s390_handle_wait(env_archcpu(env)); - } + if (mask & PSW_MASK_WAIT) { + s390_handle_wait(env_archcpu(env)); + } #endif + } } =20 uint64_t s390_cpu_get_psw_mask(CPUS390XState *env) diff --git a/target/s390x/helper.c b/target/s390x/helper.c index 184428c6d9d..8d1e03f6768 100644 --- a/target/s390x/helper.c +++ b/target/s390x/helper.c @@ -143,41 +143,3 @@ void do_restart_interrupt(CPUS390XState *env) =20 s390_cpu_set_psw(env, mask, addr); } - -void s390_cpu_recompute_watchpoints(CPUState *cs) -{ - const int wp_flags =3D BP_CPU | BP_MEM_WRITE | BP_STOP_BEFORE_ACCESS; - CPUS390XState *env =3D cpu_env(cs); - - /* We are called when the watchpoints have changed. First - remove them all. */ - cpu_watchpoint_remove_all(cs, BP_CPU); - - /* Return if PER is not enabled */ - if (!(env->psw.mask & PSW_MASK_PER)) { - return; - } - - /* Return if storage-alteration event is not enabled. */ - if (!(env->cregs[9] & PER_CR9_EVENT_STORE)) { - return; - } - - if (env->cregs[10] =3D=3D 0 && env->cregs[11] =3D=3D -1LL) { - /* We can't create a watchoint spanning the whole memory range, so - split it in two parts. */ - cpu_watchpoint_insert(cs, 0, 1ULL << 63, wp_flags, NULL); - cpu_watchpoint_insert(cs, 1ULL << 63, 1ULL << 63, wp_flags, NULL); - } else if (env->cregs[10] > env->cregs[11]) { - /* The address range loops, create two watchpoints. */ - cpu_watchpoint_insert(cs, env->cregs[10], -env->cregs[10], - wp_flags, NULL); - cpu_watchpoint_insert(cs, 0, env->cregs[11] + 1, wp_flags, NULL); - - } else { - /* Default case, create a single watchpoint. */ - cpu_watchpoint_insert(cs, env->cregs[10], - env->cregs[11] - env->cregs[10] + 1, - wp_flags, NULL); - } -} diff --git a/target/s390x/tcg/debug.c b/target/s390x/tcg/debug.c new file mode 100644 index 00000000000..12ae95d4fe8 --- /dev/null +++ b/target/s390x/tcg/debug.c @@ -0,0 +1,53 @@ +/* + * QEMU S/390 debug routines + * + * Copyright (c) 2009 Ulrich Hecht + * Copyright (c) 2011 Alexander Graf + * Copyright (c) 2012 SUSE LINUX Products GmbH + * Copyright (c) 2012 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "exec/watchpoint.h" +#include "target/s390x/cpu.h" +#include "tcg_s390x.h" + +void s390_cpu_recompute_watchpoints(CPUState *cs) +{ + const int wp_flags =3D BP_CPU | BP_MEM_WRITE | BP_STOP_BEFORE_ACCESS; + CPUS390XState *env =3D cpu_env(cs); + + /* We are called when the watchpoints have changed. First + remove them all. */ + cpu_watchpoint_remove_all(cs, BP_CPU); + + /* Return if PER is not enabled */ + if (!(env->psw.mask & PSW_MASK_PER)) { + return; + } + + /* Return if storage-alteration event is not enabled. */ + if (!(env->cregs[9] & PER_CR9_EVENT_STORE)) { + return; + } + + if (env->cregs[10] =3D=3D 0 && env->cregs[11] =3D=3D -1LL) { + /* We can't create a watchoint spanning the whole memory range, so + split it in two parts. */ + cpu_watchpoint_insert(cs, 0, 1ULL << 63, wp_flags, NULL); + cpu_watchpoint_insert(cs, 1ULL << 63, 1ULL << 63, wp_flags, NULL); + } else if (env->cregs[10] > env->cregs[11]) { + /* The address range loops, create two watchpoints. */ + cpu_watchpoint_insert(cs, env->cregs[10], -env->cregs[10], + wp_flags, NULL); + cpu_watchpoint_insert(cs, 0, env->cregs[11] + 1, wp_flags, NULL); + + } else { + /* Default case, create a single watchpoint. */ + cpu_watchpoint_insert(cs, env->cregs[10], + env->cregs[11] - env->cregs[10] + 1, + wp_flags, NULL); + } +} diff --git a/target/s390x/tcg/meson.build b/target/s390x/tcg/meson.build index ee4e8fec77c..515cb8b473d 100644 --- a/target/s390x/tcg/meson.build +++ b/target/s390x/tcg/meson.build @@ -12,3 +12,6 @@ s390x_ss.add(when: 'CONFIG_TCG', if_true: files( 'vec_int_helper.c', 'vec_string_helper.c', )) +s390x_system_ss.add(when: 'CONFIG_TCG', if_true: files( + 'debug.c', +)) --=20 2.52.0 From nobody Sat Feb 7 08:55:06 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1767741633; cv=none; d=zohomail.com; s=zohoarc; b=jgrbItS1apZ28OHcmYIVEmBaw/qMYyAbgbmnm+Xhl8DcY7KCgmGTZ6A3bDND58jeWPUxGrSVu/7hFp3S9ejYHbC0hm3QhbPCQr1Sbs1zwAWq6DKUqGB7FeEe5B+Edzkg2QyBUklASjU/aX7efHMjx02vQuyLD55bYswj3NoT7pE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767741633; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ky6fRx4jS/naL2rgxALVm23duns6ZzU/emXyduZp6IE=; b=Og4HWEhceTFLhGlm3bsI5n7CeMCVtIgUHScZe8RedihKWRKv6D+2HwtBkvCEt7XhcnG7kYF9pDVnDvqS5/G9d2ooWMIkF3BAJuXVXaQ5ZzjINoj/C3l0dqg+rH5q9W9N0WR7GvdrU6mtd2JqhTcVVGtYmgjRr+yTcuz4zR0/YT0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1767741632962270.57643871118864; Tue, 6 Jan 2026 15:20:32 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vdGLB-0005Y6-Mo; Tue, 06 Jan 2026 18:19:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdGL5-0005Rz-7i for qemu-devel@nongnu.org; Tue, 06 Jan 2026 18:19:47 -0500 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1vdGL1-0001Ij-Sl for qemu-devel@nongnu.org; Tue, 06 Jan 2026 18:19:46 -0500 Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-42fbc305914so1013179f8f.0 for ; Tue, 06 Jan 2026 15:19:43 -0800 (PST) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. 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We can easily fix that by un-inlining the user-emulation stubs. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier --- include/accel/tcg/cpu-ops.h | 17 ----------------- include/exec/watchpoint.h | 23 ----------------------- accel/tcg/user-exec-stub.c | 33 +++++++++++++++++++++++++++++++++ 3 files changed, 33 insertions(+), 40 deletions(-) diff --git a/include/accel/tcg/cpu-ops.h b/include/accel/tcg/cpu-ops.h index dd8ea300168..5950cdcaab1 100644 --- a/include/accel/tcg/cpu-ops.h +++ b/include/accel/tcg/cpu-ops.h @@ -281,21 +281,6 @@ struct TCGCPUOps { #endif /* !CONFIG_USER_ONLY */ }; =20 -#if defined(CONFIG_USER_ONLY) - -static inline void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr l= en, - MemTxAttrs atr, int fl, uintptr_t = ra) -{ -} - -static inline int cpu_watchpoint_address_matches(CPUState *cpu, - vaddr addr, vaddr len) -{ - return 0; -} - -#else - /** * cpu_check_watchpoint: * @cpu: cpu context @@ -328,6 +313,4 @@ int cpu_watchpoint_address_matches(CPUState *cpu, vaddr= addr, vaddr len); vaddr cpu_pointer_wrap_notreached(CPUState *, int, vaddr, vaddr); vaddr cpu_pointer_wrap_uint32(CPUState *, int, vaddr, vaddr); =20 -#endif - #endif /* TCG_CPU_OPS_H */ diff --git a/include/exec/watchpoint.h b/include/exec/watchpoint.h index 4b6668826c7..c4d069425ba 100644 --- a/include/exec/watchpoint.h +++ b/include/exec/watchpoint.h @@ -8,34 +8,11 @@ #ifndef EXEC_WATCHPOINT_H #define EXEC_WATCHPOINT_H =20 -#if defined(CONFIG_USER_ONLY) -static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr l= en, - int flags, CPUWatchpoint **watchpo= int) -{ - return -ENOSYS; -} - -static inline int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, - vaddr len, int flags) -{ - return -ENOSYS; -} - -static inline void cpu_watchpoint_remove_by_ref(CPUState *cpu, - CPUWatchpoint *wp) -{ -} - -static inline void cpu_watchpoint_remove_all(CPUState *cpu, int mask) -{ -} -#else int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, int flags, CPUWatchpoint **watchpoint); int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len, int flags); void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint= ); void cpu_watchpoint_remove_all(CPUState *cpu, int mask); -#endif =20 #endif /* EXEC_WATCHPOINT_H */ diff --git a/accel/tcg/user-exec-stub.c b/accel/tcg/user-exec-stub.c index 1d52f48226a..28286e11a60 100644 --- a/accel/tcg/user-exec-stub.c +++ b/accel/tcg/user-exec-stub.c @@ -1,6 +1,8 @@ #include "qemu/osdep.h" #include "hw/core/cpu.h" +#include "accel/tcg/cpu-ops.h" #include "exec/replay-core.h" +#include "exec/watchpoint.h" #include "internal-common.h" =20 void cpu_resume(CPUState *cpu) @@ -19,6 +21,37 @@ void cpu_exec_reset_hold(CPUState *cpu) { } =20 +int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, + int flags, CPUWatchpoint **watchpoint) +{ + return -ENOSYS; +} + +int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, + vaddr len, int flags) +{ + return -ENOSYS; +} + +void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *wp) +{ +} + +void cpu_watchpoint_remove_all(CPUState *cpu, int mask) +{ +} + +int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len) +{ + return 0; +} + +void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, + MemTxAttrs atr, int fl, uintptr_t ra) +{ +} + + /* User mode emulation does not support softmmu yet. */ =20 void tlb_init(CPUState *cpu) --=20 2.52.0 From nobody Sat Feb 7 08:55:06 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1767741666; cv=none; d=zohomail.com; s=zohoarc; b=ZANCCuqETT6p1rvx+IxzOb+YXePUnHjaKuAvGebWRslqjDUYYPWiEWTImhb9ocTl+n1pGoiUqE4Ik8CxMda2eTVWHco6Z1L/jadewnR7OI1+iHhkyR5iJugIdRkVikhkMmeLiPFoSlZCzmMrTvytCZhAAtjTwWmgVvluII2am7E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767741666; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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But more importantly, the API is scattered in two distinct headers. Unify them ("accel/tcg/cpu-ops.h" and "exec/watchpoint.h") to the new "accel/tcg/watchpoint.h" header, making the emphasis the API is specific to TCG. Have accel/tcg/watchpoint.c absorb system/watchpoint.c code. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Pierrick Bouvier Reviewed-by: Zhao Liu --- MAINTAINERS | 1 - include/accel/tcg/cpu-ops.h | 28 +------- include/accel/tcg/watchpoint.h | 57 ++++++++++++++++ include/exec/breakpoint.h | 10 --- include/exec/watchpoint.h | 18 ----- include/hw/core/cpu.h | 3 +- target/arm/internals.h | 2 +- target/ppc/internal.h | 2 +- target/riscv/debug.h | 2 +- accel/tcg/cputlb.c | 1 + accel/tcg/tcg-accel-ops.c | 2 +- accel/tcg/user-exec-stub.c | 3 +- accel/tcg/watchpoint.c | 83 +++++++++++++++++++++- system/watchpoint.c | 102 ---------------------------- target/arm/debug_helper.c | 2 +- target/arm/tcg/mte_helper.c | 2 +- target/arm/tcg/sve_helper.c | 2 +- target/i386/cpu.c | 2 +- target/i386/machine.c | 2 +- target/i386/tcg/system/bpt_helper.c | 2 +- target/ppc/cpu.c | 2 +- target/ppc/cpu_init.c | 2 +- target/riscv/cpu_helper.c | 2 +- target/riscv/debug.c | 2 +- target/s390x/helper.c | 2 +- target/s390x/tcg/debug.c | 2 +- target/s390x/tcg/excp_helper.c | 2 +- target/s390x/tcg/mem_helper.c | 1 + target/xtensa/dbg_helper.c | 2 +- system/meson.build | 1 - 30 files changed, 162 insertions(+), 182 deletions(-) create mode 100644 include/accel/tcg/watchpoint.h delete mode 100644 include/exec/watchpoint.h delete mode 100644 system/watchpoint.c diff --git a/MAINTAINERS b/MAINTAINERS index 0afee64a625..7c1c0d526a0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -155,7 +155,6 @@ Overall TCG CPUs M: Richard Henderson R: Paolo Bonzini S: Maintained -F: system/watchpoint.c F: page-vary-target.c F: page-vary-common.c F: accel/tcg/ diff --git a/include/accel/tcg/cpu-ops.h b/include/accel/tcg/cpu-ops.h index 5950cdcaab1..e20a79325e5 100644 --- a/include/accel/tcg/cpu-ops.h +++ b/include/accel/tcg/cpu-ops.h @@ -10,7 +10,7 @@ #ifndef TCG_CPU_OPS_H #define TCG_CPU_OPS_H =20 -#include "exec/breakpoint.h" +#include "accel/tcg/watchpoint.h" #include "exec/hwaddr.h" #include "exec/memattrs.h" #include "exec/memop.h" @@ -281,32 +281,6 @@ struct TCGCPUOps { #endif /* !CONFIG_USER_ONLY */ }; =20 -/** - * cpu_check_watchpoint: - * @cpu: cpu context - * @addr: guest virtual address - * @len: access length - * @attrs: memory access attributes - * @flags: watchpoint access type - * @ra: unwind return address - * - * Check for a watchpoint hit in [addr, addr+len) of the type - * specified by @flags. Exit via exception with a hit. - */ -void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, - MemTxAttrs attrs, int flags, uintptr_t ra); - -/** - * cpu_watchpoint_address_matches: - * @cpu: cpu context - * @addr: guest virtual address - * @len: access length - * - * Return the watchpoint flags that apply to [addr, addr+len). - * If no watchpoint is registered for the range, the result is 0. - */ -int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len); - /* * Common pointer_wrap implementations. */ diff --git a/include/accel/tcg/watchpoint.h b/include/accel/tcg/watchpoint.h new file mode 100644 index 00000000000..f28be5fc67f --- /dev/null +++ b/include/accel/tcg/watchpoint.h @@ -0,0 +1,57 @@ +/* + * CPU watchpoints + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#ifndef ACCEL_TCG_WATCHPOINT_H +#define ACCEL_TCG_WATCHPOINT_H + +#include "qemu/queue.h" +#include "exec/vaddr.h" +#include "exec/memattrs.h" + +typedef struct CPUWatchpoint { + vaddr vaddr; + vaddr len; + vaddr hitaddr; + MemTxAttrs hitattrs; + int flags; /* BP_* */ + QTAILQ_ENTRY(CPUWatchpoint) entry; +} CPUWatchpoint; + +int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, + int flags, CPUWatchpoint **watchpoint); +int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, + vaddr len, int flags); +void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint= ); +void cpu_watchpoint_remove_all(CPUState *cpu, int mask); + +/** + * cpu_check_watchpoint: + * @cpu: cpu context + * @addr: guest virtual address + * @len: access length + * @attrs: memory access attributes + * @flags: watchpoint access type + * @ra: unwind return address + * + * Check for a watchpoint hit in [addr, addr+len) of the type + * specified by @flags. Exit via exception with a hit. + */ +void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, + MemTxAttrs attrs, int flags, uintptr_t ra); + +/** + * cpu_watchpoint_address_matches: + * @cpu: cpu context + * @addr: guest virtual address + * @len: access length + * + * Return the watchpoint flags that apply to [addr, addr+len). + * If no watchpoint is registered for the range, the result is 0. + */ +int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len); + +#endif /* ACCEL_TCG_WATCHPOINT_H */ diff --git a/include/exec/breakpoint.h b/include/exec/breakpoint.h index 95f0482e6d0..ccc302fea0f 100644 --- a/include/exec/breakpoint.h +++ b/include/exec/breakpoint.h @@ -10,7 +10,6 @@ =20 #include "qemu/queue.h" #include "exec/vaddr.h" -#include "exec/memattrs.h" =20 typedef struct CPUBreakpoint { vaddr pc; @@ -18,13 +17,4 @@ typedef struct CPUBreakpoint { QTAILQ_ENTRY(CPUBreakpoint) entry; } CPUBreakpoint; =20 -typedef struct CPUWatchpoint { - vaddr vaddr; - vaddr len; - vaddr hitaddr; - MemTxAttrs hitattrs; - int flags; /* BP_* */ - QTAILQ_ENTRY(CPUWatchpoint) entry; -} CPUWatchpoint; - #endif diff --git a/include/exec/watchpoint.h b/include/exec/watchpoint.h deleted file mode 100644 index c4d069425ba..00000000000 --- a/include/exec/watchpoint.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * CPU watchpoints - * - * Copyright (c) 2012 SUSE LINUX Products GmbH - * SPDX-License-Identifier: LGPL-2.1-or-later - */ - -#ifndef EXEC_WATCHPOINT_H -#define EXEC_WATCHPOINT_H - -int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, - int flags, CPUWatchpoint **watchpoint); -int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, - vaddr len, int flags); -void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint= ); -void cpu_watchpoint_remove_all(CPUState *cpu, int mask); - -#endif /* EXEC_WATCHPOINT_H */ diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index f6f17df9e64..9648ba8f6f6 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -28,6 +28,7 @@ #include "exec/memattrs.h" #include "exec/mmu-access-type.h" #include "exec/tlb-common.h" +#include "accel/tcg/watchpoint.h" #include "qapi/qapi-types-machine.h" #include "qapi/qapi-types-run-state.h" #include "qemu/bitmap.h" @@ -84,8 +85,6 @@ DECLARE_CLASS_CHECKERS(CPUClass, CPU, typedef struct ArchCPU CpuInstanceType; \ OBJECT_DECLARE_TYPE(ArchCPU, CpuClassType, CPU_MODULE_OBJ_NAME); =20 -typedef struct CPUWatchpoint CPUWatchpoint; - /* see physmem.c */ struct CPUAddressSpace; =20 diff --git a/target/arm/internals.h b/target/arm/internals.h index 9cd4bf74efb..e7d83836242 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -27,7 +27,7 @@ =20 #include "exec/hwaddr.h" #include "exec/vaddr.h" -#include "exec/breakpoint.h" +#include "accel/tcg/watchpoint.h" #include "accel/tcg/tb-cpu-state.h" #include "hw/core/registerfields.h" #include "tcg/tcg-gvec-desc.h" diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 58f315ffcf5..f468bcbb7fa 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -18,7 +18,7 @@ #ifndef PPC_INTERNAL_H #define PPC_INTERNAL_H =20 -#include "exec/breakpoint.h" +#include "accel/tcg/watchpoint.h" #include "hw/core/registerfields.h" #include "exec/page-protection.h" #include "accel/tcg/tb-cpu-state.h" diff --git a/target/riscv/debug.h b/target/riscv/debug.h index f76b8f944a2..7aa9dfd89f9 100644 --- a/target/riscv/debug.h +++ b/target/riscv/debug.h @@ -22,7 +22,7 @@ #ifndef RISCV_DEBUG_H #define RISCV_DEBUG_H =20 -#include "exec/breakpoint.h" +#include "accel/tcg/watchpoint.h" =20 #define RV_MAX_TRIGGERS 2 =20 diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index c30073326a3..922fc503874 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -28,6 +28,7 @@ #include "system/physmem.h" #include "accel/tcg/cpu-ldst-common.h" #include "accel/tcg/cpu-mmu-index.h" +#include "accel/tcg/watchpoint.h" #include "exec/cputlb.h" #include "exec/tb-flush.h" #include "system/ramblock.h" diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 3bd98005042..2a6423aab8d 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -38,7 +38,7 @@ #include "exec/hwaddr.h" #include "exec/tb-flush.h" #include "exec/translation-block.h" -#include "exec/watchpoint.h" +#include "accel/tcg/watchpoint.h" #include "gdbstub/enums.h" =20 #include "hw/core/cpu.h" diff --git a/accel/tcg/user-exec-stub.c b/accel/tcg/user-exec-stub.c index 28286e11a60..a5e2534f2bf 100644 --- a/accel/tcg/user-exec-stub.c +++ b/accel/tcg/user-exec-stub.c @@ -1,8 +1,7 @@ #include "qemu/osdep.h" #include "hw/core/cpu.h" -#include "accel/tcg/cpu-ops.h" #include "exec/replay-core.h" -#include "exec/watchpoint.h" +#include "accel/tcg/watchpoint.h" #include "internal-common.h" =20 void cpu_resume(CPUState *cpu) diff --git a/accel/tcg/watchpoint.c b/accel/tcg/watchpoint.c index cfb37a49e72..0d9de0fca2e 100644 --- a/accel/tcg/watchpoint.c +++ b/accel/tcg/watchpoint.c @@ -19,10 +19,14 @@ =20 #include "qemu/osdep.h" #include "qemu/main-loop.h" -#include "exec/breakpoint.h" +#include "qemu/error-report.h" +#include "accel/tcg/watchpoint.h" #include "exec/cpu-interrupt.h" +#include "exec/cputlb.h" #include "exec/page-protection.h" +#include "exec/target_page.h" #include "exec/translation-block.h" +#include "accel/tcg/watchpoint.h" #include "system/tcg.h" #include "system/replay.h" #include "accel/tcg/cpu-ops.h" @@ -139,3 +143,80 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, v= addr len, } } } + +/* Add a watchpoint. */ +int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, + int flags, CPUWatchpoint **watchpoint) +{ + CPUWatchpoint *wp; + vaddr in_page; + + /* forbid ranges which are empty or run off the end of the address spa= ce */ + if (len =3D=3D 0 || (addr + len - 1) < addr) { + error_report("tried to set invalid watchpoint at %" + VADDR_PRIx ", len=3D%" VADDR_PRIu, addr, len); + return -EINVAL; + } + wp =3D g_malloc(sizeof(*wp)); + + wp->vaddr =3D addr; + wp->len =3D len; + wp->flags =3D flags; + + /* keep all GDB-injected watchpoints in front */ + if (flags & BP_GDB) { + QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry); + } else { + QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry); + } + + in_page =3D -(addr | TARGET_PAGE_MASK); + if (len <=3D in_page) { + tlb_flush_page(cpu, addr); + } else { + tlb_flush(cpu); + } + + if (watchpoint) { + *watchpoint =3D wp; + } + return 0; +} + +/* Remove a specific watchpoint. */ +int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len, + int flags) +{ + CPUWatchpoint *wp; + + QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { + if (addr =3D=3D wp->vaddr && len =3D=3D wp->len + && flags =3D=3D (wp->flags & ~BP_WATCHPOINT_HIT)) { + cpu_watchpoint_remove_by_ref(cpu, wp); + return 0; + } + } + return -ENOENT; +} + +/* Remove a specific watchpoint by reference. */ +void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint) +{ + QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry); + + tlb_flush_page(cpu, watchpoint->vaddr); + + g_free(watchpoint); +} + +/* Remove all matching watchpoints. */ +void cpu_watchpoint_remove_all(CPUState *cpu, int mask) +{ + CPUWatchpoint *wp, *next; + + QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) { + if (wp->flags & mask) { + cpu_watchpoint_remove_by_ref(cpu, wp); + } + } +} diff --git a/system/watchpoint.c b/system/watchpoint.c deleted file mode 100644 index 21d0bb36cae..00000000000 --- a/system/watchpoint.c +++ /dev/null @@ -1,102 +0,0 @@ -/* - * CPU watchpoints - * - * Copyright (c) 2003 Fabrice Bellard - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see . - */ - -#include "qemu/osdep.h" -#include "qemu/error-report.h" -#include "exec/cputlb.h" -#include "exec/target_page.h" -#include "exec/watchpoint.h" -#include "hw/core/cpu.h" - -/* Add a watchpoint. */ -int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, - int flags, CPUWatchpoint **watchpoint) -{ - CPUWatchpoint *wp; - vaddr in_page; - - /* forbid ranges which are empty or run off the end of the address spa= ce */ - if (len =3D=3D 0 || (addr + len - 1) < addr) { - error_report("tried to set invalid watchpoint at %" - VADDR_PRIx ", len=3D%" VADDR_PRIu, addr, len); - return -EINVAL; - } - wp =3D g_malloc(sizeof(*wp)); - - wp->vaddr =3D addr; - wp->len =3D len; - wp->flags =3D flags; - - /* keep all GDB-injected watchpoints in front */ - if (flags & BP_GDB) { - QTAILQ_INSERT_HEAD(&cpu->watchpoints, wp, entry); - } else { - QTAILQ_INSERT_TAIL(&cpu->watchpoints, wp, entry); - } - - in_page =3D -(addr | TARGET_PAGE_MASK); - if (len <=3D in_page) { - tlb_flush_page(cpu, addr); - } else { - tlb_flush(cpu); - } - - if (watchpoint) { - *watchpoint =3D wp; - } - return 0; -} - -/* Remove a specific watchpoint. */ -int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len, - int flags) -{ - CPUWatchpoint *wp; - - QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { - if (addr =3D=3D wp->vaddr && len =3D=3D wp->len - && flags =3D=3D (wp->flags & ~BP_WATCHPOINT_HIT)) { - cpu_watchpoint_remove_by_ref(cpu, wp); - return 0; - } - } - return -ENOENT; -} - -/* Remove a specific watchpoint by reference. */ -void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint) -{ - QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry); - - tlb_flush_page(cpu, watchpoint->vaddr); - - g_free(watchpoint); -} - -/* Remove all matching watchpoints. */ -void cpu_watchpoint_remove_all(CPUState *cpu, int mask) -{ - CPUWatchpoint *wp, *next; - - QTAILQ_FOREACH_SAFE(wp, &cpu->watchpoints, entry, next) { - if (wp->flags & mask) { - cpu_watchpoint_remove_by_ref(cpu, wp); - } - } -} diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c index 579516e1541..9dc8d47f664 100644 --- a/target/arm/debug_helper.c +++ b/target/arm/debug_helper.c @@ -11,7 +11,7 @@ #include "internals.h" #include "cpu-features.h" #include "cpregs.h" -#include "exec/watchpoint.h" +#include "accel/tcg/watchpoint.h" #include "system/tcg.h" =20 #define HELPER_H "tcg/helper.h" diff --git a/target/arm/tcg/mte_helper.c b/target/arm/tcg/mte_helper.c index bb48fe359b8..f71ed4d9178 100644 --- a/target/arm/tcg/mte_helper.c +++ b/target/arm/tcg/mte_helper.c @@ -31,9 +31,9 @@ #endif #include "accel/tcg/cpu-ldst.h" #include "accel/tcg/probe.h" +#include "accel/tcg/watchpoint.h" #include "exec/helper-proto.h" #include "exec/tlb-flags.h" -#include "accel/tcg/cpu-ops.h" #include "qapi/error.h" #include "qemu/guest-random.h" #include "mte_helper.h" diff --git a/target/arm/tcg/sve_helper.c b/target/arm/tcg/sve_helper.c index c442fcb540d..7aa88fdeea0 100644 --- a/target/arm/tcg/sve_helper.c +++ b/target/arm/tcg/sve_helper.c @@ -31,8 +31,8 @@ #include "sve_ldst_internal.h" #include "accel/tcg/cpu-ldst.h" #include "accel/tcg/helper-retaddr.h" -#include "accel/tcg/cpu-ops.h" #include "accel/tcg/probe.h" +#include "accel/tcg/watchpoint.h" #ifdef CONFIG_USER_ONLY #include "user/page-protection.h" #endif diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 9831e2bc210..e7273d67369 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -36,7 +36,7 @@ #include "standard-headers/asm-x86/kvm_para.h" #include "hw/core/qdev-properties.h" #include "hw/i386/topology.h" -#include "exec/watchpoint.h" +#include "accel/tcg/watchpoint.h" #ifndef CONFIG_USER_ONLY #include "confidential-guest.h" #include "system/reset.h" diff --git a/target/i386/machine.c b/target/i386/machine.c index c9139612813..863769b9c9b 100644 --- a/target/i386/machine.c +++ b/target/i386/machine.c @@ -7,7 +7,7 @@ #include "hw/i386/x86.h" #include "kvm/kvm_i386.h" #include "hw/xen/xen.h" -#include "exec/watchpoint.h" +#include "accel/tcg/watchpoint.h" #include "system/kvm.h" #include "system/kvm_xen.h" #include "system/tcg.h" diff --git a/target/i386/tcg/system/bpt_helper.c b/target/i386/tcg/system/b= pt_helper.c index aebb5caac37..f722774bb91 100644 --- a/target/i386/tcg/system/bpt_helper.c +++ b/target/i386/tcg/system/bpt_helper.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" -#include "exec/watchpoint.h" +#include "accel/tcg/watchpoint.h" #include "tcg/helper-tcg.h" =20 =20 diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c index 9cb3f00aa88..25d950aeedc 100644 --- a/target/ppc/cpu.c +++ b/target/ppc/cpu.c @@ -22,7 +22,7 @@ #include "cpu-models.h" #include "cpu-qom.h" #include "exec/log.h" -#include "exec/watchpoint.h" +#include "accel/tcg/watchpoint.h" #include "fpu/softfloat-helpers.h" #include "mmu-hash64.h" #include "helper_regs.h" diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 929254827d6..cca2096fb57 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -40,7 +40,7 @@ #include "qemu/cutils.h" #include "disas/capstone.h" #include "fpu/softfloat.h" -#include "exec/watchpoint.h" +#include "accel/tcg/watchpoint.h" #include "helper_regs.h" #include "internal.h" #include "spr_common.h" diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index c4fb68b5de8..1db4a6fc36f 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -29,7 +29,7 @@ #include "system/memory.h" #include "instmap.h" #include "tcg/tcg-op.h" -#include "accel/tcg/cpu-ops.h" +#include "accel/tcg/watchpoint.h" #include "trace.h" #include "semihosting/common-semi.h" #include "exec/icount.h" diff --git a/target/riscv/debug.c b/target/riscv/debug.c index 56644667497..f3a72dd4b7a 100644 --- a/target/riscv/debug.c +++ b/target/riscv/debug.c @@ -29,7 +29,7 @@ #include "cpu.h" #include "trace.h" #include "exec/helper-proto.h" -#include "exec/watchpoint.h" +#include "accel/tcg/watchpoint.h" #include "system/cpu-timers.h" #include "exec/icount.h" =20 diff --git a/target/s390x/helper.c b/target/s390x/helper.c index 8d1e03f6768..7dede1e7ed3 100644 --- a/target/s390x/helper.c +++ b/target/s390x/helper.c @@ -28,7 +28,7 @@ #include "system/memory.h" #include "system/runstate.h" #include "exec/target_page.h" -#include "exec/watchpoint.h" +#include "accel/tcg/watchpoint.h" =20 void s390x_tod_timer(void *opaque) { diff --git a/target/s390x/tcg/debug.c b/target/s390x/tcg/debug.c index 12ae95d4fe8..74c1d5f3242 100644 --- a/target/s390x/tcg/debug.c +++ b/target/s390x/tcg/debug.c @@ -10,7 +10,7 @@ */ =20 #include "qemu/osdep.h" -#include "exec/watchpoint.h" +#include "accel/tcg/watchpoint.h" #include "target/s390x/cpu.h" #include "tcg_s390x.h" =20 diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c index d4a096f5998..1485dbf83be 100644 --- a/target/s390x/tcg/excp_helper.c +++ b/target/s390x/tcg/excp_helper.c @@ -24,7 +24,7 @@ #include "exec/helper-proto.h" #include "exec/cputlb.h" #include "exec/target_page.h" -#include "exec/watchpoint.h" +#include "accel/tcg/watchpoint.h" #include "s390x-internal.h" #include "tcg_s390x.h" #ifndef CONFIG_USER_ONLY diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index 2972b7ddb97..b94d12ee7f8 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -33,6 +33,7 @@ #include "exec/tlb-flags.h" #include "accel/tcg/cpu-ops.h" #include "accel/tcg/helper-retaddr.h" +#include "accel/tcg/watchpoint.h" #include "qemu/int128.h" #include "qemu/atomic128.h" =20 diff --git a/target/xtensa/dbg_helper.c b/target/xtensa/dbg_helper.c index 3b91f7c38ac..25341dc0a71 100644 --- a/target/xtensa/dbg_helper.c +++ b/target/xtensa/dbg_helper.c @@ -30,7 +30,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" -#include "exec/watchpoint.h" +#include "accel/tcg/watchpoint.h" #include "system/address-spaces.h" =20 void HELPER(wsr_ibreakenable)(CPUXtensaState *env, uint32_t v) diff --git a/system/meson.build b/system/meson.build index 4b69ef0f5fb..d24efbb44ba 100644 --- a/system/meson.build +++ b/system/meson.build @@ -29,7 +29,6 @@ system_ss.add(files( 'runstate-hmp-cmds.c', 'runstate.c', 'tpm-hmp-cmds.c', - 'watchpoint.c', )) =20 if have_tpm --=20 2.52.0