From nobody Thu Jan 8 13:32:08 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1767493823194770.0299348853752; Sat, 3 Jan 2026 18:30:23 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vcDry-0002w4-Iu; Sat, 03 Jan 2026 21:29:26 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vcDrx-0002v4-1a for qemu-devel@nongnu.org; Sat, 03 Jan 2026 21:29:25 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vcDrt-00072k-JT for qemu-devel@nongnu.org; Sat, 03 Jan 2026 21:29:24 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8BxHMN10Flp90oFAA--.16228S3; Sun, 04 Jan 2026 10:29:09 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJAxWcFy0Flp2_ULAA--.13602S3; Sun, 04 Jan 2026 10:29:09 +0800 (CST) From: Bibo Mao To: Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org Subject: [PATCH v2 1/4] target/loongarch: Add detailed information with CPU Product ID Date: Sun, 4 Jan 2026 10:29:02 +0800 Message-Id: <20260104022905.2120787-2-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260104022905.2120787-1-maobibo@loongson.cn> References: <20260104022905.2120787-1-maobibo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJAxWcFy0Flp2_ULAA--.13602S3 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1767493825228154100 Content-Type: text/plain; charset="utf-8" CPUCFG0 is LoongArch CPU Product ID, it is a combination of Vendor ID, Series ID and Product ID, here is the layout: +-------------+----------------+------------+----------------+ | Reserved | Vendor ID | Series ID | Product ID | +-------------+----------------+------------+----------------+ 31 24 23 16 15 12 11 0 Here adds detailed information with CPUCFG0, it is convenient to add such information with host or LA664 CPU type in future. Signed-off-by: Bibo Mao Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/loongarch/cpu.c | 12 ++++++++++-- target/loongarch/cpu.h | 10 +++++++++- 2 files changed, 19 insertions(+), 3 deletions(-) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index e01e044239..ead1dccd0b 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -278,8 +278,12 @@ static void loongarch_la464_initfn(Object *obj) } =20 cpu->dtb_compatible =3D "loongarch,Loongson-3A5000"; - env->cpucfg[0] =3D 0x14c010; /* PRID */ + data =3D FIELD_DP32(data, CPUCFG0, PRID, 0x10); + data =3D FIELD_DP32(data, CPUCFG0, SERID, PRID_SERIES_LA464); + data =3D FIELD_DP32(data, CPUCFG0, VENID, PRID_VENDOR_LOONGSON); + env->cpucfg[0] =3D data; =20 + data =3D 0; data =3D FIELD_DP32(data, CPUCFG1, ARCH, 2); data =3D FIELD_DP32(data, CPUCFG1, PGMMU, 1); data =3D FIELD_DP32(data, CPUCFG1, IOCSR, 1); @@ -385,8 +389,12 @@ static void loongarch_la132_initfn(Object *obj) } =20 cpu->dtb_compatible =3D "loongarch,Loongson-1C103"; - env->cpucfg[0] =3D 0x148042; /* PRID */ + data =3D FIELD_DP32(data, CPUCFG0, PRID, 0x42); + data =3D FIELD_DP32(data, CPUCFG0, SERID, PRID_SERIES_LA132); + data =3D FIELD_DP32(data, CPUCFG0, VENID, PRID_VENDOR_LOONGSON); + env->cpucfg[0] =3D data; =20 + data =3D 0; data =3D FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */ data =3D FIELD_DP32(data, CPUCFG1, PGMMU, 1); data =3D FIELD_DP32(data, CPUCFG1, IOCSR, 1); diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index 92af68ea7f..a258b22141 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -97,7 +97,15 @@ FIELD(FCSR0, CAUSE, 24, 5) #define EXCCODE_DBP EXCODE(26, 0) /* Reserved subcode use= d for debug */ =20 /* cpucfg[0] bits */ -FIELD(CPUCFG0, PRID, 0, 32) +FIELD(CPUCFG0, PRID, 0, 12) +FIELD(CPUCFG0, SERID, 12, 4) +FIELD(CPUCFG0, VENID, 16, 8) +#define PRID_SERIES_LA132 0x8 /* Loongson 32bit */ +#define PRID_SERIES_LA264 0xa /* Loongson 64bit, 2-issue */ +#define PRID_SERIES_LA364 0xb /* Loongson 64bit, 3-issue */ +#define PRID_SERIES_LA464 0xc /* Loongson 64bit, 4-issue */ +#define PRID_SERIES_LA664 0xd /* Loongson 64bit, 6-issue */ +#define PRID_VENDOR_LOONGSON 0x14 =20 /* cpucfg[1] bits */ FIELD(CPUCFG1, ARCH, 0, 2) --=20 2.39.3