From nobody Thu Jan 8 13:00:07 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1767367024; cv=none; d=zohomail.com; s=zohoarc; b=iIHnej+83/PenWF3cp6fuJZKvKVkAUQj4UCY2kV2Deecj7iu1/In9r7aINUtbEiTTnWevnDGH6MKMJqOL5ccfFfAR0SBntdODGJH3pByT4iu2ZsPw1jB4JdJlWJ83ehAPcpsHPzFFyRpw5qoeBK/4pfHt9S29+KRVSvE3odAdQs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767367024; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=oXPzpuzvKtkE1XDwlCoJA03JRiFRX74Js5+hRf2X+84=; b=aPIC+bGRRQCaI4SrWiUvFOUm3TXQwhH0/jvTx+dE10CQuTiI7IECgY2AvgXsuCQUoZEBhB2o3AqBBG+YA/c2DxzBXKiqB72HictjnkFWYjMtB75afC2CumXOK8bqCG7gnpcDQvHXaWwqGt3ejWfc7ek/EdcbYZpa8J57gKLGxAc= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1767367024676825.132928009026; Fri, 2 Jan 2026 07:17:04 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vbgtc-0003zl-3O; Fri, 02 Jan 2026 10:16:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vbgta-0003rW-L6 for qemu-devel@nongnu.org; Fri, 02 Jan 2026 10:16:54 -0500 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vbgtW-0004S3-PC for qemu-devel@nongnu.org; Fri, 02 Jan 2026 10:16:53 -0500 Received: from mail.maildlp.com (unknown [172.18.224.150]) by frasgout.his.huawei.com (SkyGuard) with ESMTPS id 4djS203fXmzHnGcX; Fri, 2 Jan 2026 23:15:52 +0800 (CST) Received: from dubpeml100005.china.huawei.com (unknown [7.214.146.113]) by mail.maildlp.com (Postfix) with ESMTPS id 60D8140565; Fri, 2 Jan 2026 23:16:49 +0800 (CST) Received: from SecurePC-101-06.huawei.com (10.122.19.247) by dubpeml100005.china.huawei.com (7.214.146.113) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.36; Fri, 2 Jan 2026 15:16:48 +0000 To: Michael Tsirkin , , , CC: , , Ravi Shankar Subject: [PATCH qemu v2 3/5] hw/cxl/events: Updates for rev3.2 general media event record Date: Fri, 2 Jan 2026 15:15:10 +0000 Message-ID: <20260102151512.460766-4-Jonathan.Cameron@huawei.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20260102151512.460766-1-Jonathan.Cameron@huawei.com> References: <20260102151512.460766-1-Jonathan.Cameron@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.122.19.247] X-ClientProxiedBy: lhrpeml500012.china.huawei.com (7.191.174.4) To dubpeml100005.china.huawei.com (7.214.146.113) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=185.176.79.56; envelope-from=jonathan.cameron@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jonathan Cameron From: Jonathan Cameron via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1767367025701158500 Content-Type: text/plain; charset="utf-8" From: Shiju Jose CXL spec rev3.2 section 8.2.10.2.1.1 Table 8-57, general media event table has updated with following new fields. 1. Advanced Programmable Corrected Memory Error Threshold Event Flags 2. Corrected Memory Error Count at Event 3. Memory Event Sub-Type 4. Support for component ID in the PLDM format. Add updates for the above spec changes in the CXL general media event reporting and QMP command to inject general media event. Signed-off-by: Shiju Jose Signed-off-by: Jonathan Cameron --- qapi/cxl.json | 15 ++++++++++++++- include/hw/cxl/cxl_events.h | 7 +++++-- hw/mem/cxl_type3.c | 29 +++++++++++++++++++++++++++++ hw/mem/cxl_type3_stubs.c | 6 ++++++ 4 files changed, 54 insertions(+), 3 deletions(-) diff --git a/qapi/cxl.json b/qapi/cxl.json index b3c2ac9575..c5ecbe9646 100644 --- a/qapi/cxl.json +++ b/qapi/cxl.json @@ -93,6 +93,16 @@ # @component-id: Device specific component identifier for the event. # May describe a field replaceable sub-component of the device. # +# @is-comp-id-pldm: This flag specifies whether the device-specific +# component identifier format follows PLDM. +# +# @cme-ev-flags: Advanced programmable corrected memory error +# threshold event flags. +# +# @cme-count: Corrected memory error count at event. +# +# @sub-type: Memory event sub-type. +# # Since: 8.1 ## { 'struct': 'CXLGeneralMediaEvent', @@ -100,7 +110,10 @@ 'data': { 'dpa': 'uint64', 'descriptor': 'uint8', 'type': 'uint8', 'transaction-type': 'uint8', '*channel': 'uint8', '*rank': 'uint8', - '*device': 'uint32', '*component-id': 'str' } } + '*device': 'uint32', '*component-id': 'str', + '*is-comp-id-pldm':'bool', + '*cme-ev-flags':'uint8', '*cme-count':'uint32', + 'sub-type':'uint8' } } =20 ## # @cxl-inject-general-media-event: diff --git a/include/hw/cxl/cxl_events.h b/include/hw/cxl/cxl_events.h index 4d9cfdb621..352f9891bd 100644 --- a/include/hw/cxl/cxl_events.h +++ b/include/hw/cxl/cxl_events.h @@ -115,10 +115,10 @@ typedef struct CXLEventInterruptPolicy { =20 /* * General Media Event Record - * CXL r3.1 Section 8.2.9.2.1.1; Table 8-45 + * CXL r3.2 Section 8.2.10.2.1.1; Table 8-57 */ #define CXL_EVENT_GEN_MED_COMP_ID_SIZE 0x10 -#define CXL_EVENT_GEN_MED_RES_SIZE 0x2e +#define CXL_EVENT_GEN_MED_RES_SIZE 0x29 typedef struct CXLEventGenMedia { CXLEventRecordHdr hdr; uint64_t phys_addr; @@ -130,6 +130,9 @@ typedef struct CXLEventGenMedia { uint8_t rank; uint8_t device[3]; uint8_t component_id[CXL_EVENT_GEN_MED_COMP_ID_SIZE]; + uint8_t cme_ev_flags; + uint8_t cme_count[3]; + uint8_t sub_type; uint8_t reserved[CXL_EVENT_GEN_MED_RES_SIZE]; } QEMU_PACKED CXLEventGenMedia; =20 diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 371bd4dc6a..d03a9f0edc 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -1646,6 +1646,11 @@ static const QemuUUID memory_module_uuid =3D { #define CXL_GMER_VALID_RANK BIT(1) #define CXL_GMER_VALID_DEVICE BIT(2) #define CXL_GMER_VALID_COMPONENT BIT(3) +#define CXL_GMER_VALID_COMPONENT_ID_FORMAT BIT(4) + +#define CXL_GMER_EV_DESC_UCE BIT(0) +#define CXL_GMER_EV_DESC_THRESHOLD_EVENT BIT(1) +#define CXL_GMER_EV_DESC_POISON_LIST_OVERFLOW_EVENT BIT(2) =20 static int ct3d_qmp_cxl_event_log_enc(CxlEventLog log) { @@ -1677,6 +1682,12 @@ void qmp_cxl_inject_general_media_event(const char *= path, CxlEventLog log, bool has_rank, uint8_t rank, bool has_device, uint32_t device, const char *component_id, + bool has_comp_id_pldm, + bool is_comp_id_pldm, + bool has_cme_ev_flags, + uint8_t cme_ev_flags, + bool has_cme_count, uint32_t cme_c= ount, + uint8_t sub_type, Error **errp) { Object *obj =3D object_resolve_path(path, NULL); @@ -1737,10 +1748,28 @@ void qmp_cxl_inject_general_media_event(const char = *path, CxlEventLog log, strncpy((char *)gem.component_id, component_id, sizeof(gem.component_id) - 1); valid_flags |=3D CXL_GMER_VALID_COMPONENT; + if (has_comp_id_pldm && is_comp_id_pldm) { + valid_flags |=3D CXL_GMER_VALID_COMPONENT_ID_FORMAT; + } } =20 stw_le_p(&gem.validity_flags, valid_flags); =20 + if (has_cme_ev_flags) { + gem.cme_ev_flags =3D cme_ev_flags; + } else { + gem.cme_ev_flags =3D 0; + } + + if (has_cme_count) { + descriptor |=3D CXL_GMER_EV_DESC_THRESHOLD_EVENT; + st24_le_p(gem.cme_count, cme_count); + } else { + st24_le_p(gem.cme_count, 0); + } + + gem.sub_type =3D sub_type; + if (cxl_event_insert(cxlds, enc_log, (CXLEventRecordRaw *)&gem)) { cxl_event_irq_assert(ct3d); } diff --git a/hw/mem/cxl_type3_stubs.c b/hw/mem/cxl_type3_stubs.c index 91b1478114..2047e97846 100644 --- a/hw/mem/cxl_type3_stubs.c +++ b/hw/mem/cxl_type3_stubs.c @@ -27,6 +27,12 @@ void qmp_cxl_inject_general_media_event(const char *path= , CxlEventLog log, bool has_rank, uint8_t rank, bool has_device, uint32_t device, const char *component_id, + bool has_comp_id_pldm, + bool is_comp_id_pldm, + bool has_cme_ev_flags, + uint8_t cme_ev_flags, + bool has_cme_count, uint32_t cme_c= ount, + uint8_t sub_type, Error **errp) {} =20 void qmp_cxl_inject_dram_event(const char *path, CxlEventLog log, --=20 2.48.1