From nobody Thu Jan 8 13:17:10 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=unpredictable.fr ARC-Seal: i=1; a=rsa-sha256; t=1767053523; cv=none; d=zohomail.com; s=zohoarc; b=EASGu3O9bsD3oenVAu8TnXdzfhSCeNfzYiJh4GJeDlLUblPjbxpnTJJbOtxq3UUrEyxF4HyAVdvhonwapeIC+9O/5NkAVCbvWcb6lw4IHwcTClz4WXE7DWqmfP0n//4Gg6AmtPaz2FY+aKAkxIzb1zhIXUBfK2lXUbJU8aESTrg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767053523; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=3K9IlVyeD+k0Vd5kBLMjDIDGkWQRJk1Cb7obcyivtmA=; b=DHqCbySmYwtPh5+n3oMBu7M8/uH91QVMBR4UwPqhIn/0H8J95J925MYWLweERDuAmCSrnbDDJh0IJOO2Fb2888b2XgBX1mcTCFz+Tn4pXe63KL8zNfMaMjoesPJs8x0fwKOBRulKWX9UCyf4hx6sRLoLxqm+QSZAHiKD6fsOjiA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1767053523864215.49465714935366; Mon, 29 Dec 2025 16:12:03 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vaNKM-0003vP-Bp; Mon, 29 Dec 2025 19:11:06 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vaNFU-0007SI-Fl for qemu-devel@nongnu.org; Mon, 29 Dec 2025 19:06:05 -0500 Received: from p-east2-cluster2-host2-snip4-10.eps.apple.com ([57.103.78.23] helo=outbound.st.icloud.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vaNFK-00043O-Od for qemu-devel@nongnu.org; Mon, 29 Dec 2025 19:05:58 -0500 Received: from outbound.st.icloud.com (unknown [127.0.0.2]) by p00-icloudmta-asmtp-us-east-1a-60-percent-9 (Postfix) with ESMTPS id 6CA94180010E; Tue, 30 Dec 2025 00:05:46 +0000 (UTC) Received: from localhost.localdomain (unknown [17.42.251.67]) by p00-icloudmta-asmtp-us-east-1a-60-percent-9 (Postfix) with ESMTPSA id 5B1201800470; Tue, 30 Dec 2025 00:05:40 +0000 (UTC) Dkim-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr; s=sig1; bh=3K9IlVyeD+k0Vd5kBLMjDIDGkWQRJk1Cb7obcyivtmA=; h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme; b=LQLl9ZMsdXkB3s8X1XoVpn1yDoh+U94HZcHpog1fboz4s0LTTEBV78K+Jiemnu1a5I/e2LrDi5UvGCxASNbJSo4wGlmmD7xK6y026yp9v6S4/JVMuwK/8UD3Ya7RLIzEVkkgPy9KikiV5u68iwMs3xZfJ8lv1+Mk/hZfih5mVrOPR0S7vumqKuY4+LFZQyKdj/ihxZQV1VO+ASA+Rx5JUluthjTVRxZ/APV1BlaX2shth+QhouAa7ywzbQnxfP+N2ipNPAj1bjyTU0pB8ITwAdHFccOsbwAe05tK0OBG6Mk7hfVvCVTHD7uIMIFoTIxQrXt/JffSqpG6vMX8G59N1w== mail-alias-created-date: 1752046281608 From: Mohamed Mediouni To: mohamed@unpredictable.fr, qemu-devel@nongnu.org Cc: Yanan Wang , =?UTF-8?q?Alex=20Benn=C3=A9e?= , "Michael S. Tsirkin" , Akihiko Odaki , Eduardo Habkost , Mads Ynddal , Roman Bolshakov , Peter Xu , Shannon Zhao , Pedro Barbuda , Peter Maydell , Cameron Esfahani , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Igor Mammedov , Zhao Liu , Phil Dennis-Jordan , qemu-arm@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ani Sinha , Paolo Bonzini , Alexander Graf , Marcel Apfelbaum , Richard Henderson , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Pierrick Bouvier Subject: [PATCH v13 19/28] whpx: arm64: clamp down IPA size Date: Tue, 30 Dec 2025 01:03:51 +0100 Message-ID: <20251230000401.72124-20-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251230000401.72124-1-mohamed@unpredictable.fr> References: <20251230000401.72124-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjI5MDIyMiBTYWx0ZWRfX5cEkKX/tnHkf wVHet0C9z0fbqEU/tXXYdbCp0yD5VnNr3FFrBfFnEtWBrkQ9ZqEinGm6KALvYBk2YnO3ATOCE/s 2S93ilwqd1JmETY93DGEY2QYEc6+QiMRxg44cJ0PWC57OFG0NZV2aLb5ApxOAPCBI8ofZHe4oRl Hi+xcDs/jTcRv5j6/0voYN0iLbDv4T+PK0fouH9FjsKcvpkMwCqUgA0Nk2OL2jeN0HTDbX3WTiF WoQIU8XVKuiPWHlLSOEbh8uQGmvBfcTCVlyoV4t6hk402LRQIxUhPC/EjekBPavln2LXI9N/PyH sgZhRe2ncOf6nKCp2Aw X-Proofpoint-ORIG-GUID: Z7BXYmIRQ0pOl168LM_XCGxeuyTwjF7S X-Authority-Info: v=2.4 cv=PfTyRyhd c=1 sm=1 tr=0 ts=6953175d cx=c_apl:c_pps a=YrL12D//S6tul8v/L+6tKg==:117 a=YrL12D//S6tul8v/L+6tKg==:17 a=wP3pNCr1ah4A:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=wAo57kR77d7e8uaIccUA:9 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: Z7BXYmIRQ0pOl168LM_XCGxeuyTwjF7S X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-29_07,2025-12-29_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 phishscore=0 mlxscore=0 adultscore=0 mlxlogscore=999 bulkscore=0 clxscore=1030 suspectscore=0 malwarescore=0 spamscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512290222 X-JNJ: AAAAAAABsujI6vq/qJ9egnrta+35dLgym5oCKnu5TtZLAtdBBuSYZ11si/YrmB9nppT3R2IxoKUrwuSe2qlpslqvGgNfmb3c+T1B69+Zw5sH9NgoHhAsJYkaeNijXOmQsfqhm4k5KvAVR2EvFVJRiEekMimfQJ1/HrUrTVUQFYl3iVaqIYn7iOibXhP1WC+NAxTwppXyYg4LROJI5Zy/EphXuPyDN45tD9gjJeU1vuqUTWY7XymJApNDUZMIkhnlbaZEJa5uFWahqwhgiy2GuurHGoqbcGwuiD4SboEOI6J9FTakCPLohiwcECTX5ffuzwIBZKbzncibS/WhUvWMednLNKrRLofitZ4em2pcB6T08xZu+KRDHbVGV7JKY1jrair3r550ZQNknDoz6zJYpXlEzN7wZ5j0j2Jq46BF+2DxsaAbnsdaF14yYQqBnx3107CnvluUSJcsq/wti+rkHCnXf7pa7LBVxwctR5ImKopWn3YuVkRgw2mx3l3Cb4GzXbIvLbr/01puORuKvypaX5ekCGqvF80o78Ko8gBM57k01aO96LEBCXN0dTbY5q3sZ/oaFoaCM8v/60n8hw7m9rdNTbyPjqhK5NO8ybP4XJEnMyMI8pATWBT6YS7GSxBvoeZJKmrt6IydMw5ve8j70PLOjcylaZAAxG3ef+fRRlOR/UMgUWeYDcVq8sGOrH5HRny71t4enyQhYT2w5czwklW9ooUUERZvBWD7ufn8tlEKUqvYutND8PXJbkIfwqztJ0Lpnw7mevKy/BHCTs+T6usOJeDuAd+DE6dRo/6qiZni28S+1xoxudTBBffSD8yk6xfiNNtiggYeMpuRZL1TAcXhvrRWWD+H8m6kqlZomjyqnq6BjvcHzQJtad4kn62UmRLOj4TfAA1gHOn7Mb3mBvBRgu6A7PozqGGzFDr3mweV+MJhYdrVKAOQ4w== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.78.23; envelope-from=mohamed@unpredictable.fr; helo=outbound.st.icloud.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @unpredictable.fr) X-ZM-MESSAGEID: 1767053524672158501 Content-Type: text/plain; charset="utf-8" Code taken from HVF and adapted for WHPX use. Note that WHPX doesn't have a default vs maximum IPA distinction. Signed-off-by: Mohamed Mediouni Reviewed-by: Pierrick Bouvier --- hw/arm/virt.c | 32 ++++++++++++++++++++++++++ include/hw/core/boards.h | 1 + target/arm/whpx/meson.build | 2 ++ target/arm/whpx/whpx-all.c | 45 +++++++++++++++++++++++++++++++++++++ target/arm/whpx/whpx-stub.c | 15 +++++++++++++ target/arm/whpx_arm.h | 16 +++++++++++++ 6 files changed, 111 insertions(+) create mode 100644 target/arm/whpx/whpx-stub.c create mode 100644 target/arm/whpx_arm.h diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 01fc1f9ac9..86d725cc76 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -72,6 +72,7 @@ #include "hw/core/irq.h" #include "kvm_arm.h" #include "hvf_arm.h" +#include "whpx_arm.h" #include "hw/firmware/smbios.h" #include "qapi/visitor.h" #include "qapi/qapi-visit-common.h" @@ -3315,6 +3316,36 @@ static int virt_kvm_type(MachineState *ms, const cha= r *type_str) return fixed_ipa ? 0 : requested_pa_size; } =20 +static int virt_whpx_get_physical_address_range(MachineState *ms) +{ + VirtMachineState *vms =3D VIRT_MACHINE(ms); + + int max_ipa_size =3D whpx_arm_get_ipa_bit_size(); + + /* We freeze the memory map to compute the highest gpa */ + virt_set_memmap(vms, max_ipa_size); + + int requested_ipa_size =3D 64 - clz64(vms->highest_gpa); + + /* + * If we're <=3D the default IPA size just use the default. + * If we're above the default but below the maximum, round up to + * the maximum. hvf_arm_get_max_ipa_bit_size() conveniently only + * returns values that are valid ARM PARange values. + */ + if (requested_ipa_size <=3D max_ipa_size) { + requested_ipa_size =3D max_ipa_size; + } else { + error_report("-m and ,maxmem option values " + "require an IPA range (%d bits) larger than " + "the one supported by the host (%d bits)", + requested_ipa_size, max_ipa_size); + return -1; + } + + return requested_ipa_size; +} + static int virt_hvf_get_physical_address_range(MachineState *ms) { VirtMachineState *vms =3D VIRT_MACHINE(ms); @@ -3414,6 +3445,7 @@ static void virt_machine_class_init(ObjectClass *oc, = const void *data) mc->get_default_cpu_node_id =3D virt_get_default_cpu_node_id; mc->kvm_type =3D virt_kvm_type; mc->hvf_get_physical_address_range =3D virt_hvf_get_physical_address_r= ange; + mc->whpx_get_physical_address_range =3D virt_whpx_get_physical_address= _range; assert(!mc->get_hotplug_handler); mc->get_hotplug_handler =3D virt_machine_get_hotplug_handler; hc->pre_plug =3D virt_machine_device_pre_plug_cb; diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h index 815845207b..0dd9ef2613 100644 --- a/include/hw/core/boards.h +++ b/include/hw/core/boards.h @@ -278,6 +278,7 @@ struct MachineClass { void (*wakeup)(MachineState *state); int (*kvm_type)(MachineState *machine, const char *arg); int (*hvf_get_physical_address_range)(MachineState *machine); + int (*whpx_get_physical_address_range)(MachineState *machine); =20 BlockInterfaceType block_default_type; int units_per_default_bus; diff --git a/target/arm/whpx/meson.build b/target/arm/whpx/meson.build index 1de2ef0283..3df632c9d3 100644 --- a/target/arm/whpx/meson.build +++ b/target/arm/whpx/meson.build @@ -1,3 +1,5 @@ arm_system_ss.add(when: 'CONFIG_WHPX', if_true: files( 'whpx-all.c', )) + +arm_common_system_ss.add(when: 'CONFIG_WHPX', if_false: files('whpx-stub.c= ')) diff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c index 75b82be4e7..fe58217e46 100644 --- a/target/arm/whpx/whpx-all.c +++ b/target/arm/whpx/whpx-all.c @@ -35,6 +35,7 @@ #include "system/whpx-accel-ops.h" #include "system/whpx-all.h" #include "system/whpx-common.h" +#include "whpx_arm.h" #include "hw/arm/bsa.h" #include "arm-powerctl.h" =20 @@ -657,6 +658,40 @@ static void whpx_cpu_update_state(void *opaque, bool r= unning, RunState state) { } =20 +uint32_t whpx_arm_get_ipa_bit_size(void) +{ + WHV_CAPABILITY whpx_cap; + UINT32 whpx_cap_size; + HRESULT hr; + hr =3D whp_dispatch.WHvGetCapability( + WHvCapabilityCodePhysicalAddressWidth, &whpx_cap, + sizeof(whpx_cap), &whpx_cap_size); + if (FAILED(hr)) { + error_report("WHPX: failed to get supported" + "physical address width, hr=3D%08lx", hr); + } + + /* + * We clamp any IPA size we want to back the VM with to a valid PARange + * value so the guest doesn't try and map memory outside of the valid = range. + * This logic just clamps the passed in IPA bit size to the first valid + * PARange value <=3D to it. + */ + return round_down_to_parange_bit_size(whpx_cap.PhysicalAddressWidth); +} + +static void clamp_id_aa64mmfr0_parange_to_ipa_size(ARMISARegisters *isar) +{ + uint32_t ipa_size =3D whpx_arm_get_ipa_bit_size(); + uint64_t id_aa64mmfr0; + + /* Clamp down the PARange to the IPA size the kernel supports. */ + uint8_t index =3D round_down_to_parange_index(ipa_size); + id_aa64mmfr0 =3D GET_IDREG(isar, ID_AA64MMFR0); + id_aa64mmfr0 =3D (id_aa64mmfr0 & ~R_ID_AA64MMFR0_PARANGE_MASK) | index; + SET_IDREG(isar, ID_AA64MMFR0, id_aa64mmfr0); +} + int whpx_init_vcpu(CPUState *cpu) { HRESULT hr; @@ -735,6 +770,7 @@ int whpx_init_vcpu(CPUState *cpu) val.Reg64 =3D deposit64(arm_cpu->mp_affinity, 31, 1, 1 /* RES1 */); whpx_set_reg(cpu, WHvArm64RegisterMpidrEl1, val); =20 + clamp_id_aa64mmfr0_parange_to_ipa_size(&arm_cpu->isar); return 0; =20 error: @@ -757,6 +793,8 @@ int whpx_accel_init(AccelState *as, MachineState *ms) UINT32 whpx_cap_size; WHV_PARTITION_PROPERTY prop; WHV_CAPABILITY_FEATURES features =3D {0}; + MachineClass *mc =3D MACHINE_GET_CLASS(ms); + int pa_range =3D 0; =20 whpx =3D &whpx_global; /* on arm64 Windows Hypervisor Platform, vGICv3 always used */ @@ -767,6 +805,13 @@ int whpx_accel_init(AccelState *as, MachineState *ms) goto error; } =20 + if (mc->whpx_get_physical_address_range) { + pa_range =3D mc->whpx_get_physical_address_range(ms); + if (pa_range < 0) { + return -EINVAL; + } + } + whpx->mem_quota =3D ms->ram_size; =20 hr =3D whp_dispatch.WHvGetCapability( diff --git a/target/arm/whpx/whpx-stub.c b/target/arm/whpx/whpx-stub.c new file mode 100644 index 0000000000..32e434a5f6 --- /dev/null +++ b/target/arm/whpx/whpx-stub.c @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * WHPX stubs for ARM + * + * Copyright (c) 2025 Mohamed Mediouni + * + */ + +#include "qemu/osdep.h" +#include "whpx_arm.h" + +uint32_t whpx_arm_get_ipa_bit_size(void) +{ + g_assert_not_reached(); +} diff --git a/target/arm/whpx_arm.h b/target/arm/whpx_arm.h new file mode 100644 index 0000000000..de7406b66f --- /dev/null +++ b/target/arm/whpx_arm.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * WHPX support -- ARM specifics + * + * Copyright (c) 2025 Mohamed Mediouni + * + */ + +#ifndef QEMU_WHPX_ARM_H +#define QEMU_WHPX_ARM_H + +#include "target/arm/cpu-qom.h" + +uint32_t whpx_arm_get_ipa_bit_size(void); + +#endif --=20 2.50.1 (Apple Git-155)