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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1766410920; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+LI59C/+4p8rnaXuChaanXEkK0s0AMUXxZXENA7KnK0=; b=ikgpk3d5DcN3fhJTmDjP0B5zjc/7SNVMecjPTBEVyB4SrnL8FfqOHtOo+6ri4/Dl5u4qaY B2cwazciKNkaWBFdTax9URx4+bfDHF8CAndszFvVzPlHdfbiP8aiDaJo7Bw8hxhK6b9HMd 8j0LlT56/SCWKC8ekuSOswlkfywvc5E= X-MC-Unique: nnEYi8H4PFS-J-Kk4u83Ww-1 X-Mimecast-MFC-AGG-ID: nnEYi8H4PFS-J-Kk4u83Ww_1766410917 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, cohuck@redhat.com, maz@kernel.org, oliver.upton@linux.dev, sebott@redhat.com, gshan@redhat.com, ddutile@redhat.com, peterx@redhat.com, philmd@linaro.org, pbonzini@redhat.com Subject: [PATCH v4 08/10] hw/arm/virt: Declare AArch32 DBGDTRTX as safe to ignore in incoming stream Date: Mon, 22 Dec 2025 14:40:05 +0100 Message-ID: <20251222134110.3649287-9-eric.auger@redhat.com> In-Reply-To: <20251222134110.3649287-1-eric.auger@redhat.com> References: <20251222134110.3649287-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" With the new infrastructure in place it is now feasible to teach qemu that it is safe to ignore a sysreg in the incoming migration stream. So with the plan to revert commit 4f2b82f60431 ("target/arm: Reinstate bogus AArch32 DBGDTRTX register for migration compat) from qemu 11 onwards, let's add a compat in 10.2 machine options stating that this reg is safe to ignore. from 11.0 onwards we will not need that register anymore. Signed-off-by: Eric Auger --- v3 -> v4: - add a comment related to DBGDTRTX (Connie) --- hw/arm/virt.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index ec0af8e6e7..00948887a2 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -100,6 +100,15 @@ static GlobalProperty arm_virt_compat_defaults[] =3D { static const size_t arm_virt_compat_defaults_len =3D G_N_ELEMENTS(arm_virt_compat_defaults); =20 +/* Register erronously exposed on 10.2 and earlier */ +#define DBGDTRTX 0x40200000200e0298 + +static GlobalProperty arm_virt_compat_10_2[] =3D { + { TYPE_ARM_CPU, "x-mig-safe-missing-regs", stringify(DBGDTRTX)}, +}; +static const size_t arm_virt_compat_10_2_len =3D + G_N_ELEMENTS(arm_virt_compat_10_2); + /* * This cannot be called from the virt_machine_class_init() because * TYPE_VIRT_MACHINE is abstract and mc->compat_props g_ptr_array_new() @@ -3536,6 +3545,7 @@ type_init(machvirt_machine_init); =20 static void virt_machine_10_2_options(MachineClass *mc) { + compat_props_add(mc->compat_props, arm_virt_compat_10_2, arm_virt_comp= at_10_2_len); } DEFINE_VIRT_MACHINE_AS_LATEST(10, 2) =20 --=20 2.52.0