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Add the architecture-independent ones to "Functional testing framework", and the remainder to "$arcg general architecture support" when available, else to "$arch TCG CPUs". Signed-off-by: Markus Armbruster Reviewed-by: Thomas Huth --- MAINTAINERS | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index fcb60c0c02..746cca7ae9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -133,6 +133,7 @@ S: Odd Fixes K: ^Subject:.*(?i)mips F: docs/system/target-mips.rst F: configs/targets/mips* +F: tests/functional/mips*/meson.build =20 X86 general architecture support M: Paolo Bonzini @@ -200,6 +201,8 @@ L: qemu-arm@nongnu.org S: Maintained F: target/arm/ F: target/arm/tcg/ +F: tests/functional/aarch64/meson.build +F: tests/functional/arm/meson.build F: tests/tcg/arm/ F: tests/tcg/aarch64/ F: tests/qtest/arm-cpu-features.c @@ -261,6 +264,7 @@ M: Song Gao S: Maintained F: target/loongarch/ F: tests/tcg/loongarch64/ +F: tests/functional/loongarch64/meson.build F: tests/functional/loongarch64/test_virt.py =20 M68K TCG CPUs @@ -268,6 +272,7 @@ M: Laurent Vivier S: Maintained F: target/m68k/ F: disas/m68k.c +F: tests/functional/m68k/meson.build F: tests/tcg/m68k/ =20 MicroBlaze TCG CPUs @@ -277,6 +282,7 @@ F: target/microblaze/ F: hw/microblaze/ F: disas/microblaze.c F: tests/docker/dockerfiles/debian-microblaze-cross.d/build-toolchain.sh +F: tests/functional/microblaze*/meson.build =20 MIPS TCG CPUs M: Philippe Mathieu-Daud=C3=A9 @@ -296,6 +302,7 @@ F: docs/system/openrisc/cpu-features.rst F: target/openrisc/ F: hw/openrisc/ F: include/hw/openrisc/ +F: tests/functional/or1k/meson.build F: tests/tcg/openrisc/ =20 PowerPC TCG CPUs @@ -313,6 +320,7 @@ F: configs/devices/ppc* F: docs/system/ppc/embedded.rst F: docs/system/target-ppc.rst F: tests/tcg/ppc*/* +F: tests/functional/ppc*/meson.build F: tests/functional/ppc/test_74xx.py =20 RISC-V TCG CPUs @@ -361,6 +369,7 @@ RENESAS RX CPUs R: Yoshinori Sato S: Orphan F: target/rx/ +F: tests/functional/rx/meson.build =20 S390 TCG CPUs M: Richard Henderson @@ -380,6 +389,7 @@ F: target/sh4/ F: hw/sh4/ F: disas/sh4.c F: include/hw/sh4/ +F: tests/functional/sh4*/meson.build F: tests/tcg/sh4/ =20 SPARC TCG CPUs @@ -391,6 +401,7 @@ F: hw/sparc/ F: hw/sparc64/ F: include/hw/sparc/sparc64.h F: disas/sparc.c +F: tests/functional/sparc*/meson.build F: tests/tcg/sparc64/ =20 X86 TCG CPUs @@ -412,6 +423,7 @@ W: http://wiki.osll.ru/doku.php?id=3Detc:users:jcmvbkbc= :qemu-target-xtensa S: Maintained F: target/xtensa/ F: hw/xtensa/ +F: tests/functional/xtensa/meson.build F: tests/tcg/xtensa/ F: tests/tcg/xtensaeb/ F: disas/xtensa.c @@ -4431,6 +4443,8 @@ R: Daniel P. Berrange S: Maintained F: docs/devel/testing/functional.rst F: scripts/clean_functional_cache.py +F: tests/functional/meson.build +F: tests/functional/generic/meson.build F: tests/functional/qemu_test/ =20 Windows Hosted Continuous Integration --=20 2.49.0