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Tsirkin" , Artyom Tarasenko , Peter Maydell , David Hildenbrand , Peter Xu Subject: [PATCH 06/14] system/physmem: Use explicit endianness in subpage_ops::read/write() Date: Wed, 17 Dec 2025 15:31:42 +0100 Message-ID: <20251217143150.94463-7-philmd@linaro.org> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251217143150.94463-1-philmd@linaro.org> References: <20251217143150.94463-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1765982137964154100 Replace the ldn_p/stn_p() calls by their explicit endianness variants. Duplicate the MemoryRegionOps, replacing the single DEVICE_NATIVE_ENDIAN entry by a pair of LITTLE and BIG ones. Select the proper MemoryRegionOps in subpage_init(). Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- system/physmem.c | 81 ++++++++++++++++++++++++++++++++++++++---------- 1 file changed, 64 insertions(+), 17 deletions(-) diff --git a/system/physmem.c b/system/physmem.c index 1292f49095f..d8465f085bd 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -2896,8 +2896,8 @@ static MemTxResult flatview_write(FlatView *fv, hwadd= r addr, MemTxAttrs attrs, static bool flatview_access_valid(FlatView *fv, hwaddr addr, hwaddr len, bool is_write, MemTxAttrs attrs); =20 -static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data, - unsigned len, MemTxAttrs attrs) +static MemTxResult subpage_read_le(void *opaque, hwaddr addr, uint64_t *da= ta, + unsigned len, MemTxAttrs attrs) { subpage_t *subpage =3D opaque; uint8_t buf[8]; @@ -2911,12 +2911,32 @@ static MemTxResult subpage_read(void *opaque, hwadd= r addr, uint64_t *data, if (res) { return res; } - *data =3D ldn_p(buf, len); + *data =3D ldn_le_p(buf, len); return MEMTX_OK; } =20 -static MemTxResult subpage_write(void *opaque, hwaddr addr, - uint64_t value, unsigned len, MemTxAttrs = attrs) +static MemTxResult subpage_read_be(void *opaque, hwaddr addr, uint64_t *da= ta, + unsigned len, MemTxAttrs attrs) +{ + subpage_t *subpage =3D opaque; + uint8_t buf[8]; + MemTxResult res; + +#if defined(DEBUG_SUBPAGE) + printf("%s: subpage %p len %u addr " HWADDR_FMT_plx "\n", __func__, + subpage, len, addr); +#endif + res =3D flatview_read(subpage->fv, addr + subpage->base, attrs, buf, l= en); + if (res) { + return res; + } + *data =3D ldn_be_p(buf, len); + return MEMTX_OK; +} + +static MemTxResult subpage_write_le(void *opaque, hwaddr addr, + uint64_t value, unsigned len, + MemTxAttrs attrs) { subpage_t *subpage =3D opaque; uint8_t buf[8]; @@ -2926,7 +2946,23 @@ static MemTxResult subpage_write(void *opaque, hwadd= r addr, " value %"PRIx64"\n", __func__, subpage, len, addr, value); #endif - stn_p(buf, len, value); + stn_le_p(buf, len, value); + return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, l= en); +} + +static MemTxResult subpage_write_be(void *opaque, hwaddr addr, + uint64_t value, unsigned len, + MemTxAttrs attrs) +{ + subpage_t *subpage =3D opaque; + uint8_t buf[8]; + +#if defined(DEBUG_SUBPAGE) + printf("%s: subpage %p len %u addr " HWADDR_FMT_plx + " value %"PRIx64"\n", + __func__, subpage, len, addr, value); +#endif + stn_be_p(buf, len, value); return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, l= en); } =20 @@ -2944,15 +2980,26 @@ static bool subpage_accepts(void *opaque, hwaddr ad= dr, len, is_write, attrs); } =20 -static const MemoryRegionOps subpage_ops =3D { - .read_with_attrs =3D subpage_read, - .write_with_attrs =3D subpage_write, - .impl.min_access_size =3D 1, - .impl.max_access_size =3D 8, - .valid.min_access_size =3D 1, - .valid.max_access_size =3D 8, - .valid.accepts =3D subpage_accepts, - .endianness =3D DEVICE_NATIVE_ENDIAN, +static const MemoryRegionOps subpage_ops[2] =3D { + [0 ... 1] =3D { + .impl =3D { + .min_access_size =3D 1, + .max_access_size =3D 8, + }, + .valid =3D { + .min_access_size =3D 1, + .max_access_size =3D 8, + .accepts =3D subpage_accepts, + }, + }, + + [0].endianness =3D DEVICE_LITTLE_ENDIAN, + [0].read_with_attrs =3D subpage_read_le, + [0].write_with_attrs =3D subpage_write_le, + + [1].endianness =3D DEVICE_BIG_ENDIAN, + [1].read_with_attrs =3D subpage_read_be, + [1].write_with_attrs =3D subpage_write_be, }; =20 static int subpage_register(subpage_t *mmio, uint32_t start, uint32_t end, @@ -2983,8 +3030,8 @@ static subpage_t *subpage_init(FlatView *fv, hwaddr b= ase) mmio =3D g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint1= 6_t)); mmio->fv =3D fv; mmio->base =3D base; - memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio, - NULL, TARGET_PAGE_SIZE); + memory_region_init_io(&mmio->iomem, NULL, &subpage_ops[target_big_endi= an()], + mmio, NULL, TARGET_PAGE_SIZE); mmio->iomem.subpage =3D true; #if defined(DEBUG_SUBPAGE) printf("%s: %p base " HWADDR_FMT_plx " len %08x\n", __func__, --=20 2.52.0