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Secure support and Granule Protection Check (for RME) for SMMU need to access secure memory. As well, it allows to remove usage of global address_space_memory, allowing different SMMU instances to have a specific view of memory. Signed-off-by: Pierrick Bouvier --- include/hw/arm/smmu-common.h | 4 ++++ hw/arm/sbsa-ref.c | 16 ++++++++++++---- hw/arm/smmu-common.c | 25 +++++++++++++++++++++++++ hw/arm/virt.c | 16 +++++++++++----- 4 files changed, 52 insertions(+), 9 deletions(-) diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h index 80d0fecfde8..c58797ce4aa 100644 --- a/include/hw/arm/smmu-common.h +++ b/include/hw/arm/smmu-common.h @@ -162,6 +162,10 @@ struct SMMUState { uint8_t bus_num; PCIBus *primary_bus; bool smmu_per_bus; /* SMMU is specific to the primary_bus */ + MemoryRegion *memory; + AddressSpace as_memory; + MemoryRegion *secure_memory; + AddressSpace as_secure_memory; }; =20 struct SMMUBaseClass { diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 2205500a8da..cc9d4385826 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -613,7 +613,9 @@ static void create_xhci(const SBSAMachineState *sms) sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(sms->gic, = irq)); } =20 -static void create_smmu(const SBSAMachineState *sms, PCIBus *bus) +static void create_smmu(const SBSAMachineState *sms, PCIBus *bus, + MemoryRegion *sysmem, + MemoryRegion *secure_sysmem) { hwaddr base =3D sbsa_ref_memmap[SBSA_SMMU].base; int irq =3D sbsa_ref_irqmap[SBSA_SMMU]; @@ -625,6 +627,10 @@ static void create_smmu(const SBSAMachineState *sms, P= CIBus *bus) object_property_set_str(OBJECT(dev), "stage", "nested", &error_abort); object_property_set_link(OBJECT(dev), "primary-bus", OBJECT(bus), &error_abort); + object_property_set_link(OBJECT(dev), "memory", OBJECT(sysmem), + &error_abort); + object_property_set_link(OBJECT(dev), "secure-memory", OBJECT(secure_s= ysmem), + &error_abort); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); for (i =3D 0; i < NUM_SMMU_IRQS; i++) { @@ -633,7 +639,9 @@ static void create_smmu(const SBSAMachineState *sms, PC= IBus *bus) } } =20 -static void create_pcie(SBSAMachineState *sms) +static void create_pcie(SBSAMachineState *sms, + MemoryRegion *sysmem, + MemoryRegion *secure_sysmem) { hwaddr base_ecam =3D sbsa_ref_memmap[SBSA_PCIE_ECAM].base; hwaddr size_ecam =3D sbsa_ref_memmap[SBSA_PCIE_ECAM].size; @@ -689,7 +697,7 @@ static void create_pcie(SBSAMachineState *sms) =20 pci_create_simple(pci->bus, -1, "bochs-display"); =20 - create_smmu(sms, pci->bus); + create_smmu(sms, pci->bus, sysmem, secure_sysmem); } =20 static void *sbsa_ref_dtb(const struct arm_boot_info *binfo, int *fdt_size) @@ -825,7 +833,7 @@ static void sbsa_ref_init(MachineState *machine) =20 create_xhci(sms); =20 - create_pcie(sms); + create_pcie(sms, sysmem, secure_sysmem); =20 create_secure_ec(secure_sysmem); =20 diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index 62a76121841..1d6a90561cb 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -944,6 +944,13 @@ static void smmu_base_realize(DeviceState *dev, Error = **errp) return; } =20 + g_assert(s->memory); + address_space_init(&s->as_memory, s->memory, "smmu-memory-view"); + if (s->secure_memory) { + address_space_init(&s->as_secure_memory, s->secure_memory, + "smmu-secure-memory-view"); + } + /* * We only allow default PCIe Root Complex(pcie.0) or pxb-pcie based e= xtra * root complexes to be associated with SMMU. @@ -1008,10 +1015,28 @@ static void smmu_base_class_init(ObjectClass *klass= , const void *data) rc->phases.exit =3D smmu_base_reset_exit; } =20 +static void smmu_base_instance_init(Object *obj) +{ + SMMUState *s =3D ARM_SMMU(obj); + + object_property_add_link(obj, "memory", + TYPE_MEMORY_REGION, + (Object **)&s->memory, + qdev_prop_allow_set_link_before_realize, + OBJ_PROP_LINK_STRONG); + + object_property_add_link(obj, "secure-memory", + TYPE_MEMORY_REGION, + (Object **)&s->secure_memory, + qdev_prop_allow_set_link_before_realize, + OBJ_PROP_LINK_STRONG); +} + static const TypeInfo smmu_base_info =3D { .name =3D TYPE_ARM_SMMU, .parent =3D TYPE_SYS_BUS_DEVICE, .instance_size =3D sizeof(SMMUState), + .instance_init =3D smmu_base_instance_init, .class_data =3D NULL, .class_size =3D sizeof(SMMUBaseClass), .class_init =3D smmu_base_class_init, diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 25fb2bab568..32ef51c3ad7 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1514,8 +1514,9 @@ static void create_smmuv3_dev_dtb(VirtMachineState *v= ms, 0x0, vms->iommu_phandle, 0x0, 0x10000); } =20 -static void create_smmu(const VirtMachineState *vms, - PCIBus *bus) +static void create_smmu(const VirtMachineState *vms, PCIBus *bus, + MemoryRegion *sysmem, + MemoryRegion *secure_sysmem) { VirtMachineClass *vmc =3D VIRT_MACHINE_GET_CLASS(vms); int irq =3D vms->irqmap[VIRT_SMMU]; @@ -1535,6 +1536,10 @@ static void create_smmu(const VirtMachineState *vms, } object_property_set_link(OBJECT(dev), "primary-bus", OBJECT(bus), &error_abort); + object_property_set_link(OBJECT(dev), "memory", OBJECT(sysmem), + &error_abort); + object_property_set_link(OBJECT(dev), "secure-memory", OBJECT(secure_s= ysmem), + &error_abort); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); for (i =3D 0; i < NUM_SMMU_IRQS; i++) { @@ -1573,7 +1578,8 @@ static void create_virtio_iommu_dt_bindings(VirtMachi= neState *vms) } } =20 -static void create_pcie(VirtMachineState *vms) +static void create_pcie(VirtMachineState *vms, + MemoryRegion *sysmem, MemoryRegion *secure_sysmem) { hwaddr base_mmio =3D vms->memmap[VIRT_PCIE_MMIO].base; hwaddr size_mmio =3D vms->memmap[VIRT_PCIE_MMIO].size; @@ -1692,7 +1698,7 @@ static void create_pcie(VirtMachineState *vms) =20 switch (vms->iommu) { case VIRT_IOMMU_SMMUV3: - create_smmu(vms, vms->bus); + create_smmu(vms, vms->bus, sysmem, secure_sysmem); if (!vms->default_bus_bypass_iommu) { qemu_fdt_setprop_cells(ms->fdt, nodename, "iommu-map", 0x0, vms->iommu_phandle, 0x0, 0x100= 00); @@ -2506,7 +2512,7 @@ static void machvirt_init(MachineState *machine) =20 create_rtc(vms); =20 - create_pcie(vms); + create_pcie(vms, sysmem, secure_sysmem); create_cxl_host_reg_region(vms); =20 if (aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) { --=20 2.47.3